Shift Register Patents (Class 340/12.21)
  • Patent number: 9268278
    Abstract: An image forming apparatus includes an image forming section, a body housing, a protruding housing, a light diffusing portion, a light source, a light guide path, and a control unit. The image forming section performs image formation on a sheet. The body housing is formed by a box body with a top surface, and contains the image forming section. The protruding housing is located on the top surface, and has a top portion protruding upwardly above the top surface. The light diffusing portion is located in or near the top portion of the protruding housing. The light source is located inside the body housing or the protruding housing, and emits light. The light guide path guides light emitted by the light source to the light diffusing portion. The control unit controls illumination of the light source based on the information related to the image formation.
    Type: Grant
    Filed: March 2, 2015
    Date of Patent: February 23, 2016
    Assignee: Kyocera Document Solutions Inc.
    Inventor: Tomoo Miyagawa
  • Patent number: 8847873
    Abstract: A gate line driving module used on a liquid crystal display uses clock signal sources in replacement of a high level gate power source, such that the phenomenon of device characteristic drift occurring in the foregoing related art is avoided. The gate line driving module includes a plurality of odd-pixel gate line driving circuits, a plurality of even-pixel gate line driving circuits, and an auxiliary gate line driving circuit. A pair of neighboring odd-pixel gate line driving circuit and even-pixel gate line driving circuit exchange output signals thereof with each other in a forward or feedback manner for ensuring that each the odd-pixel gate line driving circuit and each the even-pixel gate line driving circuit are driven once. The auxiliary gate line driving circuit is used for ensuring that signal iteration of the gate line driving module is under normal operation.
    Type: Grant
    Filed: June 29, 2010
    Date of Patent: September 30, 2014
    Assignee: InnoLux Corporation
    Inventors: Chien-Hsueh Chiang, Sz-Hsiao Chen
  • Patent number: 8669969
    Abstract: A scan driver includes a plurality of stages. Each of the plurality of stages includes an odd-numbered scan unit, an even-numbered scan unit, and a signal shift unit. The scan driver can selectively perform progressive scan and interlaced scan by varying logic levels of mode signals and clock signals applied to the stages.
    Type: Grant
    Filed: August 30, 2010
    Date of Patent: March 11, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventor: Kyung-Hoon Chung
  • Patent number: 8497833
    Abstract: A display device includes a light emission driver realized by using PMOS transistors, thereby controlling a light emitting time. The display device includes: a display unit including a plurality of scan lines for transmitting a plurality of scan signals, a plurality of data lines for transmitting a plurality of data signals, a plurality of light emitting signal lines for transmitting a plurality of light emitting signals, and a plurality of pixels coupled to the scan lines and the data lines and for emitting light according to the light emitting signals; and a light emission driver for transmitting the light emitting signals to the light emitting signal lines and for controlling a pulse width of the light emitting signals.
    Type: Grant
    Filed: May 14, 2010
    Date of Patent: July 30, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventor: Ok-Kyung Park
  • Patent number: 8199260
    Abstract: In a VIF circuit for synchronously detecting a picture signal from an AM-modulated PIF signal, the accuracy of a picture signal to be demodulated is maintained even in a state of overmodulation. A comparator (68) determines whether the picture signal exceeds VTH, which is a state of overmodulation. In a period in which the signal is less than or equal to VTH, a switch circuit (56) inputs an output voltage of an APC filter (54) to a VCO (48), and a PLL is formed. The PLL operates so as to lock onto the PIF signal, and reproduces a carrier wave. On the other hand, in a period in which the signal exceeds VTH, the switch circuit (56) inputs an output voltage VSH of an SH circuit (58) to the VCO (48). The SH circuit (58) holds the voltage of the APC filter (54) that is in a locked state in a horizontal synchronizing period and uses the voltage to control the VCO (48), whereby free run and frequency drifting are minimized.
    Type: Grant
    Filed: June 20, 2007
    Date of Patent: June 12, 2012
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Tsutomu Tanaka, Mutsuki Niki