Quantizer Patents (Class 341/200)
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Publication number: 20120127005Abstract: An apparatus and method for a fast quantizer comparator comprising three stages: a preamplifier stage, a regeneration latch stage, and a data latch stage. Time delay is reduced by changing the initial voltages of the regeneration latch outputs. The current source is provided at the tail of the comparator, enabling time delay optimization. When the PMOS equalization switch turns off, it makes the clock signal feedthrough and provides charge injection into the outputs. Because of these charges, the time delay of the comparator is variable. Only a very low current sets the output voltages because the resetting time is longer than the comparison time.Type: ApplicationFiled: November 17, 2011Publication date: May 24, 2012Applicant: ASAHI KASEI MICRODEVICES CORPORATIONInventors: Jeongseok Chae, Gabor C. Temes
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Publication number: 20120112936Abstract: A quantization circuit includes a quantizer and a compensation circuit. The quantizer includes a voltage-to-phase converter and a phase difference digitization block. The voltage-to-phase converter is arranged for generating a phase signal according to an input voltage. The phase difference digitization block is arranged for generating a quantization output according to a phase difference between a phase of the phase signal and a reference phase input. The compensation circuit is arranged for applying compensation to the phase difference digitization block according to the quantization output.Type: ApplicationFiled: July 25, 2011Publication date: May 10, 2012Inventor: Sheng-Jui Huang
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Publication number: 20120062405Abstract: A summing-tracking quantizer additively combines multiple feed-forward outputs of cascaded integrator stages of a sigma-delta analog-to-digital converter with a scaled sampled analog signal, and a delayed scaled analog input signal. The summing tracking quantizer compensates for loop delay within a sigma-delta analog-to-digital converter. A loop delay compensation digital-to-analog converter for a sigma-delta analog-to-digital converter is merged with the voltage reference generator within the summing-tracking quantizer. The summing tracking quantizer selects reference voltages from the voltage reference generator based on a previous digital output code. The summing-tracking quantizer has a matrix switch that receives the previous digital output code and selects the reference voltage for applying to comparators for determining a differential quantization code that is additively combined to the previous digital output code to determine the present digital output code.Type: ApplicationFiled: October 5, 2010Publication date: March 15, 2012Inventors: Sebastian Loeda, Gary Hague
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Publication number: 20120056771Abstract: Provided are, among other things, systems, apparatuses methods and techniques for performing multi-bit quantization. One such apparatus includes an input signal line; a first comparator having a first input coupled to the input signal line, a second input coupled to a first reference signal, and an output; a rectifier having an input coupled to the input signal line and also having an output; and a second comparator having a first input coupled to the output of the rectifier, a second input coupled to a second reference signal, and an output, with the first comparator and the second comparator being clocked so as to produce sequences of quantized samples at substantially the same times.Type: ApplicationFiled: September 8, 2011Publication date: March 8, 2012Inventor: Christopher Pagnanelli
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Publication number: 20120032831Abstract: A method and apparatus for an adder-embedded dynamic preamplifier system with dynamic comparator and current mode adder including differential switches for precharging, a switch for evaluation; and reference, feedfoward input sections. When differential switches are closed, OUTN and OUTP are precharged. During the evaluation, discharging currents are proportionately determined by input and reference values. A following latch amplifies the discharging differences of OUTN and OUTP.Type: ApplicationFiled: August 4, 2011Publication date: February 9, 2012Applicant: ASAHI KASEI MICRODEVICES CORPORATIONInventors: Jeongseok Chae, Gábor C. Temes
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Patent number: 8098742Abstract: An analog/digital gain control device avoid some of the requirements associated with the nature of a closed-loop AGC circuits and which meets the remaining requirements without much difficulty uses an analog to digital conversion method that increases the number of effective ADC bits by compressing the baseband input analog signal using a logarithmic circuit. After the compressed analog signal is converted into a digital signal, a digital anti-log process or look-up table (LUT) is used to expand the digital signal back to the original linear scale. The word size of the output of the anti-log process is larger than the input word size due to the nature of the anti-log function. To reduce the word size of the digital signal an open loop normalization technique can be applied.Type: GrantFiled: April 7, 2009Date of Patent: January 17, 2012Assignee: InterDigital Technology CorporationInventors: Leonid Kazakevich, Rui Yang
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Publication number: 20110316732Abstract: An LSP vector quantization device able to improve the precision of quantization in vector quantization where a codebook for first stage vector quantization is switched according to the type of a feature that has a correlation with the quantization target vector.Type: ApplicationFiled: February 12, 2010Publication date: December 29, 2011Applicant: PANASONIC CORPORATIONInventors: Kaoru Satoh, Toshiyuki Morii
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Patent number: 7986250Abstract: A successive requantizer, which serves as a replacement for a ?? modulator in a fractional-N PLL or a DAC, and avoids spurious tone problems, thereby circumventing the tradeoffs that result from reliance on the common approach of making highly linear analog circuitry to avoid spurious tones. A successive requantizer fractional-N PLL of the invention has the potential to reduce power consumption and the cost of commercial communication devices. The successive requantizer performs digital quantization one bit at a time in such a way that the quantization noise can he engineered to have desirable properties such as non-linearity robustness. The successive requantizer is applicable to most high-performance digital communication systems, such as cellular telephone handsets and wireless local and metropolitan area network transceivers.Type: GrantFiled: October 15, 2009Date of Patent: July 26, 2011Assignee: The Regents of the University of CaliforniaInventors: Ian Galton, Ashok Swaminathan
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Publication number: 20110122009Abstract: A quantizer of a sigma-delta modulator includes a pulse width modulator (PWM), a converter and a voltage level tracing device. The PWM receives an input signal, and generates a PWM signal according to one or more sawtooth waves and one or more reference voltages. The converter is connected to the output of the PWM and digitizes the PWM signal to generate an output digital value. The voltage level tracing device is connected to the output of the converter, and receives the output digital value to generate a reference voltage adjustment value. The reference voltage adjustment value is transmitted to the PWM for adjusting the reference voltage, so as to change the next corresponding voltage level of the sawtooth wave to track the input signal.Type: ApplicationFiled: March 4, 2010Publication date: May 26, 2011Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Chien Hua CHENG, Tim Kuei Shia, Jia Chun Huang
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Patent number: 7944388Abstract: An improved (N:K) multiple description binning encoder that employs binning yet permits recovery of the input signal when fewer than K of the descriptions are available. In creating the encoder, a first choice is made of the number of descriptions that the encoder is to create and the minimum number of descriptions below which full recovery of the input signal is not possible. A second choice is made as to the number of descriptions that are to be broken up, to form descriptions that have two portions each. Once the first choice is made, appropriate quantization and binning scheme are selected by employing conventional techniques, and in response to the second choice, the chosen number of descriptions are each quantization split into coarse and fine quantization arrangements.Type: GrantFiled: December 8, 2009Date of Patent: May 17, 2011Inventors: Chao Tian, Jun Chen
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Publication number: 20110025541Abstract: Apparatus and methods are provided for a voltage-controlled oscillator (VCO) quantization circuit. A quantization circuit comprises an input node for an input signal, a VCO quantizer coupled to the input node, and an output generation module coupled to the VCO quantizer. The VCO quantizer is configured to generate a digital code that is representative of the input signal, wherein the digital code has a first code range. The output generation module generates a digital output value based on the digital code, wherein the digital output value has a second code range being greater than the first code range.Type: ApplicationFiled: July 30, 2009Publication date: February 3, 2011Applicant: FREESCALE SEMICONDUCTOR, INC.Inventor: Christopher G. Guenther
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Publication number: 20110002264Abstract: A digital-to-analog converter (DAC) includes a mismatch shaping feedback vector quantizer configured to store state information in expanded format using One-Hot Encoding of a matrix. The expanded state format storage enables implementation of a simplified state sorter for the vector feedback mechanism of the vector quantizer. The simplified state sorter may minimize the variance of ones (or other symbols representing state values) in the matrix, and allow performing sorting in a reduced number of clock cycles. For example, sorting may be performed on a predetermined edge of single clock cycle, or on two edges of the same clock cycle. The matrix may be normalized periodically or as needed, to avoid overflow and underflow. The DAC may be used as a quantizer of a modulator of an access terminal in a cellular communication system.Type: ApplicationFiled: December 17, 2009Publication date: January 6, 2011Applicant: QUALCOMM IncorporatedInventors: Matthew D. Sienko, Joseph G. Hamilton, Iain W. Finlay
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Patent number: 7852253Abstract: Apparatus and methods are provided for converting an analog input signal to a digital output value. A quantization circuit comprises an input node and a comparator array, wherein each comparator of the comparator array is coupled to the input node. A voltage divider arrangement is coupled to the comparator array and configured to establish a respective threshold voltage for each comparator of the comparator array. The comparator array generates a digital code based on the input signal and the respective threshold voltage for each comparator. A control node is coupled to the voltage divider arrangement, wherein the control node and the voltage divider arrangement are cooperatively configured to adjust the threshold voltage for at least one comparator of the comparator array in response to a control signal at the control node.Type: GrantFiled: February 18, 2009Date of Patent: December 14, 2010Assignee: Freescale Semiconductor, Inc.Inventors: David E. Bien, Brandt Braswell, Merit Y. Hong
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Patent number: 7834787Abstract: A technique for implementing compensatory feedback in a continuous-time sigma-delta modulator includes providing, based on an analog input signal, a digital output signal at an output of a quantizer circuit of the continuous-time sigma-delta modulator. A functionality of the quantizer circuit is then controlled based on the digital output signal.Type: GrantFiled: January 8, 2009Date of Patent: November 16, 2010Assignee: Freescale Semiconductor, Inc.Inventor: Merit Y. Hong
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Publication number: 20100207797Abstract: Apparatus and methods are provided for converting an analog input signal to a digital output value. A quantization circuit comprises an input node and a comparator array, wherein each comparator of the comparator array is coupled to the input node. A voltage divider arrangement is coupled to the comparator array and configured to establish a respective threshold voltage for each comparator of the comparator array. The comparator array generates a digital code based on the input signal and the respective threshold voltage for each comparator. A control node is coupled to the voltage divider arrangement, wherein the control node and the voltage divider arrangement are cooperatively configured to adjust the threshold voltage for at least one comparator of the comparator array in response to a control signal at the control node.Type: ApplicationFiled: February 18, 2009Publication date: August 19, 2010Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: David E. Bien, Brandt Braswell, Merit Y. Hong
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Publication number: 20100176982Abstract: The invention relates to an N-bit asynchronous Quantizer including a 2N?1 signal amplifier stages (G12-G2N?12) arranged in series, the input of the first stage being capable of receiving a signal to be quantized; 2N?1 comparators (C12-C2N?12), one comparator being connected to the output of each amplifier stage (G12-G2N?12), and capable of comparing the value of this output with a predetermined threshold value; and at least 2N?2 delay lines (D12-D2N?12) placed at the output of the 2N?2 first comparators, the signals supplied at the output of the delay lines (D12-D2N?12) and of the last comparator constituting at any instant the quantized binary values of the input signal with a time shift.Type: ApplicationFiled: March 24, 2010Publication date: July 15, 2010Applicant: Commissariat A L'Energie Atomique et Aux Energies AlternativesInventor: David LACHARTRE
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Patent number: 7750835Abstract: A digital to analog converter includes a time encoder that converts an analog input signal into a asynchronous pulse sequence, a pulse asynchronous DeMUX circuit that converts the asynchronous pulse sequence into a parallel stream of pulse sequences at a relatively lower speed, a parallel pulse to asynchronous digital converter, an asynchronous digital to synchronous digital converter, a timing reference circuit to generate absolute time references, and a Digital Signal Processor. This architecture provides for analog to digital conversion based on pulse encoding with a parallel digitization scheme of the pulse encoded signal.Type: GrantFiled: November 6, 2008Date of Patent: July 6, 2010Assignee: HRL Laboratories, LLCInventors: Jose Cruz-Albrecht, Peter Petre, Joseph F. Jensen
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Publication number: 20100121610Abstract: A digital filtering system, method, and program thereof are described. In the system, firstly a sensor obtains an analog physiological signal, a quantizing module transforms the physiological signal to a digitalized frequency domain signal, and then a specification parameter module obtains a feature model satisfying the frequency domain signal by matching, for a deciding process module to determine which decision parameter should be used. A filter-Clustering management module starts a relevant filter module according to the matching decision parameter to filter the frequency domain signal. On the contrary, when the frequency domain signal is an abnormal signal, the quantizing module outputs the abnormal signal to a back-end server system. The server system builds more than one updating parameter to update all the decision parameters and feature parameters. Therefore, the decision parameters and the feature parameters are updated on real time, and the physiological signal filtering result is quickly obtained.Type: ApplicationFiled: December 12, 2008Publication date: May 13, 2010Inventor: Chih-Wei HSU
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Patent number: 7688245Abstract: A method for quantizing signal values of a signal received or to be transmitted via a radio interface including quantizing signal values that lie within a first value range according to a first quantization having a multiplicity of quantization steps wherein the quantization step width between two quantization steps differs from a linear quantization with the same number of quantization steps at most by the step width of the linear quantization with the same number of quantization steps; and quantizing signal values that lie within a second value range according to a second quantization having a multiplicity of quantization steps wherein the quantization step width between two quantization steps is larger than the quantization step width between two quantization steps of the first quantization.Type: GrantFiled: July 11, 2008Date of Patent: March 30, 2010Assignee: Infineon Technologies AGInventor: Markus Dominik Mueck
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Publication number: 20100066580Abstract: In a high-fidelity digital modulator, a mapper is provided to minimize quantization noise, jitter, and cross-talk between multiple digital-to-analog or analog-to-digital converters. The mapper receives a quantized level from a quantizer and maps the quantized level to an output sequence. The mapper includes a table defining multiple sequences corresponding to each quantized level. Each sequence includes two or more symbols, having one of multiple values. The mapper also includes a generator that selects one of the multiple sequences as the output sequence. The last symbol of a first output sequence is equal to the first symbol of the next output sequence and so on. The generator selects the output sequence by alternating between a first and a second sequence for each quantized level received. The generator selects the output sequence by alternating between sequences having a positive and a negative common mode energy for each odd valued quantized level received.Type: ApplicationFiled: September 10, 2009Publication date: March 18, 2010Applicant: Broadcom CorporationInventors: Todd L. BROOKS, Kevin L. MILLER, Josephus A. VAN ENGELEN
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Publication number: 20100066576Abstract: A superconductor multi-level quantizer is disclosed, which quantizer includes a number N of Josephson junction (JJ) comparators connected in parallel to a common input node. The quantizer further includes at least one flux bias device. Each flux bias device is capable to adjust the flux threshold for at least one of the JJ comparators. The quantizer is so configured a feedback current from the output is capable to shift the flux threshold for each of the JJ comparators.Type: ApplicationFiled: September 17, 2008Publication date: March 18, 2010Applicant: HYPRES, INC.Inventor: Dmitri Kirichenko
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Patent number: 7680670Abstract: The invention relates to compression coding and/or decoding of digital signals, in particular by vector variable-rate quantisation defining a variable resolution. For this purpose an impulsion dictionary comprises: for a given dimension, increasing resolution dictionaries imbricated into each other and, for a given dimension, a union of: a totality (D?i<N>) of code-vectors produced, by inserting elements taken in a final set (A) into smaller dimension code-vectors according to a final set of predetermined insertion rules (F1) and a second totality of code-vectors (Y?) which are not obtainable by insertion into the smaller dimension code vectors according to said set of the insertion rules.Type: GrantFiled: January 30, 2004Date of Patent: March 16, 2010Assignee: France TelecomInventors: Claude Lamblin, David Virette, Balazs Kovesi, Dominique Massaloux
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Patent number: 7663527Abstract: There is described a system (10; 300) for processing an input signal (340) to generate a corresponding encoded output signal (380). The system (10; 300) includes a plurality of quantizing devices (30, 70; 350, 370) coupled in series, the system (10; 300 being configured in operation to reduce tandem quantization noise arising therein by: (a) analyzing the system (10; 300) to determine signal regions (290) in which tandem noise errors occur; and (b) modifying one or more earlier quantizing devices (30; 350) in the system (10; 300) with backward correction to reduce tandem noise arising therein from said determined signal regions (290), said one or more earlier quantizing devices (30; 350) not including a last quantizing device (70; 370) in series the system (10; 300).Type: GrantFiled: October 14, 2005Date of Patent: February 16, 2010Assignee: Koninklijke Philips Electronics N.V.Inventors: Minne Van Der Veen, Aweke Negash Lemma
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Patent number: 7657429Abstract: A coding apparatus includes a fourth layer codebook that shows N number of codes indicating uniquely respective N integers that increment one by one; and first to third layer codebooks that show M number of codes indicating uniquely respective M integers that are a subset of the N integers, and codes a digital signal using any one of the first to fourth layer codebooks. The coding apparatus does not need to do rescaling even when switching one of the first to fourth layer codebooks into another of them.Type: GrantFiled: June 7, 2004Date of Patent: February 2, 2010Assignee: Panasonic CorporationInventor: Mineo Tsushima
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Publication number: 20100007543Abstract: A method for quantizing signal values of a signal received or to be transmitted via a radio interface including quantizing signal values that lie within a first value range according to a first quantization having a multiplicity of quantization steps wherein the quantization step width between two quantization steps differs from a linear quantization with the same number of quantization steps at most by the step width of the linear quantization with the same number of quantization steps; and quantizing signal values that lie within a second value range according to a second quantization having a multiplicity of quantization steps wherein the quantization step width between two quantization steps is larger than the quantization step width between two quantization steps of the first quantization.Type: ApplicationFiled: July 11, 2008Publication date: January 14, 2010Applicant: INFINEON TECHNOLOGIES AGInventor: Markus Dominik Mueck
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Publication number: 20090212984Abstract: Systems, methods, and devices for obtaining data from a data location. The method may include generating a first value by sensing a data location under a first condition and generating a second value by sensing the data location under a second condition. The method may further include combining the first value with the second value to identify data conveyed by the data location.Type: ApplicationFiled: May 5, 2009Publication date: August 27, 2009Applicant: Micron Technology, Inc.Inventor: R. Jacob Baker
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Patent number: 7580832Abstract: An apparatus for producing a fingerprint signal from an audio signal includes a means for calculating energy values for frequency bands of segments of the audio signal which are successive in time, so as to obtain, from the audio signal, a sequence of vectors of energy values, a means for scaling the energy values to obtain a sequence of scaled vectors, and a means for temporal filtering of the sequence of scaled vectors to obtain a filtered sequence which represents the fingerprint, or from which the fingerprint may be derived. Thus, a fingerprint is produced which is robust against disturbances due to problems associated with coding or with transmission channels, and which is especially suited for mobile radio applications.Type: GrantFiled: August 31, 2004Date of Patent: August 25, 2009Assignee: M2ANY GmbHInventors: Eric Allamanche, Juergen Herre, Oliver Hellmuth, Thorsten Kastner, Markus Cremer
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Publication number: 20090167588Abstract: Provided are a method and apparatus for quantization encoding and de-quantization decoding using a trellis. Unlike a trellis coded quantization (TCQ) index, by classifying quantization levels to which cosets are allocated and allocating indexes to the quantization levels so that a coset corresponding to a specific branch in a predetermined state in the trellis can be selected with only indexes without encoding or decoding information on paths, quantization encoding and de-quantization decoding are performed by using a new index.Type: ApplicationFiled: April 17, 2008Publication date: July 2, 2009Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Ho-sang Sung, Thomas R. Fischer
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Patent number: 7532671Abstract: An analog/digital gain control device avoid some of the requirements associated with the nature of a closed-loop AGC circuits and which meets the remaining requirements without much difficulty uses an analog to digital conversion method that increases the number of effective ADC bits by compressing the baseband input analog signal using a logarithmic circuit. After the compressed analog signal is converted into a digital signal, a digital anti-log process or look-up table (LUT) is used to expand the digital signal back to the original linear scale. The word size of the output of the anti-log process is larger than the input word size due to the nature of the anti-log function. To reduce the word size of the digital signal an open loop normalization technique can be applied.Type: GrantFiled: June 9, 2008Date of Patent: May 12, 2009Assignee: InterDigital Technology CorporationInventors: Leonid Kazakevich, Rui Yang
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Patent number: 7508333Abstract: A method and apparatus to quantize and dequantize an input signal, and a method and apparatus to encode and decode an input signal. The method of quantizing an input signal includes determining a quantization scale type according to a distribution feature of the input signal, and quantizing the input signal according to the determined quantization scale type. Accordingly, when a number of assigned bits is small in an encoding process, signal distortion can be minimized without an increase in complexity or having to use large sized additional information in order to determine an optimum scale. In addition, the input signal can be encoded by considering a trade-off of a distortion rate corresponding to the number of assigned bits of the input signal.Type: GrantFiled: October 17, 2006Date of Patent: March 24, 2009Assignee: Samsung Electronics Co., LtdInventors: Junghoe Kim, Eunmi Oh, Anton Porov
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Publication number: 20080252510Abstract: Methods of encoding and decoding a multi-channel audio signal and apparatuses for encoding and decoding a multi-channel audio signal are provided. The apparatus for decoding a multi-channel audio signal includes an unpacking extracting which extracts a pilot and data regarding a quantized CLD between a pair of channels of the plurality of channels from the bitstream, a differential decoding unit which restores a quantized CLD by adding the extracted pilot to the extracted data, and an inverse quantization unit which inversely quantizes the restored quantized CLD using a quantization table that considers the location properties of the pair of channels.Type: ApplicationFiled: September 27, 2006Publication date: October 16, 2008Applicant: LG ELECTRONICS, INC.Inventors: Yang-Won Jung, Hee Suk Pang, Hyen-O Oh, Dong Soo Kim, Jae Hyun Lim
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Patent number: 7436347Abstract: In one exemplary embodiment, an adaptive quantiser includes: an input; a memory configured to store a representation of the distribution of the quantiser output for an expected input signal; a data recording configuration operable to record the actual input signal over a period that is statistically significant, the data recording configuration comprising an analogue-to-digital converter and a second memory configured to cyclically store the output of the analogue-to-digital converter; and a processor configured to set quantisation steps in dependence on the recorded input signal so that the quantiser output distribution tends to match said represented distribution.Type: GrantFiled: January 31, 2005Date of Patent: October 14, 2008Inventor: David Asher Jaffa
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Patent number: 7420497Abstract: A quantizer is described for use in a flash analog to digital converter (ADC), which may be implemented as part of an integrated wireless transceiver or other highly integrated electrical circuit. The quantizer may be configured to operate within such a flash ADC in an accurate manner within a desired voltage range, while minimizing factors that may otherwise lead to errors in the analog-to-digital conversion process. For example, a comparator of the quantizer may be used that has properties that are particularly well-suited for such an environment, where such properties may include, for example, a relatively low input referred offset voltage that is associated with a preamplifier of the comparator.Type: GrantFiled: June 28, 2006Date of Patent: September 2, 2008Assignee: Broadcom CorporationInventor: Janice Chiu
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Patent number: 7411527Abstract: A noise shaping quantizer having a first noise shaping quantization unit for applying a first noise shaping operation on an input signal.Type: GrantFiled: March 19, 2007Date of Patent: August 12, 2008Assignee: Matsushita Electric Industrial Co., Ltd.Inventor: Naotake Kitahira
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Publication number: 20080180307Abstract: For supporting a selection of a predictive or non-predictive quantization in the scope of an audio signal coding, it is determined whether an error resulting with a non-predictive quantization of an audio signal segment lies below a predetermined threshold value. An audio signal segment quantized with the non-predictive quantization is provided as a part of an encoded audio signal at least in case it is determined that the error resulting with the non-predictive quantization of the audio signal segment lies below a predetermined threshold value. Otherwise, an audio signal segment quantized with predictive quantization is provided as a part of an encoded audio signal.Type: ApplicationFiled: January 30, 2007Publication date: July 31, 2008Inventors: Anssi Ramo, Lasse Laaksonen, Adriana Vasilache
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Patent number: 7391814Abstract: An analog/digital gain control device avoid some of the requirements associated with the nature of a closed-loop AGC circuits and which meets the remaining requirements without much difficulty uses an analog to digital conversion method that increases the number of effective ADC bits by compressing the baseband input analog signal using a logarithmic circuit. After the compressed analog signal is converted into a digital signal, a digital anti-log process or look-up table (LUT) is used to expand the digital signal back to the original linear scale. The word size of the output of the anti-log process is larger than the input word size due to the nature of the anti-log function. To reduce the word size of the digital signal an open loop normalization technique can be applied.Type: GrantFiled: May 3, 2007Date of Patent: June 24, 2008Assignee: InterDigital Technology CorporationInventors: Leonid Kazakevich, Rui Yang
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Patent number: 7386052Abstract: The invention relates to an automation device, with which a multiplicity of physically distributed functional units communicate with each other by means of a common transmission protocol. The device has a microcontroller (110), which is assigned at least one clock generator (120) and one memory unit (150), and which is connected at least to one data sink (130), which is designed to accept a received data bit-stream.Type: GrantFiled: September 11, 2006Date of Patent: June 10, 2008Assignee: ABB Patent GmbHInventors: Heiko Kresse, Andreas Stelter, Ralf Schaeffer
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Patent number: 7333547Abstract: Dynamic quantization methods and dynamic quantizers for quantizing soft outputs of an equalizer according to the channel condition in order to alleviate the computational load on a soft decision decoder. The dynamic quantizer assigns only a few bits to represent the equalized signals when the channel condition is good, thus reducing computational burden on the soft decision decoder.Type: GrantFiled: July 14, 2004Date of Patent: February 19, 2008Assignee: Benq CorporationInventors: Yi-Yuan Tsai, Hung-Yi Chen
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Patent number: 7317410Abstract: A digital modulator includes a quantizer and a mapper. The quantizer converts a dithered signal value to a voltage. The mapper provides a modulated signal based on the voltage received from the quantizer. The mapper may maintain a substantially identical average centroid for modulated signals provided by the mapper. In an aspect, the mapper is included in a feedback of the digital modulator. The digital modulator may include any number of mappers. For example, a mode selection switch may select one of a plurality of mappers to map a voltage level received from the quantizer to a respective digital sequence.Type: GrantFiled: January 27, 2006Date of Patent: January 8, 2008Assignee: Broadcom CorporationInventor: Kevin Lee Miller
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Patent number: 7295144Abstract: A quantizer has a plurality of decision blocks, each coupled from input to output, where each decision blocks output generates a binary value that is an unchanged decision block input if the decision block input is below the threshold input level divided by a power of 2, or the decision block subtracts a threshold divided by the power of 2 and passes this result as the decision block output. The quantizer output is formed from the bits of each comparison from each decision block. The threshold is developed from a channel noise variance which may be multiplied by a scale factor related to coding type and rate. In this manner, a large number of input bits to be quantized may be converted to a smaller number of quantizer output bits, while preserving the dynamic range information required to correctly decode signals passed through a communications channel having multi-path frequency selective fading.Type: GrantFiled: May 22, 2006Date of Patent: November 13, 2007Assignee: Redpine Signals, Inc.Inventors: Vaidyanathan Karthik, Partha Sarathy Murali, Sundaram Vanka
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Publication number: 20070229345Abstract: A method and apparatus to quantize and dequantize an input signal, and a method and apparatus to encode and decode an input signal. The method of quantizing an input signal includes determining a quantization scale type according to a distribution feature of the input signal, and quantizing the input signal according to the determined quantization scale type. Accordingly, when a number of assigned bits is small in an encoding process, signal distortion can be minimized without an increase in complexity or having to use large sized additional information in order to determine an optimum scale. In addition, the input signal can be encoded by considering a trade-off of a distortion rate corresponding to the number of assigned bits of the input signal.Type: ApplicationFiled: October 17, 2006Publication date: October 4, 2007Applicant: Samsung Electronics Co., Ltd.Inventors: Junghoe Kim, Eunmi Oh, Anton Porov
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Patent number: 7239253Abstract: A sound codec including a compression portion and a decompression portion. The compression portion separates the incoming sound packet bandwidth into frequency sub-bands using a bank of infinite impulse response (IIR) filters. In accordance with the invention, the lower frequency signals are divided into more sub-bands than the higher frequency signals. Once the signals are divided into sub-bands, each sub-band signal is quantized. The resulting signals of all of the quantized sub-bands are then sent out over a communications link along with the filter state at the end of each sound packet. The decompression portion recombines the individual sub-band signals together (using a bank of infinite impulse response (IIR) filters) to form the audio data using the filter states to configure the reconstruction.Type: GrantFiled: September 16, 2004Date of Patent: July 3, 2007Assignee: Intel CorporationInventor: Karl Denninghoff
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Patent number: 7233624Abstract: An analog/digital gain control device avoid some of the requirements associated with the nature of a closed-loop AGC circuits and which meets the remaining requirements without much difficulty uses an analog to digital conversion method that increases the number of effective ADC bits by compressing the baseband input analog signal using a logarithmic circuit. After the compressed analog signal is converted into a digital signal, a digital anti-log process or look-up table (LUT) is used to expand the digital signal back to the original linear scale. The word size of the output of the anti-log process is larger than the input word size due to the nature of the anti-log function. To reduce the word size of the digital signal an open loop normalization technique can be applied.Type: GrantFiled: December 27, 2002Date of Patent: June 19, 2007Assignee: InterDigital Technology CorporationInventors: Leonid Kazakevich, Rui Yang
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Patent number: 7230559Abstract: The quantizer (2?) has an input network (5) which generates N different drive signals (Vij) as a function of the quantizer input signal (VI+?VI?). The input network (5) is designed in such a way that a value of the respective drive signal (Vij) which is greater than a comparison value indicates that the quantization threshold which is associated with the respective drive signal (Vij) has been exceeded. Furthermore, the quantizer has a switching network (9), which associates the N drive signals (Vij) with the N comparator inputs.Type: GrantFiled: March 31, 2006Date of Patent: June 12, 2007Assignee: Infineon Technologies AGInventor: Victor Da Fonte Dias
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Patent number: 7200501Abstract: A system that facilitates reducing uncertainty in a quantized signal. During operation, the system measures a quantized output signal from a sensor. Next, the system obtains an initial value for an uncertainty interval for the quantized output signal. The system then margins the quantized output signal high by introducing a controlled increase in the mean of the quantized output signal to produce a high-margined quantized output signal. Next, the system measures the high-margined quantized output signal from the sensor. The system then uses information obtained from the high-margined quantized output signal to reduce the uncertainty interval for the quantized output signal.Type: GrantFiled: August 1, 2005Date of Patent: April 3, 2007Assignee: Sun Microsystems, Inc.Inventors: Aleksey M. Urmanov, Kenny C. Gross
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Patent number: 7193554Abstract: According to an aspect of present invention, a quantizer is provided with reduced power consumption and area. Such a feature is attained by providing the input signal and a reference signal on input terminals of a pre-amplifier, and coupling the differential output terminals of the pre-amplifier to the gate terminal of respective transistors. The drain/source currents of the transistors are provided to a current latch, which generates the comparison result. The latches and transistors are replicated conveniently to interpolate additional reference values. The width to length (W/L) of the channels in each replicated set are set to different values to cause the reference signal to be at corresponding strength.Type: GrantFiled: March 14, 2006Date of Patent: March 20, 2007Assignee: Texas Instruments IncorporatedInventors: Preetam Charan Anand Tadeparthy, Jomy G Joy
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Patent number: 7146288Abstract: A method and apparatus for determining quantization error in data is disclosed. The method comprises gathering a plurality of data points, identifying a range of the data points, separating the data points into a plurality of segments, and estimating the quantization error by calculating the ratio between the data range and the quantity of segments. The apparatus comprises means for gathering a plurality of data points, means for identifying a range of the data points, means for separating the data points into a plurality of segments, and means estimating the quantization error by calculating the ratio between the range and the quantity of the segments.Type: GrantFiled: July 18, 2002Date of Patent: December 5, 2006Assignee: Johnson Controls Technology CompanyInventor: Henry L. Welch
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Patent number: 7123659Abstract: A digital reception apparatus includes a receiver that processes a received signal and a distortion corrector that corrects a non-linear distortion of the processed received signal, introduced by the receiver. The receiver may include an amplifier, a quadrature demodulator and/or a quantizer. The distortion corrector includes a distortion estimator that estimates the distortion and outputs a correcting signal based on an inverse distortion characteristic of the receiver, and a distortion compensator that multiplies the received signal and the correcting signal to remove the non-linear distortion from the received signal, to obtain a corrected received signal. The corrected signal is output to a demodulator, which performs demodulation processing on the corrected signal, and thereby obtains a demodulated signal.Type: GrantFiled: March 22, 2001Date of Patent: October 17, 2006Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Masayuki Orihashi, Katsuaki Abe, Job Cleopa Msuya, Shinichiro Takabayashi
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Patent number: 7049996Abstract: An apparatus comprising a first quantizer circuit, a memory and a second quantizer circuit. The first quantizer circuit may be configured to generate a first intermediate signal in response to (i) an input signal and (ii) a first scaling signal. The memory may be configured to (i) store the first intermediate signal and (ii) present a second intermediate signal, in response to an address signal. The second quantizer circuit may be configured to generate an output signal in response to (i) the second intermediate signal and (ii) a second scaling signal. The second quantizer circuit has a bit-width greater than the bit-width of the first quantizer circuit.Type: GrantFiled: November 12, 2004Date of Patent: May 23, 2006Assignee: Via Telecom Co., Ltd.Inventor: Qiang Shen
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Patent number: 7042004Abstract: The present invention discloses a quantum system comprising computational elements, consisting of an insulated ring of superconductive material, and semi-closed rings, which are used as an interface or input/output facility between the quantum bit and the external world. Faraday induction is used to provide electromagnetic coupling between adjacent computational elements and between the computational elements with interface elements of the quantum system. Therefore the corresponding magnetic flux acts as an information carrier. Ferromagnetic cores are used to improve the magnetic coupling between adjacent elements of the quantum system.Type: GrantFiled: June 20, 2003Date of Patent: May 9, 2006Assignees: Interuniversitair Microelektronica Centrum (IMEC), Katholieke Universiteit LeuvenInventors: Wim Magnus, Christoph Kerner, Wim Schoenmaker