Interdigital Signal Electrodes Patents (Class 348/293)
  • Patent number: 8373780
    Abstract: A solid-state image sensor includes: a transfer control section configured to control charge transfer from the vertical transfer section to the horizontal transfer section. The transfer control section has a plurality of unit control sections corresponding to the transfer packets. The unit control section has a vertical transfer channel and a plurality of control section electrodes formed over the vertical transfer channel. The control section electrodes include a signal charge accumulating electrode and a transfer inhibiting electrode, which are sequentially formed from a side of the vertical transfer section. The vertical transfer channels are independently connected to a horizontal transfer channel. When stopping the charge transfer from the vertical transfer section to the horizontal transfer section, a high-level voltage is applied to the signal charge accumulating electrode, and a low-level voltage is applied to the transfer inhibiting electrode.
    Type: Grant
    Filed: August 12, 2011
    Date of Patent: February 12, 2013
    Assignee: Panasonic Corporation
    Inventors: Koichi Yonemura, Sei Suzuki
  • Patent number: 8339490
    Abstract: An imaging device is disclosed. The device includes: a unit pixel that outputs an analog electric signal in accordance with a signal charge; a local voltage supply circuit that generates a local voltage different from an operation voltage; a reference signal generation section that generates a reference signal based on the local voltage provided by the local voltage supply circuit; and a processing section that converts, by referring to the reference signal generated by the reference signal generation section, the analog signal provided by the unit pixel into a digital signal. In the imaging device, the reference signal generation section keeps constant a load current of the local voltage supply circuit in an operating state.
    Type: Grant
    Filed: February 28, 2008
    Date of Patent: December 25, 2012
    Assignee: Sony Corporation
    Inventors: Hayato Wakabayashi, Yoshiaki Inada
  • Publication number: 20030052977
    Abstract: An apparatus which processes a digital image and a method therefor which can reduce an error when calculating an output value obtained by interpolating pixel values of the input digital image. The apparatus includes an interpolation processing unit which interpolates an input digital image, and a controller which measures an interpolation interval of pixel values of the digital image, calculates a coefficient by substituting the interpolation interval for a coefficient equation stored in a register, and calculates an interpolation node for the digital image by substituting the coefficient and an output pixel position value of the digital image for an interpolation node calculation equation. The controller controls the interpolation processing unit so as to interpolate the digital image to the interpolation node. As a result, it is possible to reduce an error between an interpolated output pixel position value and an output pixel position value for the pixel values of the input digital image.
    Type: Application
    Filed: August 23, 2002
    Publication date: March 20, 2003
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Woo-sung Shim, Sung-kyu Choi
  • Patent number: 6469687
    Abstract: In driver circuitry for driving an electro-optic display device having a row and column matrix array of pixels, including means for converting incoming digital display information signals into analog signals, sampling errors due to switch and column resistance and transmission delays are compensated by converting the digital samples for alternate columns (or rows) to analog signals having sampling errors of equal magnitude but opposite sign.
    Type: Grant
    Filed: December 28, 1998
    Date of Patent: October 22, 2002
    Assignee: Koninklijke Philips Electronics N.V.
    Inventor: Peter Janssen