Abstract: A method for the analog/digital conversion and an arrangement for the analog-to-digital conversion of an analog signal, particularly a picture signal, into a digital signal by at least two analog-to-digital converters which are clocked by at least two phase-shifted clock signals and whose output signals are combined to a digital picture signal by a multiplexer is disclosed. In order to achieve an individual adaptation to different characteristics of the analog-to-digital converters, each analog-to-digital converter is preceded by an automatic gain control circuit and a clamping stage, which clamps the picture signal at a given amplitude value, the analog signal being applied to the automatic gain control circuit and the clamping stage.

Abstract: A brightness control apparatus for a video display appliance which keeps the brightness of the picture uniformly over the whole screen by determining the amplification rate of the video signal to be displayed at the corners of the screen relatively higher than that to be displayed at its center.

Abstract: The present invention provides a clamp circuit for clamping a video signal which includes a sync tip clamp circuit, a pedestal clamp circuit, and a direct current electrical potential correcting circuit. The sync tip clamp circuit clamps a sync tip of the horizontal synchronization signal of the composite video signal at a first reference electrical potential when a clamp pulse is not received in a pulse input terminal, and outputs the composite video signal to an output terminal. The pedestal clamp circuit clamps the pedestal DC electrical potential of the composite video signal received to the video signal input terminal to the second reference electric potential when the clamp pulse is received at the pulse input terminal, and outputs the composite video signal to the output terminal.

Abstract: An image display system includes a display circuit which displays an image composed of a plurality of sub-images, an input circuit which inputs a certain image signal including at least one sub-image embedded in the certain image signal which is provided by at least one of fields and frames, a designating circuit which designates timings of composition positions of the sub-image on scan lines of the certain image, and one control circuit which controls at least one of an amplitude level and a DC level of image signals corresponding to an area of the sub-image detected by the timing designated by the designating circuit.

Abstract: A kinescope video driver includes a series connection of a main cascode transistor coupled to a cathode of a cathode ray tube and a video signal amplifying transistor. A second cascode transistor is coupled between the main cascode transistor and the video signal amplifying transistor. The second transistor is coupled to the video signal amplifying transistor through a short wire conductor and to the main cascode transistor through a long wire conductor.

Abstract: A signal processor circuit which stabilizes a clamp processing of black levels even in an endoscope system of an all-pixels readout type and prevents image qualities from being degraded at a stage to shift from a still image to a moving image in particular. In this signal processor circuit, video signals of all picture elements obtained with a single exposure are read out of a CCD, odd line data is stored into a first memory, even line data is stored into a second memory, and mixed picture element signals are generated by a mixer circuit, whereafter a predetermined image processing is performed by a first DVP. A clamp circuit and an A/D converter are disposed at stages preceding the first and second memories, a through video signal output from the A/D converter is input into the first DVP by way of a selector circuit on the basis of an optical black pulse and a black level clamp signal generated on the basis of the through video signal is fed back to the clamp circuit.

Abstract: Video signals to be displayed are applied via a video driver amplifier to the cathode electrode of a kinescope. A beam current sensor, also coupled to the cathode electrode, provides a beam current indicating signal. An AKB regulator, responsive to the beam current indicating signal, supplies a black level correction signal to the driver amplifier for regulating the black level of images displayed by the kinescope. A screen grid supply system is provided for controlling the G-2 (screen grid) voltage of the kinescope as a predetermined function of the black level correction signal thereby forming with the AKB regulator a dual feedback loop for providing black level regulation by both the driver amplifier and the screen grid thereby maximizing or extending the overall black level control range.

Abstract: A video signal clamping circuit for maintaining a constant clamping output level is disclosed including a clamper for generating a clamping output level in response to a reference voltage by use of an external condenser receiving a video signal and a plurality of transistors, a level variation detector for sensing a variation the clamping output level of the clamper and generating a level variation signal corresponding to the variation in the clamping output level, and a reference voltage compensator connected to the level variation detector, for receiving the level variation signal and compensating for the reference voltage of the clamper.

Abstract: A visual image signal processing apparatus includes: an overlaying unit for overlaying a brightness reference signal at a predetermined position in a fly-back period of an input visual image signal; a first clamping unit for clamping an output from the overlaying unit at a predetermined clamping voltage; a detecting unit for applying an output from the first clamping unit to a driving electrode of a cathode ray tube and for detecting a beam current flowing based on the brightness reference signal overlaid in the input visual image signal; and a second clamping unit for controlling the predetermined clamp voltage based on the beam current detected by the detecting unit.

Abstract: A video signal clamping circuit for adapting the DC level of a composite video signal to the processing range of a digital video signal processing device, includes an isolating capacitor in the analog video signal path and a controlled current source which is connected to a floating isolating-capacitor terminal and charges or discharges the isolating capacitor solely by means of a positive or negative clamping current, with the value and sign of the clamping pulses being digitally controlled by a comparator circuit which compares predetermined reference values of the composite video signal with mode-dependent comparison values.

Abstract: An image-signal clamping circuit processes image signals obtained from a solid state image sensor provided at a distal end of an electronic endoscope which do not have a direct-current component to restore a direct-current component thereof. The clamping circuit is arranged such that the restoration of a direct-current component of an image signal can be properly and stably carried out. The clamping circuit includes a sample-and-hold circuit to temporarily store an image signal, an analog-to-digital converter to output digital image signals, a device for digitally correcting the digital image data, and a digital-to-analog converter to output corrected analog image signals. The pedestal level of the corrected output analog image signal approximates a reference pedestal level.

Abstract: Control circuits for the cut-off and drive control of video equipment. A first control device includes a cut-off control circuit and drive control circuit for use in conventional modes. A second control device includes a cut-off control circuit for mode switching and a drive control circuit for mode switching, independent of the first control device. The cut-off and drive adjustments made for every mode switching operation are unnecessary, and the mode switching based on off set data is possible.

Abstract: A configurable video output channel architecture includes a plurality of parallel video pipelines arranged to drive a video display; a device for selecting an output of one of the video pipelines and generating a readback signal representative thereof; and a device for adjusting a display specification of at least one of the video pipelines using the readback signal. The display specification adjusted may include the maximum video level, the blanking level, and the sync level of the video waveform. The adjusting device may also adjust the characteristic impedance of each pipeline. The selecting device includes a multiplexer and an analog to digital converter, and the adjusting device includes a controller which monitors the readback signal and generates a control signal to adjust the display specification if the readback signal is outside of a desired range.

Abstract: A processing system operates on data words each having first and second portions. A first memory stores the first portion of a first data word accessible by a first set of address bits received at first address inputs and a second set of address bits received at second address inputs, and stores the second portion of a second word accessible by the first set of address bits received at the first address inputs and a third set of address bits received at the second address inputs. A second memory stores the first portion of the second data word accessible by a first set of address bits received at first address inputs and a second set of bits received at second address input, and stores the second portion of the first word accessible by the first set of address bits received at the first address inputs and a third set of address bits received at the second address inputs. A first access mode accesses a selected one of the first and second portions of both the first and second words.

Abstract: A clamp signal generation-control circuit includes a clamp signal controller for discriminating the existence of a sync on green signal and a separate sync signal supplied from a video card to a monitor to output a control signal according to the discrimination, and a clamp signal generator for automatically changing a generated point of the clamp signal, and a method for controlling the circuit is also provided. The generated point of the clamp signal supplied to the monitor is controlled to automatically shift the clamping position of a video signal, thereby preventing malfunction caused by a nonprofessional user's manipulation, abnormal picture display or the generation of a segment phenomenon. The circuit is adoptable to monitors supplied with various kinds of sync signals.

Abstract: An image signal processing device is arranged to convert an analog image signal into a digital image signal after the analog image signal is clamped, to separate, in the form of a digital signal, a synchronizing signal from the digital image signal and to control a clamping action on the analog image signal according to a state of the separated digital synchronizing signal. The arrangement enables the device to always stably perform the clamping action.

Abstract: A circuit arrangement for processing an input video signal (V) is described, which video signal has a fixed black level (SP), a given white peak value (WW) as well as a black peak value (SW) dependent on the picture contents (during tb), in which a correct display of the blackest and brightest parts of the picture contents of the video signal (V) is rendered possible without many components and without interference.

Abstract: An RGB preamplifier for a video display includes respective multipliers independently operable for adjusting the contrast of input primary and secondary video signals. The contrast adjusted video signals are added to form a combined display signal, the combined signal being applied to the first inputs of primary and secondary comparators each of which is also supplied with a respective reference DC level. The primary and secondary video signals are alternately nulled at horizontal line rate by nulling the corresponding multipliers. The primary comparator samples the combined signal when the secondary signal is nulled for clamping the DC level of the primary signal in relation to the primary reference DC level and the secondary comparator samples the combined signal when the primary signal is nulled for clamping the DC level of the secondary signal in relation to the secondary reference DC level.

Abstract: An image signal processing apparatus wherein the black level of an analog image signal is adjusted by controlling the clamp level of the inputted analog image signal. The clamped analog image signal is digitalized. Using the digital image signal offset to a first level during the blanking period, the black level adjustment of the analog image signal is carried out. The first level during the blanking period of the digital image signal corresponding to the analog image signal with the black level having been adjusted, is changed to a second level, allowing a correct and easy black level adjustment using a simple circuit arrangement.