Abstract: To make it possible to receive a modulated signal which is obtained by suppressing a carrier signal such as a high definition TV signal which is digitally demodulated such as QAM (quadrature amplitude modulation), a receiver of the double super-heterodyne system having the first and second mixers 9 and 13 is a basic constitution. A band pass filter having a flatness in pass band and a small deviation of group delay which will prevent the demodulation of a high definition TV signal from degradation is used a first intermediate frequency filter 11. An SAW filter is used as a second intermediate frequency filter 16. The third mixer 28 for converting a second intermediate frequency signal to a third intermediate frequency signal in frequency is installed and the frequency of the third intermediate frequency signal to be converted is set to a value lower than the frequency of the second intermediate frequency signal.

Abstract: An HDTV receiver is disclosed including a tuning portion for selecting one of a plurality of RF signals received, and converting a selected RF signal into an intermediate frequency signal; a demodulator/FPLL for demodulating the intermediate frequency signal output from the tuning portion into a baseband signal in which the frequency and phase are locked, and outputting an AFC signal; a first local oscillator for forming a frequency signal which can be varied from a reference frequency to a specific frequency, and outputting the thus-formed frequency signal to the demodulator/FPLL; and a VSB filter for VSB-filtering the baseband signal output from the demodulator/FPLL.

Abstract: An automatic fine tuning (AFT) circuit used for processing an image intermediate frequency signal for a video display device. The AFT circuit, which produces an automatic fine tuning signal, by which an image intermediate frequency signal maintains a constant carrier center frequency, includes a phase shift device for performing a phase shift of 90.degree. in the state of the constant carrier center frequency, a control current generating device for generating a control current in response to a variation of a variable resistor value, a resonant frequency variable device for varying a resonant frequency of the resonance circuit, by varying a capacitance to be resonated by the control current, and a phase detecting device for multiplying the image intermediate frequency signal by a phase-shifted image intermediate frequency signal, and for generating the automatic fine tuning signal.

Abstract: A frequency counter obtains frequency data by measuring the frequency of an optionally offset broadcast signal tuned by a tuner having a VCO. A microprocessor is used to determine the frequency difference between the optionally offset signal and the previously tuned signal based on the frequency data measured for each signal, and controls the oscillation frequency of the VCO for the tuner based on this frequency difference using a PLL circuit. The frequency is quickly changed to tune in the optionally offset broadcast signal.

Abstract: A dual mode AGC system for a television receiver in which data is in the form of symbols occurring at a fixed symbol rate. The symbols are sent in successive data segments, each having a sync character. Enablement of an AFC Defeat signal defines an initial interval during which the IF gain is maximum. When the AFC Defeat signal becomes inactive, the receiver is operated in a non-coherent mode in which the gain of the IF amplifier is reduced incrementally whenever the IF signal exceeds a clipping level for a period of eight successive symbol clocks. Upon a segment sync lock condition occurring, a normal coherent mode is entered in which the AGC responds to a signal characteristic, i.e. data segment sync. The rate of gain change available in the non-coherent mode-is much greater than that in the normal coherent mode.

Abstract: Circuit arrangement for demodulating a video signal (IF signal) which is frequency-modulated on an intermediate-frequency carrier oscillation, including a first demodulation stage (a frequency or phase demodulator) for multiplicatively combining the IF signal with a carrier oscillation of a controllable oscillator and for supplying a first output signal, a second demodulation stage (a frequency or phase demodulator) for multiplicatively combining the IF signal with the carrier oscillation phase-shifted by a quarter period of the intermediate-frequency carrier oscillation, and for supplying a second output signal, a first filter stage for low-pass filtering the first output signal and for supplying a third output signal, a multiplier stage for multiplicatively combining the second output signal and the third output signal to form a fourth output signal, a superposition stage for forming a seventh output signal by additively combining a fifth output signal and a sixth output signal derived from the second outpu

Abstract: To provide a picture intermediate frequency circuit capable of preventing the occurrence of intermodulation beats in a strong electrical field, without affecting in any way the original picture signal. A picture intermediate frequency signal output from the tuner 2 is supplied to a pre-amplifier 5 via an adjacent sound trap circuit 4, and picture trap circuits 11 and 12, both of which are connected in series. Trap circuits 11 and 12 have an attenuation point in the upper and lower frequency components, respectively, equivalent to the frequency difference of the adjacent picture signal frequency with respect to the picture intermediate frequency signal, and trap the .+-.6 MHz frequency components of the picture intermediate frequency signal. This allows the trap circuits 11 and 12 to remove unnecessary adjacent picture signals before they reach the pre-amplifier 5.

Abstract: For the purpose of a high precision frequency fine tuning, for example, to a certain television channel, an analog circuit, the frequency of which can be balanced, for example, an demodulator, is balanced in an integrated circuit with the help of a control current. The control current generated in a regulating loop is dependent on a reference frequency with the appropriate accuracy and on a reference frequency with the appropriate accuracy and on a reference capacitancy integrated on the chip. After selecting a frequency, the analog circuit is calibrated and the frequency is subsequently fine-tuned in a measuring mode. Following that, the analog circuit operates in the normal mode.

Abstract: An improved television signal equalization apparatus includes a first coefficient update module for receiving the equalized television signal and for generating a first updated equalizer coefficients including first coarsely updated coefficients and finely updated coefficients; and a second coefficient update module, at a channel change operation, for generating second updated coefficients having a coarsely updated coefficients corresponding to a changed channel.

Abstract: A free running frequency alignment method in a video display having a sync generator comprising a first oscillator having a first frequency and a second oscillator having a second frequency. The first oscillator is phase modulated by the second oscillator which has a free running frequency different from a standard frequency. The free running frequency of the first oscillator is to be controllably aligned to the standard frequency by a method comprising the steps of applying a frequency determining initial control value to the first oscillator and measuring an average free running frequency responsive to the initial control value. An absolute difference frequency is calculated between the average frequency and the standard frequency. The absolute difference frequency is tested for a frequency value less than a predetermined value which signifies an aligned condition. If the difference frequency is less than the predetermined value the alignment is complete.

Abstract: An oscillator provided with an oscillation circuit provided with two oscillation transistors comprising a differential pair and a resonance circuit connected in common to the bases of the oscillation transistors. The bases of the oscillation transistors are short-circuited by a coil, a center tap coil is connected in parallel to the resonance circuit, and variable capacitive diodes in the resonance circuit are driven by a coil connected to a mixing circuit. Due to this, it is possible to prevent the occurrence of low frequency noise, possible to realize a completely balanced operation, possible to avoid the oscillation carrier flowing into the power source and ground, and possible to reduce the noise in a television picture.

Abstract: An apparatus and a method for extending a pulling range of automatic fine tuning of a television receiver. An initial tuning voltage is applied to a tuner when a channel switching operation is performed or the television receiver is powered on. The tuning voltage to the tuner is controlled by bands as a result of comparison of an automatic fine tuning voltage of a specified channel with a first predetermined reference voltage. If the automatic fine tuning voltage is higher than the first predetermined reference voltage, it is checked whether the automatic fine tuning voltage is within a desired range. The tuning voltage to the tuner is controlled by the bands if the automatic fine tuning voltage is not within the desired range, to maintain the automatic fine tuning voltage within the desired range. Presence of a synchronous signal of the specified channel is checked if the automatic fine tuning voltage is within the desired range.

Abstract: A superheterodyne receiver has a receiver circuit formed into a single semiconductor chip comprising a pseudo band-pass filter employing components equivalent to those of an intermediate-frequency filter of the receiver circuit and an oscillation circuit employing the pseudo band-pass filter as a feedback path thereof.The oscillation circuit oscillates at a frequency equal in value to the center frequency of the intermediate-frequency filter. The semiconductor chip is further equipped with a PLL circuit allowing the frequency-division ratio of a variable frequency-divider circuit to be varied in order to control a reception frequency, and the oscillation frequency of the oscillation circuit is monitored. Data representing the reception frequency is derived from the monitored oscillation frequency and the value of the frequency-division ratio of the variable frequency-divider circuit, and then output to a display element to display the reception frequency.

Abstract: In a television receiver in which image frequency signals for desired signals are removed when television broadcasting signals are frequency-converted through a local oscillator and mixers, the local oscillator generates biaxial orthogonal signals to be frequency-converted by respective mixers, an output signal of one mixer being phase-shifted to be added to an output signal of the other mixer so as to thereby offset only the image frequency signals. The local oscillator and a phase shifter operate so as to follow the frequency change of the intermediate frequency signal so as to thereby stabilize the suppression of the image frequency signal.

Abstract: A double conversion frequency converter includes first and second mixing stages. The first mixing stage includes a first programable Local Oscillator (LO) synthesizer and a first mixer, and the second mixing stage includes a second programable LO synthesizer and a second mixer. The first and second LO synthesizers have a wide band tuning range for receiving a separate predetermined reference signal and generating therefrom first and second LO output signals, respectively, which each are changeable by predetermined large frequency steps. The first mixer mixes an input signal to the frequency converter with the first LO output signal for generating a first predetermined mixer output signal. The second mixer mixes a predetermined sideband generated in the first predetermined mixer output signal with the second LO output signal for generating a second predetermined mixer output signal which is use for the output signal for the frequency converter.

Abstract: A video detector has a PLL, a bias circuit, a synchronous detector for detecting a video IF signal by using the output of a VCO, and a lock detector for detecting whether the PLL is locked. The PLL has the VCO, a phase comparator, and a low-pass filter. In the video detector the supply of the direct current from the bias circuit is halted while said lock detector detects that the PLL is locked.

Abstract: A receiver such as a liquid crystal display television receiver, which a user carries with him, is used for learning at sight which television stations at a destination supply broadcasting service. The receiver performs automatic tuning operation of television signal waves to search available television channels, stores searched available television channels in a memory device, and displays a list of the available stored television channels. The receiver displays the available television channels stored in the memory device, and successively receives the available television channels, thereby displaying the television programs for a predetermined period. The receiver is equipped with a memory in which local areas, local television stations in the areas, frequency data and network relations between key stations and the local television stations are memorized.

Abstract: In a television receiver a downconverter responding to a selected television signal respectively supplies its first and second output signals as the input signals of first and second IF amplifiers, respectively. The downconverter includes a local oscillator for generating oscillations at a frequency controlled in response to the AFT signal. The first IF amplifier includes a first adjacent-channel sound carrier trap, in consequence whereof the first-IF-amplifier response is substantially reduced for the downconverted picture carrier, and an in-channel sound carrier trap. Responsive to the first-IF-amplifier response, a video detector generates a composite video signal in which sound beats are suppressed to relatively low level by the first adjacent-channel sound carrier trap.

Abstract: The disclosed method for reducing HRC mode reception time of CATV signals is intended for television receivers or video tape recorders provided with a CATV receiver suitable for the North American CATV system but not provided with a CATV mode (STD, HRC and IRC) selection switch. If a channel is selected, corresponding modulation frequency data is transmitted to a tuner. Subsequently, the video signal is checked for the presence of synchronizing signals, and this information is used to determine whether the broadcast is in STD mode or in HRC mode, prior to broadcast signal reception. This eliminates waiting time, reducing HRC mode reception time to only about 100 ms (the time needed to check for the presence of the synchronizing signals), and prevents noises from being generated as well as improving reception quality.

Abstract: A double conversion tuning system for a high definition television receiver includes a microprocessor supplying first and second digital numbers to first and second local oscillators. The first local oscillator is controlled by a wide band phase locked loop that includes a programmable divider that receives the first digital number from the microprocessor and a prescaler that couples the first local oscillator signal to the programmable divider. The output of the programmable divider supplies one input of a phase detector, the other input of which is supplied with the divided down output of a crystal reference source. The output of the phase detector controls the first local oscillator frequency. The tuning of the first local oscillator is coarse and the first IF signal frequency may deviate within a predetermined range from a desired value.

Abstract: In a CS broadcast receiving system, when a station is to be selected, an AFC process is first performed with the frequency in the tuning circuit adjusted in units of a coarse frequency adjustment value for reception of a CS television broadcast signal. When a receive signal to be selected by the tuning circuit is not the CS television broadcast signal, the AFC process is performed with the frequency in the turning circuit adjusted in units of a fine frequency adjustment value for reception of a CS.With this arrangement, it is made possible to increase the tuning accuracy when tuning in to the CS sound broadcast signal, while the time required for tuning is shortened and the waiting time reduced when tuning in to the CS television broadcast signal and, thereby, both the requirements for reception of the CS sound broadcast signal and for reception of the CS television signal can be satisfied.

Abstract: A dual HDTV/NTSC receiver includes a microprocessor for controlling a tuner for synthesizing the carrier frequencies of HDTV signals and NTSC signals. The HDTV signals are inherently of much lower power than the NTSC signals. The tuner initially synthesizes the carrier frequency of a desired HDTV signal which is attempted to be detected in an narrow band synchronous detector. Detection of the HDTV signal produces a high lock detect signal which causes the microprocessor to enable an HDTV processing channel. If no HDTV signal is detected, the lock detect signal remains low and the microprocessor controls the tuner for synthesizing the carrier frequency of the NTSC co-channel television signal. A high lock detect signal from the narrow band synchronous detector, indicating detection of the NTSC co-channel causes the microprocessor to enable the NTSC processing channel. A system for automatically programming the receiver and memorizing which type signal is present on each television channel is also shown.