Interlacing Patents (Class 348/793)
  • Patent number: 9626929
    Abstract: A liquid crystal panel driving apparatus that produces a normal display without damaging the liquid crystal panel even when each of a plurality of timing controllers receives an abnormal display data signal. In an exemplary apparatus, each of the timing controllers transmits an abnormality detection signal, which is generated by detecting an abnormality in the display data signal, to other timing controllers via an abnormality detection line, and each of the timing controllers outputs image data associated with the abnormality detection signal stored in an image data memory.
    Type: Grant
    Filed: December 12, 2008
    Date of Patent: April 18, 2017
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Atsushi Yusa
  • Patent number: 8792053
    Abstract: An image processing apparatus includes: a normal interpolated image generation unit to generate an image that is interpolated between a plurality of original images reproduced along time series, the image being a normal interpolated image, based on each of the plurality of original images; a high-frequency area extraction unit to extract a high-frequency area having a spatial frequency higher than a predetermined value in each of the plurality of original images; a high-frequency area interpolated image generation unit to generate an image that is interpolated between the plurality of original images, the image being a high-frequency area interpolated image, based on a change in position of the high-frequency area along with an elapse of time on the time series and on each of the plurality of original images; and a combination unit to execute combining processing to combine the normal interpolated image and the high-frequency area interpolated image.
    Type: Grant
    Filed: December 10, 2013
    Date of Patent: July 29, 2014
    Assignee: Sony Corporation
    Inventors: Shigeo Fujishiro, Yoshito Suzuki, Eiji Ozeki, Kazuhiro Takahashi, Takayoshi Fujiwara
  • Patent number: 8773585
    Abstract: A method for identifying state of macro block of de-interlacing computing and an image processing apparatus are provided, the method is as follows. A video frame is divided into a plurality of regions, where each of the regions includes a plurality of macro blocks. Then, a basic threshold corresponding to each of the regions is provided according to a position of each of the regions in the video frame, and a first macro block is identified to be a first type macro block or a second type macro block according to the basic threshold corresponding to one of the regions where the first macro block of the macro blocks locates. Then, a corresponding de-interlacing computing step is performed on the first macro block according to an result that the first macro block is identified as the first type macro block or the second type macro block.
    Type: Grant
    Filed: January 23, 2013
    Date of Patent: July 8, 2014
    Assignee: ALi (Zhuhai) Corporation
    Inventors: Jin-Song Wen, Feng Gao, Jin-Fu Wang
  • Patent number: 8368624
    Abstract: A display method with interlacing reversal scan and a device thereof are provided. The scan mode is interlacing reversal scan. Thus, in time and space, each color frame with poor luminance response can be alternately distributed on up-side and the down-side region of the frame instead on low-side region of the frame. Then, during the period of continuous frame displaying, the present invention may balance color distribution between the up-side and the down-side region, and effectively reduce the flicker phenomenon of the frame.
    Type: Grant
    Filed: February 5, 2008
    Date of Patent: February 5, 2013
    Assignee: Chunghwa Picture Tubes, Ltd.
    Inventors: Jhen-Shen Liao, Kuan-Hung Liu, Yi-Nan Chu
  • Patent number: 8330856
    Abstract: A display apparatus and a driving method thereof capable of assuring reliability in frame inversion driving and improving cinema video image quality are provided. To accomplish this, a display apparatus of the embodiment replaces at least one of a plurality of frame images obtained by doubling the frame rate, with a different image before display. Specifically, the display apparatus replaces at least one of the double-speed converted plural frame images with a high-frequency emphasized image and at least one with a low-frequency component image, and displays the frame images. Furthermore, the display apparatus replaces an image at the border between cinema images with a different image before displaying.
    Type: Grant
    Filed: June 1, 2009
    Date of Patent: December 11, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yukihiko Sakashita, Ryosuke Mizuno, Kiwamu Kobayashi
  • Patent number: 8253651
    Abstract: A display apparatus and a method for driving a display panel thereof are provided. Each column of data line in the display panel has two sub-data lines. The driving method is described as follows. An input image signal is divided into a plurality of image segments, and each of the image segments has display data of pixels coupled to two adjacent scan lines. Every K image segments are defined as a group. An image signal is formed by inserting a reset data in each group of image segments. Display data of a first group are written in K batches according to a first start wave. After a predetermined time from the first start wave, the scan lines corresponding to the first group are driven at the same time according to a second start wave, and the reset data is output to the first sub-data lines and the second sub-data lines.
    Type: Grant
    Filed: August 22, 2007
    Date of Patent: August 28, 2012
    Assignee: Novatek Microelectronics Corp.
    Inventor: Feng-Ting Pai
  • Patent number: 8018419
    Abstract: A data driver includes a capture start timing setting register in which is set data for setting capture start timing of the gray-scale data based on a signal which indicates supply start timing of the gray-scale data, and a capture instruction signal generation circuit which generates first and second capture instruction signals which are delayed in relation to the signal which indicates the supply start timing of the gray-scale data for a period corresponding to the data set in the capture start timing setting register. First and second data latches capture gray-scale data on a gray-scale bus at timing based on the first and second capture instruction signals, respectively. First and second driver circuits drive comb-tooth distributed data lines belonging to first and second groups based on the gray-scale data captured in the first and second data latches, respectively.
    Type: Grant
    Filed: August 6, 2007
    Date of Patent: September 13, 2011
    Assignee: Seiko Epson Corporation
    Inventors: Akira Morita, Yuichi Toriumi
  • Patent number: 7973755
    Abstract: A data driver drives comb-tooth distributed data lines of an electro-optical device in units of a predetermined number of data lines. The data driver includes first and second divided gray-scale buses, a gray-scale bus to which gray-scale data is supplied corresponding to an arrangement order of each of the data lines, a gray-scale data distribution circuit which distributes and outputs the gray-scale data supplied to the gray-scale bus to the first and second divided gray-scale buses, a first driver circuit which drives the data lines belonging to a first group among the data lines based on the gray-scale data output to the first divided gray-scale bus by the gray-scale data distribution circuit, and a second driver circuit which drives the data lines belonging to a second group among the data lines based on the gray-scale data output to the second divided gray-scale bus by the gray-scale data distribution circuit.
    Type: Grant
    Filed: August 6, 2007
    Date of Patent: July 5, 2011
    Assignee: Seiko Epson Corporation
    Inventors: Akira Morita, Yuichi Toriumi
  • Patent number: 7847776
    Abstract: A drive circuit for driving an electro-optical device where the scanning-line driving unit and the data-line driving unit drive, in a surface inversion manner, with a first cycle, the pixel portions in odd partial surfaces in a direction parallel to the data lines among 2M (where M is a natural number) partial surfaces resulting from dividing the display surface by division lines corresponding to the scanning lines, each partial surface including n (where n is a natural number greater than or equal to 2) scanning lines, and drive the pixel portions in even partial surfaces among the 2M partial surfaces in the surface inversion manner with a second cycle complementary to the first cycle.
    Type: Grant
    Filed: January 10, 2006
    Date of Patent: December 7, 2010
    Assignee: Seiko Epson Corporation
    Inventor: Kenya Ishii
  • Patent number: 7375716
    Abstract: A display driver which drives a plurality of data lines of an electro-optical device includes a capture start timing setting register in which is set a period between a changing time of a given capture start timing instruction signal and a staring time of capturing the gray-scale data, and shift start signal generation circuit which generates a shift start signal based on a setting state of the capture start timing setting register. The display driver includes a shift register which shifts the shift start signal based on a given shift clock signal, and outputs a shift output, and a data latch which includes a plurality of flip-flops, each of which holds the gray-scale data based on the shift output from the shift register, and outputs a data signal corresponding to the gray-scale data held in the data latch to the data lines.
    Type: Grant
    Filed: March 3, 2004
    Date of Patent: May 20, 2008
    Assignee: Seiko Epson Corporation
    Inventors: Yuichi Toriumi, Akira Morita
  • Publication number: 20080002069
    Abstract: A liquid crystal display device (1) according to the invention, when an image corresponding to an inputted video signal is a moving image complying with an interlace system, inserts a black signal as an interpolation signal into each of corresponding interlace non-scanning portions (101) without generating the interpolation signal from upper and lower side scanning lines with respect to a scanning line concerned for the video signal (100a or 100b). Alternatively, the interpolation signal generated from the upper and lower side scanning lines with respect to a scanning line concerned for the video signal can also be inserted into each of corresponding interlace non-scanning portions (101) instead of using the black signal.
    Type: Application
    Filed: December 27, 2006
    Publication date: January 3, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Hirotoshi Abe
  • Patent number: 7289170
    Abstract: Disclosed are an apparatus and a method for compensating for an interlaced-scan type video signal for stably displaying the video signal in the LCD panel. An aft part of 264th data of a first field and a fore part of 23rd data of a second field are stored in memories. A present video signal is determined whether the present video signal is a first field signal or a second field signal through an equalizing pulse period. If the present video signal is the first field signal, a fore part of 23rd data is copied to the first data field, and if the present video signal is the second field signal, the aft part of the 263rd data is added to the second field data. In case of a PLA-type video signal, first data represent 23rd data, and final data represent 313rd data.
    Type: Grant
    Filed: September 2, 2004
    Date of Patent: October 30, 2007
    Assignee: Boe Hydis Technology Co., Ltd.
    Inventor: In Han Jun
  • Patent number: 7262757
    Abstract: A data driver includes a capture start timing setting register in which is set data for setting capture start timing of the gray-scale data based on a signal which indicates supply start timing of the gray-scale data, and a capture instruction signal generation circuit which generates first and second capture instruction signals which are delayed in relation to the signal which indicates the supply start timing of the gray-scale data for a period corresponding to the data set in the capture start timing setting register. First and second data latches capture gray-scale data on a gray-scale bus at timing based on the first and second capture instruction signals, respectively. First and second driver circuits drive comb-tooth distributed data lines belonging to first and second groups based on the gray-scale data captured in the first and second data latches, respectively.
    Type: Grant
    Filed: April 29, 2004
    Date of Patent: August 28, 2007
    Assignee: Seiko Epson Corporation
    Inventors: Akira Morita, Yuichi Toriumi
  • Patent number: 7259741
    Abstract: A data driver drives comb-tooth distributed data lines of an electro-optical device in units of a predetermined number of data lines. The data driver includes first and second divided gray-scale buses, a gray-scale bus to which gray-scale data is supplied corresponding to an arrangement order of each of the data lines, a gray-scale data distribution circuit which distributes and outputs the gray-scale data supplied to the gray-scale bus to the first and second divided gray-scale buses, a first driver circuit which drives the data lines belonging to a first group among the data lines based on the gray-scale data output to the first divided gray-scale bus by the gray-scale data distribution circuit, and a second driver circuit which drives the data lines belonging to a second group among the data lines based on the gray-scale data output to the second divided gray-scale bus by the gray-scale data distribution circuit.
    Type: Grant
    Filed: April 29, 2004
    Date of Patent: August 21, 2007
    Assignee: Seiko Epson Corporation
    Inventors: Akira Morita, Yuichi Toriumi
  • Patent number: 6545653
    Abstract: Signals of odd lines in progressive scanning image signals in a first frame are extracted and displayed along odd lines on a matrix-type display device such as a liquid crystal display panel. Further, signals of even lines in progressive scanning image signals in a second frame successive to the first frame are extracted and displayed along even lines on the display device. Thus, one image of a frame is displayed on the display device in two frame periods so that one of the first and second steps is performed after the other thereof is performed. Alternatively, one of the signals of odd lines are displayed along two successive odd and even lines, while one of the signals of even lines are displayed along two successive even and odd lines. The display methods can be applied to a display panel having a larger number of scanning lines than a number of signal lines.
    Type: Grant
    Filed: July 13, 1995
    Date of Patent: April 8, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroshi Takahara, Tsutomu Muraji
  • Patent number: 6456337
    Abstract: In a moving image correcting circuit for a display unit wherein a motion vector detecting portion detects inter-frame motion vectors and a moving image correcting position corrects the display positions of subfields for pixels in blocks, based on the detection values, the picture quality is protected from being degraded by preventing the output of an erroneous motion vector due to noise in, or fluctuation of, the input image signal or else preventing the erroneous motion vector, even if output from the motion vector detecting portion, from entering the moving image correcting portion.
    Type: Grant
    Filed: August 27, 1999
    Date of Patent: September 24, 2002
    Assignee: Fujitsu General Limited
    Inventors: Masayuki Kobayashi, Masamichi Nakajima, Hayato Denda
  • Patent number: 6340959
    Abstract: In the display control device of the present invention, individual control signals are supplied to a liquid crystal display device and a television-signal encoder respectively from a reading circuit so that RGB data, stored in a display memory, is commonly used by those devices. Therefore, the number of data bus lines, that is, the number of terminals of the display control circuit, can be reduced to, for example, 18, namely, 6 for each of the colors of R, G and B; thus, the number of terminals for RGB data can be reduced to ½.
    Type: Grant
    Filed: November 19, 1998
    Date of Patent: January 22, 2002
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Yoshimitsu Inamori
  • Patent number: 6115020
    Abstract: A display device includes a display panel having display pixels arranged in matrix formation. A first driver circuit sequentially supplies image data to vertical lines of the display panel in synchronism with a first clock signal. A second driver circuit sequentially drives horizontal lines in synchronism with a second clock signal. A control circuit controls a drive timing at which the second driver circuit sequentially drives the horizontal lines so that identical image data equal to one horizontal line is supplied, from the first driver circuit in synchronism with the first clock signal, to two consecutive horizontal lines every N horizontal lines (N is an integer) in accordance with an enlargement ratio at which an image is enlarged in a vertical direction and is displayed on the display panel.
    Type: Grant
    Filed: October 4, 1996
    Date of Patent: September 5, 2000
    Assignee: Fujitsu Limited
    Inventors: Yoshihisa Taguchi, Katsunori Tanaka, Toshiya Onodera, Katsuhiko Kishida, Hirofumi Miyamoto, Hiroyuki Isogai, Tsutomu Kai, Masanori Nakamura
  • Patent number: 6020938
    Abstract: A matrix-type display device is a liquid crystal device having 240 vertical lines on a display screen, and is provided with a driving circuit which writes a signal simultaneously into two vertical lines in one in every three scanning lines of an EDTV2 signal, in which a number of scanning lines is 180 per field, when an image based on the EDTV2 signal is displayed on the display screen. As a result, a circuit having a complicated configuration is not required, and an image based on the EDTV2 signal can be displayed on the whole display screen of a liquid crystal module having 240 vertical lines without a non-image portion.
    Type: Grant
    Filed: March 6, 1997
    Date of Patent: February 1, 2000
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Moritaka Nakamura, Kouji Kumada, Yukihiro Nakahara
  • Patent number: 6008793
    Abstract: A drive apparatus capable of driving a self light-emitting display unit in an linear scanning mode based on video signals, obtained by interlaced scanning, while maintaining a high image quality. Two different image processes are performed on pixel data obtained by sampling interlaced scanning originated video signal, yielding image-processed pixel data and interpolation pixel data. The self light-emitting display unit is driven in an linear scanning mode by treating the image-processed pixel data as pixel drive data associated with one of an odd line and an even line of the self light-emitting display unit and treating the interpolation pixel data as pixel drive data associated with the other one of the odd line and even line.
    Type: Grant
    Filed: July 11, 1997
    Date of Patent: December 28, 1999
    Assignee: Pioneer Electronic Corporation
    Inventor: Tetsuya Shigeta
  • Patent number: 5898414
    Abstract: A display apparatus permitting high resolution and a large number of gray-scale levels and causing indiscernible flicker has been disclosed. One frame is divided into or composed of j subframes, and light is produced according to a luminance level predetermined subframe by subframe in order to express intermediate gray-scale of a picture. Emphasis is put on the fact that display to be performed during each subframe within one frame can be controlled independently. An interlaced-scanning display is carried out during k subframes associated with low-order weighted bits out of j subframes, and a noninterlaced-scanning display is carried out during the other j-k subframes associated with high-order weighted bits. The ratio of an addressing scan time to a subframe associated with a small weight is large, and the ratio of an addressing scan time to a whole frame is very large. If the addressing scan time can be reduced as mentioned above, a great effect would be exerted.
    Type: Grant
    Filed: May 30, 1997
    Date of Patent: April 27, 1999
    Assignee: Fujitsu Limited
    Inventors: Kenji Awamoto, Naoki Matsui, Tadatsugu Hirose, Fumitaka Asami
  • Patent number: 5739804
    Abstract: A liquid crystal display device having pixel selection switching elements in a one-to-one correspondence with pixels includes an interlace processing circuit for performing n (n is an odd number of 3 or larger): m (m is an arbitrary number equal to or smaller than n) interlace processing for a one-frame image signal, an n-fold rate converting device for performing n-fold rate conversion for the interlaced image signal, an image display for displaying an image by driving the pixel selection switching elements in accordance with the image signal subjected to the n-fold rate conversion, and a non-picture period processing means for disconnecting the n-fold rate converting device from the image display and performing desired processing for the image display during a non-picture period longer than a vertical blanking period.
    Type: Grant
    Filed: March 9, 1995
    Date of Patent: April 14, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Haruhiko Okumura, Go Ito
  • Patent number: 5654777
    Abstract: A method for controlling display video data on an LCD panel having a display matrix of pixels arranged in rows and columns and having a delta structure, which includes the steps of displaying the video data in its original (unchanged) form during a first field of the video data, and displaying the video data in a modified form during a second field of the video data, with alternate (e.g., odd-numbered) lines of the video data being shifted one pixel towards a first (e.g., right) side of the display matrix. A control circuit for implementing this method generates first and second control signals for controlling the operation of a column driving circuit which drives the columns of pixels of the display matrix in the appropriate manner.
    Type: Grant
    Filed: May 17, 1995
    Date of Patent: August 5, 1997
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Young-min Shin
  • Patent number: 5365284
    Abstract: In a liquid crystal display device for receiving television signals by an interlace scanning method, number of the rows of pixels and of scan signal lines on a liquid crystal panel is increased to be the same as the number of valid scan lines of 1 frame of television signals. The original video signals to be inputted to the device are compressed to 1/2, and interpolating signals are added to every line of the compressed signals to form pseudo video signals. Shift register operation of a scan driver and the segment driver are done twice as fast as that in the conventional device, and start timing of the shift register operation of the segment driver is controlled to be shifted by 1/2 horizontal scanning period between the even field and odd field, while the pseudo video signals are applied to the segment driver.
    Type: Grant
    Filed: December 31, 1992
    Date of Patent: November 15, 1994
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Toshio Matsumoto, Shuhei Yasuda, Tokutarou Kusada, Nobuyoshi Nagashima
  • Patent number: 5357290
    Abstract: A liquid crystal displaying panel is formed of a number of pixels in the horizontal and vertical directions based on a PAL system of many horizontal scanning lines. A polarity reversing circuit reverses the polarity of an input video signal at a predetermined period and a signal feeding circuit samples the video signal reversed in the polarity and holds it. The signal feeding circuit feeds the output to the respective data lines of the liquid crystal panel and can feed the output corresponding to the data lines of an NTSC video displaying region by a switch to the data lines corresponding to the blank part other than the NTSC system video displaying region.
    Type: Grant
    Filed: September 18, 1992
    Date of Patent: October 18, 1994
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Shigenobu Horibe
  • Patent number: RE48209
    Abstract: A display apparatus and a method for driving a display panel thereof are provided. Each column of data line in the display panel has two sub-data lines. The driving method is described as follows. An input image signal is divided into a plurality of image segments, and each of the image segments has display data of pixels coupled to two adjacent scan lines. Every K image segments are defined as a group. An image signal is formed by inserting a reset data in each group of image segments. Display data of a first group are written in K batches according to a first start wave. After a predetermined time from the first start wave, the scan lines corresponding to the first group are driven at the same time according to a second start wave, and the reset data is output to the first sub-data lines and the second sub-data lines.
    Type: Grant
    Filed: August 28, 2014
    Date of Patent: September 15, 2020
    Assignee: Novatek Microelectronics Corp.
    Inventor: Feng-Ting Pai