Abstract: In one embodiment, a Television (TV) receiver to perform a method of synchronizing a demodulator at a Viterbi decode input in the TV receiver using one or more bit de-interleaved even and odd Orthogonal Frequency Division Multiplexing (OFDM) symbols is provided. The method includes (i) performing a Viterbi decoding on the bit de-interleaved even and odd OFDM symbols when a frame boundary does not exist for the bit de-interleaved even and odd OFDM symbols, (ii) performing a convolutional encoding on an decoded data output of the Viterbi decoding, (iii) determining whether an output of the convolutional encoding of the bit de-interleaved OFDM symbols matches an input at a Viterbi decode, and (iv) determining whether the output of the convolutional encoding of the bit de-interleaved even and odd OFDM symbols matches with a SYNC pattern or a SYNC? pattern to obtain a RS packet align boundary.

Abstract: A Software Defined Radio (SDR) subsystem capable of supporting a multiple communication standards and platforms for modulation, demodulation and trans-modulation of an input signal is provided. The SDR subsystem includes a Signal Conditioning Cluster (SCC) unit that includes a signal conditioning CPU adapted for sample based signal processing, a Signal Processing Cluster (SPC) unit that includes a signal processing CPU adapted for block based signal processing, and a Channel Codec Cluster (CCC) unit that performs a channel encoding or a channel decoding operation.

Abstract: A modem for use with a computer having a demodulator and a decoder, the modem comprises a hardware interface; a demodulator front-end having a first input and a first output, the first output of the demodulator front-end being configured to interface with the demodulator of the computer and to provide a demodulated front-end signal to the demodulator over the hardware interface; and a forward error correction (FEC) unit having a second input and a second output, the second input of the FEC unit being configured to interface with the demodulator of the computer and to receive a demodulated signal from the demodulator over the hardware interface, the demodulated signal being a demodulation of the demodulated front-end signal, and the second output of the FEC unit being configured to interface with the decoder of the computer and to provide an FEC signal to the decoder over the hardware interface.

Abstract: A modem for use with a computer having a demodulator and a decoder, the modem comprises a hardware interface; a demodulator front-end having a first input and a first output, the first output of the demodulator front-end being configured to interface with the demodulator of the computer and to provide a demodulated front-end signal to the demodulator over the hardware interface; and a forward error correction (FEC) unit having a second input and a second output, the second input of the FEC unit being configured to interface with the demodulator of the computer and to receive a demodulated signal from the demodulator over the hardware interface, the demodulated signal being a demodulation of the demodulated front-end signal, and the second output of the FEC unit being configured to interface with the decoder of the computer and to provide an FEC signal to the decoder over the hardware interface.

Abstract: A digital IF demodulator includes an analog-to-digital (A/D) converter that receives an analog IF signal and converts it to a digital IF signal. A parallel multiplier then down-converts the digital IF signal to a baseband signal having a video component and an audio component. The frequency down-conversion uses a parallel multiplier driven by an outer feedback loop that corrects gross frequency errors in said digital IF signal. The digital IF demodulator also includes a video recovery circuit that selects the video component from the baseband signal and further down-converts the baseband signal to a video baseband using a video complex mixer driven by an inner feedback loop that corrects fast phase perturbations in the video recovery circuit. Finally, the digital IF demodulator includes an audio recovery circuit that (i) receives said baseband signal from the parallel multiplier, and (ii) down-converts the audio component to an audio baseband signal using an audio complex mixer.