Abstract: The disclosure features methods for generating a unique identifier, the methods including providing a dendritic structure, reading the dendritic structure to provide a signal, and generating a unique identifier from the signal.
Type:
Grant
Filed:
March 12, 2014
Date of Patent:
September 26, 2017
Assignee:
ARIZONA BOARD OF REGENTS, A BODY CORPORATE OF THE STATE OF ARIZONA ACTING FOR AND ON BEHALF OF ARIZONA STATE UNIVERSITY
Abstract: An in vivo drug concentration distribution measuring device for measuring, when a drug having an imaging function is administered, in vivo concentration distribution of the drug is disclosed.
Abstract: A method for manufacturing a phase change memory device that prevents or minimizes adverse performance characteristics associated with inadequate overlap between top electrode contacts and top electrodes. The method prevents or minimizes unwanted chemical changes and etch losses of the phase change material when building the top electrode. The method includes forming spacers on sidewalls of remaining portions of the insulation layer and the hard masks so that subsequent etching of the conductive layer and the phase change material layer uses the spacers and the hard masks as an etch mask to form top electrodes and a phase change layer. Accordingly, the method promises to provide a way of achieving a high level of integration for the resultant phase change memory devices.
Abstract: A method for identifying contaminants within a liquid hydrocarbon media containing contaminants includes adding an optical tag to a water wash, adding the tagged water wash to the liquid hydrocarbon media, emulsifying the liquid hydrocarbon media and analyzing the contaminants in the hydrocarbon media with a microscope. Methods for removing contaminants and evaluating treatment are also provided.
Type:
Application
Filed:
February 6, 2008
Publication date:
August 6, 2009
Inventors:
Cato R. McDaniel, Alan E. Goliaszewski, David B. Engel, Roy Hernandez-Mena
Abstract: In a semiconductor memory device, a die architecture is provided that arranges memory arrays into a long, narrow configuration. Bond pads may then be placed along a long side of a correspondingly shaped die. As a result, this architecture is compatible with short lead frame "fingers" for use with wide data busses as part of high speed, multiple band memory integrated circuits.