Abstract: The magnetic sensor can prevent an increase of a positional detection error of a subject/object even in the case of applying an external magnetic field with a magnetic field intensity exceeding a predetermined range. A magnetic sensor is equipped with a magnetoresistive effect element (MR element) 11 that can detect an external magnetic field and a soft magnetic body shield 12. The soft magnetic body shield(s) 12 are/is positioned above and/or below the MR element 11 in a side view, and the size of the MR element 11 is physically included within a perimeter of the soft magnetic body shield 12.

Abstract: A hard disk drive head slider housing a read-write transducer includes a plurality of electrical connection pads, where each electrical pad includes an interconnection portion configured for electrically connecting to an interconnected component, such as a lead suspension, a probe contact portion configured for electrical testing the head slider, and at least one slit positioned between the interconnection portion and the probe contact portion, thereby physically distinguishing and separating the two portions of a multiple-portion pad to inhibit undesirable solder flow to the wider probe contact portion on the slider side of each pad. A more controlled solder joint is provided, while the probe contact portion can remain relatively wide for probe contact and the interconnection portion can remain relatively narrow to reduce solder bridges among the pads.

Abstract: The magnetic sensor can prevent an increase of a positional detection error of a subject/object even in the case of applying an external magnetic field with a magnetic field intensity exceeding a predetermined range. A magnetic sensor is equipped with a magnetoresistive effect element (MR element) 11 that can detect an external magnetic field and a soft magnetic body shield 12. The soft magnetic body shield(s) 12 are/is positioned above and/or below the MR element 11 in a side view, and the size of the MR element 11 is physically included within a perimeter of the soft magnetic body shield 12.

Abstract: A clamping circuit comprises a first field-effect transistor (FET) having a gate, a source, and a drain, a diode, a first voltage source, and coupling circuitry configured to couple the first voltage source to the drain of the first FET and the diode to the source of the first FET.

Abstract: Reduction of the S/N in an output from a magnetic sensor using the magnetic impedance effect is suppressed. A magnetic sensor 1 is provided with a sensitive element 31 including: plural soft magnetic material layers 105; and a nonmagnetic amorphous metal layer 106 provided between the plural soft magnetic material layers 105, wherein the soft magnetic material layers 105 facing each other with the nonmagnetic amorphous metal layer 106 interposed therebetween are antiferromagnetically coupled to sense a magnetic field by a magnetic impedance effect.

Abstract: The present disclosure generally relates to a tape head and a tape drive including a tape head. The tape head comprises a first same gap verify (SGV) head assembly comprising a first media facing surface (MFS) and a plurality of first write transducer and first read transducer pairs, and a second SGV head assembly comprising a second MFS and a plurality of second write transducer and second read transducer pairs. During operation, when a tape or magnetic media moves in a first direction over the tape head, the tape contacts the second MFS and is spaced from the first MFS, and when the tape moves in a second direction opposite the first direction over the tape head, the tape contacts the first MFS and is spaced from the second MFS. As such, the tape contacts only one edge of either the first or second MFS during operation.

Abstract: The present disclosure generally relates to a magnetic media drive employing a magnetic recording head. The magnetic recording head comprises a first write head and a second write head each coupled to a first pad and a second pad of a slider pad and an electrical circuit coupled to the first and second pads. The first write head is a wide writing write head, and the second write head a narrow writing write head. The electrical circuit comprises a first sub-circuit and a second sub-circuit connected in parallel. The first sub-circuit comprises a capacitor and a connection to a first thermal fly height control (TFC) of the first write head. The second sub-circuit comprises an inductor and a connection to a second TFC of the second write head. The electrical circuit is further connected to a third TFC of a read head, the second write head comprising the read head.

Abstract: A system for magnetic anomaly detection is described. The system may include a nitrogen vacancy (NV) diamond material comprising a plurality of NV centers. A controller modulates a first code packet and controls a first magnetic field generator to apply a first time varying magnetic field at the NV diamond material based on the modulated first code packet. The controller modulates a second code packet and control a second magnetic field generator to apply a second time varying magnetic field at the NV diamond material based on the modulated second code packet, wherein the first code packet and the second code packet are binary sequences which have a low cross correlation with each other. The controller determines a magnitude and direction of the magnetic field at the NV diamond material, and determines a magnetic vector anomaly based on the determined magnitude and direction of the magnetic field.

Abstract: A light-trapping geometry enhances the sensitivity of strain, temperature, and/or electromagnetic field measurements using nitrogen vacancies in bulk diamond, which have exterior dimensions on the order of millimeters. In an example light-trapping geometry, a laser beam enters the bulk diamond, which may be at room temperature, through a facet or notch. The beam propagates along a path inside the bulk diamond that includes many total internal reflections off the diamond's surfaces. The NVs inside the bulk diamonds absorb the beam as it propagates. Photodetectors measure the transmitted beam or fluorescence emitted by the NVs. The resulting transmission or emission spectrum represents the NVs' quantum mechanical states, which in turn vary with temperature, magnetic field strength, electric field strength, strain/pressure, etc.

Abstract: ESD protection circuitry that includes one, or more, of the following features, characteristics and/or advantages: (i) use of different “diode types” (for example, Schottky type, PN type, p-type diode-connected field-effect transistor (FET) type, NFET type)) in a series-connected diode set (connected in series with respect to a device-under-protection) and a parallel-connected diode set (connected in parallel with respect to a device-under-protection and the series-connected diode set); (ii) a FET is connected in series with a target device such that the FET's gate can be turned on during normal operation and the FET's gate is resistively coupled to the FET's source; and/or (iii) two FETs are connected in series with a target device such both FETs gates can be turned on during normal operation, one FET's gate is resistively coupled to its source, and the other FET's gate is electrically coupled to its drain.

Abstract: A diamond probe is suitable to be attached to an Atomic Force Microscope and is created with a tip that incorporates a one or more Nitrogen Vacancy (NV) centers located near the end of the tip. The probe arm acts as an optical waveguide to propagate the emission from the NV center with high efficiency and a beveled end directs excitation light to the NV center and directs photoluminescence light emanating from the NV center into the probe arm. The probe tip is scanned over an area of a sample with an electric charge, such as a field effect transistor or flash memory. Optically Detected Spin Resonance (ODMR) is measured as the probe tip is scanned over the area of the sample, from which a characteristic of the area of the sample with the electric charge may be determined.

Abstract: An apparatus includes a slider of a recording head comprising a plurality of electrical bond pads coupled to bias sources and a ground pad. Each of a plurality of electrical components of the slider is coupled to at least one of the electrical bond pads. At least one of the electrical bond pads is a shared electrical bond pad coupled to at least two of the electrical components. At least one diode is coupled to at least one of the electrical bond pads and at least one of the electrical components.

Abstract: Providing for a solid state memory cell having a resistive switching memory cell with rectifier characteristics is described herein. By way of example, the solid state memory cell can have one or more layers creating a resistive switching device capable of achieving and maintaining different electrical resistances in response to different voltages applied to the solid state memory cell. Moreover, the solid state memory cell can comprise two or more layers creating a solid state diode device electrically in series with the resistive switching device. The solid state diode device can be configured to permit very low current through the solid state memory cell at voltages less than a breakdown voltage or reverse breakdown voltage. The rectifier characteristics can mitigate sneak path currents in a crossbar memory array, or similar array, facilitating greater sensing margin, reduced likelihood of memory errors, greater die concentration, fast switching times, and other benefits.

Abstract: A system for network routing based on resource availability. A network switching element (NSE) may be configured to provide status information to a controller. The controller may be configured to utilize the status information in determining control information that may be provided to the NSE. The NSE may further be configured to assign processing of information flows to processors in the NSE based on the control information. For example, the control information may contain minimum and maximum percent utilization levels for the processors. Information flows may be reassigned to processors that have available processing capacity from processors whose operation is determined not to be in compliance with the minimum and maximum levels. Moreover, inactive processors may be deactivated and alerts may be sent to the controller when the NSE determines that no available processing capacity exists to reassign the flows of processors whose operation is determined to be noncompliant.

Abstract: A slider that includes a slider body, the slider body having a trailing edge surface and an opposing leading edge surface; an air bearing surface (ABS) between the trailing edge surface and the leading edge surface; a read/write head located on the trailing edge surface of the slider body; an electrode array located on the trailing edge surface of the slider body, the electrode array including at least a first electrode and at least a second electrode; and first and second bias circuits, wherein the first bias circuit is electrically coupled to the at least first electrode and the second bias circuit is electrically coupled to the at least second electrode.

Abstract: Embodiments described herein generally relate to resistive shunt design in a read sensor for providing accurate measurements from an electronic lapping guide (ELG). More specifically, embodiments described herein relate to a transducer resistor shunt structure for low cost probing. A bleed resistor network for a read sensor may comprise one or more first resistors arranged in parallel with one another and a second resistor arranged in series with the one or more first resistors. The resistor arrangement may require a small physical area and reduce or prevent ELG measurement errors.

Abstract: A magneto-resistive (MR) sensor protection circuit is disclosed, for the protection of an MR sensor. The MR sensor may have a safe operating voltage range, a normal operating voltage range within the safe operating voltage range, and two terminals coupled to a read channel circuit, including a positive terminal and a negative terminal. The MR sensor protection circuit may have positive and negative protection threshold voltage ranges. The MR sensor protection circuit may also have a plurality of N-channel field-effect transistors (NFETs) that are coupled to the positive terminal and to the negative terminal, and configured to, in response to a voltage between the two terminals being within either the positive or the negative protection threshold voltage range, limit the voltage between the terminals by shunting current between the positive terminal and the negative terminal.

Abstract: Embodiments of the invention relate to electrostatic discharge (ESD) protection. One embodiment includes a first dissipative adhesive (DA) connected to at least a portion of multiple leads in a first plane of a flexible cable in a coverage area for providing ESD protection to at least one element of an electronic device. A common bus bar is connected to the leads in a second plane of the flexible cable. Conductivity of the common bus bar is greater than conductivity of the first DA and the first plane and the second plane are different planes of the flexible cable.

Abstract: An electrostatic discharge (ESD) device for protecting an input/output terminal of a circuit, the device comprising a first transistor with an integrated silicon-controlled rectifier (SCR) coupled between the input/output (I/O) terminal of the circuit and a node and a second transistor with an integrated silicon-controlled rectifier coupled between the node and a negative terminal of a supply voltage, wherein the silicon-controlled rectifier of the first transistor triggers in response to a negative ESD voltage and the silicon-controlled rectifier of the second transistor triggers in response to a positive ESD voltage.

Abstract: A crystal film with one or more nitrogen vacancy centers is placed in a magnetic field produced by a recording head and excitation illumination and a varying excitation field is applied. A confocal microscope or wide-field microscope optically detects a decrease in a spin dependent photoluminescence in response to the excitation illumination caused by electron spin resonance (ESR) of the at least one nitrogen vacancy center at varying excitation frequencies of the excitation field to measure Optically Detected Spin Resonance (ODMR). A characteristic of the recording head is determined using the ODMR.

Abstract: A write head for a magnetic storage device includes a writing tip comprising a magnetic material, a write pulse generator configured to generate a write pulse signal comprising a varying voltage bias between the magnetic storage device and the writing tip. The write pulse signal comprising one or more write pulses effective to tunnel electrons from the writing tip to the magnetic storage device. The data stream generator configured to provide a data stream signal to the writing tip where the data stream signal is operative to vary spin polarity in the electrons from a first polarity to a second polarity.

Abstract: A method to measure a magnetic field is provided. The method includes applying an alternating drive current to a drive strap overlaying a magnetoresistive sensor to shift an operating point of the magnetoresistive sensor to a low noise region. An alternating magnetic drive field is generated in the magnetoresistive sensor by the alternating drive current. When the magnetic field to be measured is superimposed on the alternating magnetic drive field in the magnetoresistive sensor, the method further comprises extracting a second harmonic component of an output of the magnetoresistive sensor. The magnetic field to be measured is proportional to a signed amplitude of the extracted second harmonic component.

Abstract: A method, apparatus, and system are provided for preventing electrostatic discharge (ESD) in hard disk drives using spin-torque oscillator (STO) for microwave assisted magnetic recording (MAMR). A control circuit adjusts a disk electrical potential with an electrical potential of a spin-torque oscillator (STO) element. The control circuit maintains a potential difference of less than about 115 millivolts (mV) between the disk and the STO element.

Abstract: A magnetic storage system includes a read and write device that (i) magnetically writes data on a platter, and (ii) reads, via a read element, the data written magnetically on the platter. The read element includes a first terminal and a second terminal. A transistor includes a gate. The transistor is closed responsive to the gate not receiving power. Responsive to the gate of the transistor receiving power, the transistor provides an open circuit between the first terminal and the second terminal. Responsive to the gate of the transistor not receiving power, the transistor shorts the first terminal to the second terminal. A first limiting circuit limits a first voltage of (i) the transistor and (ii) the first terminal. A second limiting circuit limits a second voltage of (i) the transistor and (ii) the second terminal.

Abstract: A magnetoresistive transducer head assembly includes a reader element, a writer element and a high impedance shunt electrically connecting the reader element and the writer element. The high impedance shunt provides a high impedance conductive path for maintaining electrostatic charge equipotential between the reader element and the writer element.

Abstract: An apparatus configured to create a resistive pathway for an electronic assembly is disclosed. In one embodiment, the pathway can be formed with a resistive film in conjunction with a conductive adhesive and a coverlay. In another embodiment, the resistive film, the conductive adhesive and the coverlay can be relatively transparent. In yet another embodiment, the resistive pathway can couple directly with traces on an electronic assembly saving space and easing assembly.

Abstract: Structures and methods are provided for nanosecond electrical pulse anneal processes. The method of forming an electrostatic discharge (ESD) N+/P+ structure includes forming an N+ diffusion on a substrate and a P+ diffusion on the substrate. The P+ diffusion is in electrical contact with the N+ diffusion. The method further includes forming a device between the N+ diffusion and the P+ diffusion. A method of annealing a structure or material includes applying an electrical pulse across an electrostatic discharge (ESD) N+/P+ structure for a plurality of nanoseconds.

Abstract: A system, in one embodiment, includes an ESD adhesive operatively coupled to leads of an electronic device for providing ESD protection thereto, the ESD adhesive including a mixture of a polymeric thin film and electrically conductive fillers dispersed in the polymeric thin film, and has a structural characteristic of being formed through at least partial evaporation of a solvent therefrom and being substantially free of agglomerates of the electrically conductive fillers. In another embodiment, a method for providing ESD protection to an element of an electronic device includes preventing formation of agglomerates of electrically conductive fillers in an ESD adhesive that includes a polymeric thin film, the electrically conductive fillers dispersed therein, and a solvent by subjecting the ESD adhesive to high-energy mixing during formation thereof, applying the ESD adhesive across exposed leads, such as leads of a cable, PCB, or other substrate, and evaporating solvent from the ESD adhesive.

Abstract: A structure for preventing Electrostatic Discharge (ESD) damage to a magnetoresistive sensor during manufacture. The structure includes a switching element that can be switched off during testing of the sensor and then switched back on to provide ESD shunting to the sensor. The switch can be a thermally activated mechanical relay built onto the slider. The switch could also be a programmable resistor that includes a solid electrolyte sandwiched between first and second electrodes. One of the electrodes functions as an anode. When voltage is applied in a first direction an ion bridge forms across through the electrolyte across electrodes making the resistor conductive. When a voltage is applied in a second direction, the ion bridge recedes and the programmable resistor becomes essentially non-conductive.

Abstract: Systems and methods are disclosed for securing a programmable integrated circuit device against an over-voltage attack. Generally, programmable devices, such as FPGAs, contain volatile memory registers that may store sensitive information. To prevent tampering and/or reverse engineering of such a programmable device, an over-voltage detection circuit may be employed to disable the device and/or erase the sensitive information stored on the device when an over-voltage attack is suspected. In particular, once the over-voltage detection circuit detects that the voltage applied to the programmable device exceeds a trigger voltage, it may cause logic circuitry to erase the sensitive information stored on the device. Desirably, the over-voltage detection circuit includes components arranged in such a way as to render current consumption negligible when the voltage applied to the programmable device, e.g., by a battery, remains below the trigger voltage.

Abstract: A perpendicular magnetic read head having a balanced capacitive coupling with the substrate. The read head includes a magnetoresistive sensor with first and second magnetic, electrically conductive shields separated from a substrate by a layer of non-magnetic, electrically insulating material. A dummy magnetic shield is formed on the non-magnetic electrically insulating layer and is electrically connected with the second magnetic, electrically conductive shield. The dummy shield is formed to have a capacitive coupling with the substrate that matches the capacitive coupling of the first magnetic, electrically conductive shield with the substrate.

Abstract: A read head circuit includes a read element configured to read data stored magnetically on a platter and includes first and second terminals. A write element writes data on the platter. A normally-ON transistor includes first, second and control terminals. The first and second terminals of the transistor are connected to a respective one of the first and second terminals of the read element. The control terminal receives a control voltage referenced from a power terminal. The power terminal powers the read element or the write element. Responsive to the control terminal being powered by the power terminal, the normally-ON transistor provides an open circuit between the first terminal of the read element and the second terminal of the read element. Responsive to the control terminal not being powered by the power terminal, the normally-ON transistor shorts the first and second terminals of the read element.

Abstract: An ultra-high voltage device has a high voltage path established from a high voltage N-well through a first metal layer to a second metal layer, and a contact plug electrically connected between the high voltage N-well and the first metal layer. The contact plug has a distributed structure on a horizontal layout to improve the uniformity of the ultra-high voltage device such that the current in the high voltage path will be more uniform distributed so as to avoid the localized heat concentration caused by non-uniform current distribution that would damage the ultra-high voltage device. Multiple fuse apparatus are preferably connected to the first metal layer individually. Each the fuse apparatus includes a poly fuse to be burnt down when an over-load current flows therethrough.

Abstract: A method for manufacturing a magnetic head with an electrostatic discharge resistor for preventing electrostatic discharge damage to magnetic head. The electrostatic discharge resistor is formed by a processes that saves manufacturing time and cost by forming resistor in the same deposition and patterning steps used to form the magnetoresistive sensor. However, the resistor includes only a portion of the layers used to form the magnetoresistive sensor, thereby ensuring that the resistor will have sufficient resistivity.

Abstract: An electrostatic discharge (ESD) protection circuit that includes a parallel connection of parasitic vertical and lateral bipolar junction transistors (BJTs) each with a floating base and a metal oxide semiconductor (MOS) field transistor with a floating body is disclosed. The three transistors may be connected in parallel between a bond (input or output) pad and a substantially fixed voltage level (e.g., a ground (or zero potential) or Vcc, depending on the transistor configuration) in a semiconductor electronic device so as to protect transistor gates or other circuit portions from damage from electrostatic voltages. The parasitic BJTs and the field transistor may be configured to remain cut off so long as an input voltage at the pad is between a negative V1 voltage (?V1) (V1>0) and a +V2 voltage (V2>Vcc), thereby allowing a greater input voltage swing without signal clamping.

Abstract: A magnetoresistive transducer head assembly includes a reader element, a writer element and a high impedance shunt electrically connecting the reader element and the writer element. The high impedance shunt provides a high impedance conductive path for maintaining electrostatic charge equipotential between the reader element and the writer element.

Abstract: A magnetoresistive transducer head assembly includes a reader element, a writer element and a high impedance shunt electrically connecting the reader element and the writer element. The high impedance shunt provides a high impedance conductive path for maintaining electrostatic charge equipotential between the reader element and the writer element.

Abstract: A structure for preventing Electrostatic Discharge (LSD) damage to a magnetoresistive sensor during manufacture. The structure includes a switching element that can be switched off during testing of the sensor and then switched back on to provide ESD shunting to the sensor. The switch can be a thermally activated mechanical relay built onto the slider. The switch could also be a programmable resistor that includes to solid electrolyte sandwiched between first and second electrodes. One of the electrodes functions as an anode. When voltage is applied in a first direction an ion bridge forms across through the electrolyte across electrodes making the resistor conductive. When a voltage is applied in a second direction, the ion bridge recedes and the programmable resistor becomes essentially non-conductive.

Abstract: A system and method for the prevention of electrostatic discharge (ESD) by a hard drive magnetic head is disclosed. The magnetic head is secured to a head-gimbal assembly (HGA) by anisotropic conductive paste (ACP) to provide an improved electrostatic discharge path.

Abstract: A read head circuit includes a read element configured to read data stored magnetically on a platter. The read element includes a first terminal and a second terminal. A normally-ON transistor includes a first terminal, a second terminal and a control terminal. The first terminal is directly connected to the first terminal of the read element. A second terminal is directly connected to the second terminal of the read element. Responsive to the control terminal being powered, the normally-ON transistor provides an open circuit between the first terminal of the read element and the second terminal of the read element. Responsive to the control terminal not being powered, the normally-ON transistor is configured to short the first terminal of the read element to the second terminal of the read element.

Abstract: A multi-channel thin-film magnetic head includes a substrate, a plurality of MR read head elements, a plurality of first resistive elements, and a second resistive element. Each MR read head element includes a lower magnetic shield layer, an upper magnetic shield layer, and an MR layer arranged between the lower magnetic shield layer and the upper magnetic shield layer. Each first resistive element has a first resistance value. One ends of the first resistive elements are connected to the lower magnetic shield layers or the upper magnetic shield layers of the MR read head elements, respectively. The second resistive element has a second resistance value that is higher than the first resistance value. One end of the second resistive element is commonly connected to the other ends of the plurality of first resistive elements. The other end of the second resistive element is grounded.

Abstract: An electrostatic discharge protection device includes a first bipolar transistor having a collector terminal connected with a first power supply terminal, an emitter terminal connected with the input/output terminal, and a base terminal connected with a second power supply terminal, a second bipolar transistor having a collector terminal connected with the second power supply terminal, an emitter terminal connected with the input/output terminal, and a base terminal connected with the first power supply terminal, one of the first and second bipolar transistors ensuring a continuity between the collector terminal and emitter terminal under such conditions that a potential difference between the first or second power supply terminal and the input/output terminal is lower than a breakdown voltage at a PN junction between the emitter terminal and the base terminal of the other bipolar transistor.

Abstract: In one embodiment, a system includes a cable comprising a plurality of leads and an ESD dissipating adhesive coupled to the plurality of leads in a coverage area for providing ESD protection to an element of an electronic device. The ESD adhesive comprises a mixture of a polymeric thin film and electrically conductive fillers dispersed in the film, and the ESD adhesive has a resistivity from about 50 to 100 M?. In another embodiment, a method for providing ESD protection to an element of an electronic device includes applying an ESD adhesive across exposed leads of a cable and evaporating the solvent from the ESD adhesive. At least some of the leads are coupled to an element of an electronic device. The ESD adhesive comprises a polymeric thin film, electrically conductive fillers dispersed in the polymeric thin film, and a solvent for controlling a viscosity of the ESD adhesive.

Abstract: A slider mounted CPP GMR or TMR read head sensor is protected from electrostatic discharge (ESD) damage and from noise and cross-talk from an adjacent write head by means of a balanced resistive/capacitative shunt. The shunt includes highly resistive interconnections between upper and lower shields of the read head and a grounded slider substrate and a low resistance interconnection between the lower pole piece of the write head and the substrate. The capacitances between the pole piece and the upper shield, the upper shield and the lower shield and the lower shield and the substrate are made equal by either forming the shields and pole piece with equal surface areas and separating them with dielectrics of equal thicknesses, or by keeping the ratio of area to insulator thicknesses equal.

Abstract: A protective device for protecting an electronic device, e.g., MR head, from ESD/EOS damage includes a cable having leads coupled to the electronic device and a first port providing access to the leads. A second port with one-to-one electrical connection to each lead in the cable provides a second electrical access to the all leads. A shorting device is coupled to one of the ports thereby creating a short between both the leads of the extension and the leads of the cable. The other port is available for coupling to an external device, e.g., tester or end device while the short provides ESD/EOS protection.

Abstract: An exemplary method for preventing an electronic device from erroneously resetting due to electrostatic discharge (ESD) involves an electronic device that includes a reset control pin. The method includes providing a timer, and setting a reset condition of the reset control pin. If the reset condition is satisfied, the electronic device resets. The method includes appropriately setting the reset condition of the electronic device. The reset condition can virtually never be satisfied by an ESD. Thus, the electronic device is efficiently prevented from erroneously resetting due to ESD.

Abstract: A tester system includes a tester and a radioactive isotope source. The tester includes a spindle assembly, a disk mounted to the spindle assembly, and a head actuatable over the disk. The radioactive isotope source is positioned in an ionizing location proximate the tester, such that a minimum distance between the radioactive isotope source and an axis of rotation of the disk is less than a radius of the disk.

Abstract: Electrostatic discharge clamp devices are described. In one embodiment, the semiconductor device includes a first transistor, the first transistor including a first source/drain and a second source/drain, the first source/drain coupled to a first potential node, the second source/drain coupled to a second potential node. The device further includes a OR logic block, a first input of the OR logic block coupled to the first potential node through a capacitor, the first input of the OR logic block being coupled to the second potential node through a resistor, and a second input of the OR logic block coupled to a substrate pickup node of the first transistor.

Abstract: According to an embodiment of the present invention, an electrostatic breakdown protection method protects a semiconductor device from a surge current impressed between a first terminal and a second terminal, the semiconductor device including: a diode impressing a forward-bias current from the first terminal to the second terminal; and a bipolar transistor impressing a current in a direction from the second terminal to the first terminal under an ON state, a continuity between a collector terminal and an emitter terminal of the bipolar transistor being attained before a potential difference between the first terminal and the second terminal reaches such a level that the diode is broken down.

Abstract: An electrostatic discharge circuit between a first pad and a second pad including an electrostatic discharge circuit element, including a bipolar transistor path and a resistor path, the electrostatic discharge circuit element alternately discharging an electrostatic current through the bipolar transistor path and the resistor path.