Specifics Of Biasing Or Erasing Patents (Class 360/66)
  • Patent number: 6624957
    Abstract: A circuit for controlling a write current employed in a magnetic disk recording apparatus includes a write unit for delivering the write current to a plurality of magnetic heads to enable writing of data on surfaces of magnetic disks by the magnetic heads. The write current exhibits a first magnitude that varies in dependence upon a second magnitude exhibited by a driving current provided to a write current control terminal of the write unit. A control unit generates pulse width modulated signals having duty cycles corresponding to respective predetermined write current control values to indicate the write current. A write current adjusting unit receives the pulse width modulated signals and delivers the driving current to the write current control terminal of the write unit. The write current adjusting unit adjusts the second magnitude exhibited by the driving current in dependence upon the duty cycles of the pulse width modulated signals.
    Type: Grant
    Filed: February 28, 2000
    Date of Patent: September 23, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jong-Yun Yun
  • Publication number: 20030169528
    Abstract: A magnetoresistive element measurement circuit configured for measuring resistance of a magnetoresistive element biased by a current source is disclosed. In a preferred embodiment, the measurement circuit includes the magnetoresistive element, a current source providing a fixed current to the magnetoresistive element, at least one current bypass switch controllingly engaging a measurement resistor in an electrical parallel configuration with the biased magnetoresistive element, and an analogue voltage detector measuring voltage first across the biased magnetoresistive element and then across the biased magnetoresistive element in electrical parallel communication with the measurement resistor. The measured voltages are factored with the measurement resistor to determine the resistance of the magnetoresistive element.
    Type: Application
    Filed: June 28, 2002
    Publication date: September 11, 2003
    Applicant: Seagate Technology LLC
    Inventors: Eng Hock Lim, Khai Sheng Ng, Fong Kheon Chong, Chew Weng Khin Victor, Myint Ngwe
  • Patent number: 6614273
    Abstract: An ultra-fast drive circuit (40) providing a rail-to-rail drive voltage at an output node (N1). A pair of bipolar output transistors (Q3, Q4) are selectively driven via a FET drive circuit (42), and by a control circuit (44) to achieve a rail-to-rail output voltage (Vcc−Vee) that is very fast. The drive FETs comprise three serially connected FETs (M5, M6, M7) whereby the middle FET (M6) is the control FET effecting the control of the output transistors (Q3, Q4). The other two FETs (M5, M7) are always in the on state and complete either the pull-up or pull-down of the voltage at the output node (N1), depending on the state of the middle FET (M6). The control FETs (44) provide two output control signals (46, 48) to the output transistors (Q3, Q4), with the control line (48) controlling the state of the middle switching FET (M6).
    Type: Grant
    Filed: January 30, 2001
    Date of Patent: September 2, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Patrick Teterud, Jiangfeng Wu, Thomas Van Eaton
  • Patent number: 6608728
    Abstract: A magnetic disk unit includes a housing which accommodates a magneto-resistive element and a magnetic disk, a temperature sensor for detecting a temperature within the housing, a circuit for detecting a resistance value of the magneto-resistive element, and a current control unit for controlling a sense current which is supplied to the magneto-resistive element, based on the detected temperature detected and the detected resistance value.
    Type: Grant
    Filed: March 16, 2000
    Date of Patent: August 19, 2003
    Assignee: Fujitsu Limited
    Inventor: Hiroshi Sugiyama
  • Patent number: 6606212
    Abstract: A magnetic recording channel front-end for a magnetic storage system includes a magnetoresistive element, an interconnect and a readback amplifier. The interconnect, which has a characteristic impedance, couples the magnetoresistive element to the readback amplifier. The readback amplifier includes a gain stage and an active termination. The gain stage, which has an associated impedance, has an input that is connected to the interconnect. The active termination is coupled to the input of the gain stage, such that an input impedance of the readback amplifier, which is formed by a combination of the impedance associated with the gain stage and the active termination, is substantially equal to the characteristic impedance of the interconnect. Additionally, the gain stage generates a first noise signal that has a first magnitude appearing at an output of the gain stage. The active termination generates a second noise signal that has a second magnitude that also appears at the output of the gain stage.
    Type: Grant
    Filed: March 17, 1999
    Date of Patent: August 12, 2003
    Assignee: International Business Machines Corporation
    Inventors: Klaassen Berend Klaassen, Jacobus Cornelis Leonardus Van Peppen
  • Patent number: 6603628
    Abstract: A magnetic recording disk drive with a magnetoresisitive (MR) read head and a control unit comprising an operating pressure logic function that is responsive to a thermoresistive signal contained in the feedback signal from the MR read head. The thermal conductivity of the air inside of the hard disk drive is effected by the air pressure. Fluctuation in the thermal conductance from the MR read head to its surroundings inside of the hard drive affects the temperature of the MR head, thus affecting the thermoresistivity of the MR read head. Based on a thermoresistive signal, the temperature of the head may be determined, which in turn is applied to determine the pressure, based on a predetermined relationship between the MR read head temperature, internal pressure, and internal operating temperature.
    Type: Grant
    Filed: November 1, 2000
    Date of Patent: August 5, 2003
    Assignee: International Business Machines Corporation
    Inventors: Donald Ray Gillis, Bernd Lamberts, Kris Victor Schouterden
  • Patent number: 6603617
    Abstract: A method and apparatus for providing adaptive drive-level compensation for amplitude and BER loss due to media thermal decay is disclosed. Specifically, in one embodiment, a disk surface having information stored thereon is provided. The information is written in the form of magnetic transitions, which are subject to thermal decay. A head is used to read the information stored on the disk surface and is biased by a bias current (or a bias voltage). A value related to the thermal decay of the magnetic transitions is determined. If the value indicates that the thermal decay has reached an unacceptable level, the bias current is increased in order to compensate for the thermal decay of the magnetic transitions. Once a bias current limit has been reached, information stored on the disk surface is rewritten.
    Type: Grant
    Filed: February 21, 2001
    Date of Patent: August 5, 2003
    Assignee: Maxtor Corporation
    Inventor: Ralph W. Cross
  • Patent number: 6603619
    Abstract: A magnetic storage medium includes a magnetic storage medium that exhibits a magnetic compensation temperature specified higher than room temperature to minimize effects of heat generated by a head using magneto-resistance effect. In a heat assisted recording and reproduction method using such a magnetic storage medium, during reproduction, the S/N ratio in a reproduction signal is enhanced by optimizing the bias current applied to the head using magneto-resistance effect. A magnetic storage medium and a heat assisted recording and reproduction method using such a magnetic storage medium whereby information is magnetically recorded and reproduced by heating a read-out domain are offered that enables signal reproduction with a good S/N ratio despite possible use of a head exhibiting magneto-resistance effect.
    Type: Grant
    Filed: January 7, 2000
    Date of Patent: August 5, 2003
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Kunio Kojima, Yasushi Ogimoto, Shinzo Sawamura, Hiroyuki Katayama
  • Patent number: 6603622
    Abstract: The present invention may be regarded as a disk drive comprising a disk having a plurality of data tracks, each data track comprising a plurality of sectors. A sync mark detector detects a sync mark pattern in a sector by filtering a read signal with a matched filter having an impulse response substantially matched to a dibit response of the disk drive. The output of the matched filter is correlated with a dual polarity correlator to generate first and second correlated signals. The sync mark pattern is detected when either the first or second correlated signals exceeds a threshold.
    Type: Grant
    Filed: February 28, 2001
    Date of Patent: August 5, 2003
    Assignee: Western Digital Technologies, Inc.
    Inventors: Grant S. Christiansen, Mark D. Hagen
  • Patent number: 6594100
    Abstract: A method for writing data on a magnetic recording medium includes providing a magnetic recording layer having at least two ferromagnetic films antiferromagnetically coupled together across a nonferromagnetic spacer film, with one of the ferromagnetic films having a greater magnetic moment than the other. A positive write field is applied to a first region to align the moments of both ferromagnetic films with the positive field, and then a negative write field is applied to an adjacent region to align the moments of both ferromagnetic films with the negative field. When the medium is moved away from the write fields, the moment of the ferromagnetic film with the lesser moment in each region flips to be antiparallel to the moment of the other ferromagnetic film in its region. The result is that the adjacent regions become adjacent magnetized domains with the transition between the domains representative of the written data.
    Type: Grant
    Filed: July 11, 2001
    Date of Patent: July 15, 2003
    Assignee: Hitachi Global Storage Technologies The Netherlands B.V.
    Inventors: Matthew Joseph Carey, Eric Edward Fullerton, Bruce Alvin Gurney, Hal Jervis Rosen, Manfred Ernst Schabes
  • Patent number: 6594099
    Abstract: A data eraser applies a strong magnetic field to a magnetic disk while suppressing the strength of a magnetic field applied to a spindle motor. The data eraser includes an upper magnet fixer, a lower magnet fixer, and a linkage. The upper magnet fixer fixes one set of permanent magnets and the lower magnet fixer fixes another set of permanent magnets. The plate members are provided at the tips of the upper and lower magnet fixers. The plate members are made of a soft magnetic material, for example, JIS SS400, respectively. Each of these plate members functions as a yoke.
    Type: Grant
    Filed: May 14, 2001
    Date of Patent: July 15, 2003
    Assignee: International Business Machines Corporation
    Inventor: Kohji Serizawa
  • Patent number: 6594101
    Abstract: A circuit (80) and method (84) for protecting read heads (18) of a hard-disk drive system (100). Capacitor C1 is controllably coupled to a dummy head Rdummy during a Vbias mode, so that capacitor C1 has a low, predictable voltage upon returning to Ibias mode, protecting the read heads (18) from damage. The circuit (80) includes logic (82) and algorithm (84) determining when to couple the capacitor C1 to the dummy head Rdummy during a servo bank write (SBW) sequence.
    Type: Grant
    Filed: June 22, 2000
    Date of Patent: July 15, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Echere Iroaga, Bryan E. Bloodworth, Ashish Manjrekar
  • Patent number: 6594097
    Abstract: The overvoltage applied on a head during switching of the head is prevented. At the time when the head switching signal changes, a switch S4 for turning on/off an operational amplifier Gm1 is turned off, and the operational amplifier Gm1 is turned off. Simultaneously, the switch S3 is turned on, the current source I1 is connected to a capacitor C1, and the capacitor C1 is discharged. Then, switches S1 and S2 for switching the MR head are switched. Finally, the switch S3 is turned off and the switch S4 is turned on, thus the switching of the MR head is finished.
    Type: Grant
    Filed: February 29, 2000
    Date of Patent: July 15, 2003
    Assignee: Sony Corporation
    Inventor: Michiya Sako
  • Publication number: 20030123177
    Abstract: An impedance controlling circuit (152) is connected across an MR head (42) and has two current paths, each including a control transistor (154,156), a current path resistor (160,158), and a biasing circuit (162,164) in series. Each side of the MR head 42 is connected between a respective one of the current path resistors (158,160) and the biasing circuits (162,168). A shunt resistor (170) is connected between the control transistors (154,156) and the current path resistors (158,160) in each of the current paths. When the control transistors (154,156) are not conducting, the current path resistors (158,160) and the shunt resistor (170) shunt the MR head (42).
    Type: Application
    Filed: January 21, 2002
    Publication date: July 3, 2003
    Applicant: Texas Instruments Incorporated
    Inventor: Indumini W. Ranmuthu
  • Patent number: 6587059
    Abstract: A code word includes a first group of data bits and includes code bits that represent a second group of data bits. One embodiment of the code word has a minimum probability of bit transitions among its bits. Another embodiment of the code word includes a parity bit. Unlike conventional codes, a code that includes such a code word can have both a high efficiency and small error propagation. Additionally, by including fewer bit transitions, a sequence of such code words causes less read noise, and thus causes fewer read errors as compared to sequences of known code words. Moreover, the code word can include a parity bit to allow improved error detection as compared to known error-detection techniques. Therefore, such a code word can significantly increase the effective write and read speeds of a disk drive.
    Type: Grant
    Filed: November 15, 2002
    Date of Patent: July 1, 2003
    Assignee: STMicroelectronics, Inc.
    Inventors: Francesco Rezzi, Marcus Marrow
  • Patent number: 6587296
    Abstract: A preamplifier circuit for a hard disk drive system comprises a preamplifier circuit having a bias voltage circuit stage associated therewith. The preamplifier circuit further comprises a current bias boost recovery circuit operatively coupled to the bias voltage circuit stage which is configured to increase a rate of charging of a noise reduction capacitor associated with the bias voltage circuit stage. A head select boost recovery circuit is also operatively coupled to the bias voltage circuit and is configured to increase a rate of charging or discharging of a bias capacitor associated with the bias voltage circuit stage. Together the circuits allow for a concurrent head switch and current bias switch and avoids the problems associated with the prior art.
    Type: Grant
    Filed: July 21, 2000
    Date of Patent: July 1, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Echere Iroaga, Ashish Manjrekar, Bryan E. Bloodworth
  • Publication number: 20030117737
    Abstract: The invention includes operating a merged read/write head in a disk drive by determining both the maximum read bias current and maximum write current, based upon the measured read resistance of the read mechanism and the write current in use with the write mechanism. Both the read mechanism and write mechanism are near each other in the merged read/write head.
    Type: Application
    Filed: December 6, 2001
    Publication date: June 26, 2003
    Inventors: Eun Kyu Jang, Hung Jai Lee
  • Patent number: 6583946
    Abstract: The manufacturer of hard disk drives (HDD) simultaneously activates all write heads to format the magnetoresistive disks during an operation known in the industry as “servo bank write”. To reduce bit error rates resulting from coupling between the write heads and the read heads during the servo bank write operation, the invention herein provides a relatively small amount of bias current to each read head when all the write heads are activated. The small bias current raises the dc bias level on the reader portion of the magnetoresistive head and effectively eliminates negative spikes resulting from the coupling.
    Type: Grant
    Filed: July 7, 2000
    Date of Patent: June 24, 2003
    Assignee: Texas Instruments Incorporated
    Inventor: Paul M. Emerson
  • Publication number: 20030112543
    Abstract: A common mode transient reduction circuit for use with an operational transconductance amplifier having a main amplifier and a common mode feedback amplifier coupled to a common bias voltage is disclosed. The common mode transient reduction circuit includes a delay circuit, coupled between the common bias voltage and the main amplifier, that reduces a magnitude of the main amplifier's common mode voltage output transient when the common bias voltage is changed. In an advantageous embodiment, the delay circuit includes a resistance and a capacitance.
    Type: Application
    Filed: December 17, 2001
    Publication date: June 19, 2003
    Applicant: International Business Machines Corporation
    Inventor: Kevin B. Ohlson
  • Patent number: 6580575
    Abstract: An active damping circuit including an H-bridge circuit having an inductive load and a switching circuit, an impedance circuit responsive to a bias signal to damp the H-bridge circuit, and a bias circuit to generate the bias signal responsive to the voltage drop across the H-bridge circuit.
    Type: Grant
    Filed: November 23, 1999
    Date of Patent: June 17, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Aslamali A. Rafi, Bryan E. Bloodworth
  • Publication number: 20030103288
    Abstract: A recording and regeneration apparatus for reliably erasing data stored on a disk medium (such as a disk drive) which does not require a particular working environment such as a host system or a medium that stores the dedicated data erasure program. The apparatus comprises a disk medium on which data is recorded, a switch for generating an erasure instruction designating an erasure mode, and a processor for executing a program stored in a memory for erasing data recorded on the disk medium, if the erasure instruction is generated. The erasure instruction may also be generated in response to a command signal external to the apparatus. The processor may determine whether or not the erasure instruction is generated upon application of power to the recording and regeneration apparatus.
    Type: Application
    Filed: September 5, 2002
    Publication date: June 5, 2003
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Noboru Suzuki
  • Patent number: 6574061
    Abstract: A process of run-time temperature compensating bias current to a magnetoresistive read head in which a plurality of temperature ranges are defined with associated bias current values. A hysteresis range of temperatures is defined for each boundary between temperature ranges. A bias current value is selected based on the temperature range of the sensed temperature. The process is repeated. If the sensed temperature is in a different temperature range from that previously identified and the measured temperature is not in a hysteresis range at the boundary with the temperature range previously identified, the selected bias current value is based on the presently identified temperature range. If the sensed temperature is in a hysteresis range at the boundary with the temperature range previously.
    Type: Grant
    Filed: July 3, 2000
    Date of Patent: June 3, 2003
    Assignee: Seagate Technology LLC
    Inventors: Khong Mau Ling, Lian Chong Kwek, Kwee Teck Say, Myint Ngwe, Kah Liang Gan, Beng Wee Quak
  • Patent number: 6570727
    Abstract: The object of the present invention is to provide a method and apparatus configured to allow an externally generated magnetic field to simultaneously erase a portion of the information on a disk, or a plurality of disks, within a magnetic storage device. The invention allows high throughput of erased magnetic storage devices, as in a mass production environment. Additionally, the invention allows a variety of magnetic storage device configurations in that the erasing is non-intrusive to the housing of the magnetic storage device and does not depend on the number of disks within the magnetic storage device.
    Type: Grant
    Filed: February 7, 2000
    Date of Patent: May 27, 2003
    Assignee: International Business Machines Corporation
    Inventors: Hitoshi Tamura, Hiroki Mori
  • Publication number: 20030081338
    Abstract: A method for assessing encroachment at spin stand, an apparatus for carrying out the method and a disc drive configured taking into consideration results of such a method of assessment. In addition to determining encroachment at adjacent tracks, the method provides for the assessment of far track encroachment. The method thus provides a more reliable and more realistic measurement of encroachment, and may also be implemented to establish a relationship between encroachment impact and a specified track distance so as to facilitate quality control of heads in future applications.
    Type: Application
    Filed: April 1, 2002
    Publication date: May 1, 2003
    Inventors: Wenyao Wang, Victor Mh Tan
  • Patent number: 6556366
    Abstract: A system and method for selecting between two biasing modes for biasing magneto resistive heads in a disk drive. A mode selector selects either a voltage biasing circuit or a current biasing to supply the bias voltage or bias current, respectively, to a magneto resistive head. The selection can be based on changes in parameters in the disk drive or magneto resistive heads during disk drive operation.
    Type: Grant
    Filed: August 30, 2001
    Date of Patent: April 29, 2003
    Assignee: STMicroelectronics, Inc.
    Inventors: Giuseppe Patti, Axel Alegre de La Soujeole
  • Publication number: 20030072097
    Abstract: The present invention is a method and system to determine a quality of a head in a hard disk drive. The method comprises providing a disk having a at least one side with a plurality of tracks, writing on a predetermined track on the plurality of tracks and reading a profile of the predetermined track to provide a first profile value. The head is then moved to an adjacent track where it writes on the adjacent track. A profile of the predetermined track is then read to provide a second profile value. A quality of the head can then be determined based on the first and second values.
    Type: Application
    Filed: October 15, 2001
    Publication date: April 17, 2003
    Inventors: Zhaohui Li, Geng Wang, Keung Youn Cho
  • Publication number: 20030072109
    Abstract: A magnetoresistive memory element includes a spacer layer; and first and second ferromagnetic layers separated by the spacer layer. The first ferromagnetic layer and the spacer layer form an interface that has been smoothed.
    Type: Application
    Filed: November 1, 2002
    Publication date: April 17, 2003
    Inventors: Manish Sharma, Janice H. Nickel
  • Publication number: 20030058561
    Abstract: A disk drive of perpendicular magnetic recording method including a read head comprising a GMR element and a drive using a double-layered disk medium, is disclosed. In the magnetic field response characteristic of the GMR element, the relationship between the degree of nonlinearity and a pulse width at 50% threshold (PW50) of a differentiated read signal is used. The degree of nonlinearity of the GMR element is adjusted such that the PW50 is smaller than the maximum value. The read channel comprises a differentiation circuit for converting the read signal output from the GMR element into the differentiated read signal.
    Type: Application
    Filed: August 27, 2002
    Publication date: March 27, 2003
    Inventors: Yuka Aoyagi, Akihiko Takeo
  • Publication number: 20030053239
    Abstract: A circuit and method are presented for detecting a fault in a magneto-resistive head (18). The circuit includes a bias circuit (50) to produce a bias voltage across the head (18) and a pair of resistors (68,70) in series with the head (18) connected to the bias circuit (50) to carry a current (IVMR) from the bias circuit (50) in common with the head. A circuit (102,102′) is provided to determine a ratio of a voltage across the head (18) with respect to a voltage across the head (18) and the pair of resistors (68,70), and a circuit (104,106,104′,106′) is provided for indicating a fault if the ratio falls outside a predetermined range.
    Type: Application
    Filed: September 14, 2001
    Publication date: March 20, 2003
    Applicant: Texas Instruments, Inc.
    Inventor: Hong Jiang
  • Patent number: 6532126
    Abstract: An apparatus and method are disclosed for minimizing damage to a disc drive during head switching operations. The disc drive comprises a plurality of magnetic recording surfaces to and from which data are transferred using read/write heads, each head utilizing the application of a bias current during operation. To switch from a presently selected head to a target head, the disc drive determines a first value indicative of the magnitude of a bias current for the presently selected head and a target bias current to be applied to the target head. When the second value is greater than the first value, the disc drive switches from the presently selected head to the target head and then applies the target bias current; conversely, when the first value is greater than the second value, the target bias current is applied to the presently selected head and then the disc drive switches from the presently selected head to the target head.
    Type: Grant
    Filed: August 15, 2000
    Date of Patent: March 11, 2003
    Assignee: Seagate Technology LLC
    Inventors: Hieu Van Nguyen, Clyde Everett Goodner, III
  • Patent number: 6532127
    Abstract: A differential circuit to read differential data from a disk by a voltage bias includes a read circuit to read the differential data from the disk by maintaining the voltage bias and a feedback circuit to sense deviations in the voltage and to adjust the voltage in response to the deviations.
    Type: Grant
    Filed: November 16, 2000
    Date of Patent: March 11, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Indumini W. Ranmuthu, Yuji Isobe
  • Patent number: 6522491
    Abstract: A magnetoresistive element input circuit includes a first resistor connected between a magnetoresistive (MR) element and a first power source. A first current source is connected between the MR element and a second power source and supplies a DC bias current to the MR element in an active mode. A second resistor is connected between the MR element and the first current source. A capacitor is connected to a node between the second resistor and the first current source and to the first power supply. A differential amplifier is connected to the MR element. A voltage supply circuit is connected to the node and supplies the node with a voltage, when the input circuit is in an inactive mode, which is substantially equal to the voltage supplied to the node when the input circuit is in the active mode.
    Type: Grant
    Filed: July 25, 2000
    Date of Patent: February 18, 2003
    Assignee: Fujitsu Limited
    Inventor: Takumi Kawai
  • Patent number: 6522134
    Abstract: A process for resetting or initially establishing the magnetic orientation of one or more spin valves in a magnetoresistive read head with improved robustness. The spin valve includes subcomponents such as an antiferromagnetic layer, a ferromagnetic pinned layer, a conductive layer, a free layer, and a hard bias layer. A first external magnetic field is first applied to the spin valve sensor, this field having a first orientation relative to the spin valve sensor. During application of the first external magnetic field, a pulse of electrical current is directed through the spin valve sensor in a first direction, preferably parallel to the magnetic orientation of the external field. The current waveform brings the antiferromagnetic layer of the spin valve past its blocking temperature, freeing its magnetic orientation. The first external field exerts a robust bias upon the antiferromagnetic layer in the desired direction.
    Type: Grant
    Filed: January 13, 2000
    Date of Patent: February 18, 2003
    Assignee: International Business Machines Corporation
    Inventor: Hardayal Singh Gill
  • Publication number: 20030030934
    Abstract: The method and apparatus herein identifies instability events occurring within a magneto-resistive head. The method commences by positioning magneto resistive head over a selected area of a disk that has no transitions, and then iteratively setting a read bias, and a thermal asperity threshold for counting and analysis of magneto resistive head instability events. The sensitivity of the thermal asperity detector is tuned to detect events that indicate magneto resistive head instability generated by the MR head over regions where magnetic transitions have been erased. The analyzed events are then used to determine the action taken related to the reliability of the head, that is, whether to reject or attempt to reduce the amount of instability related output. The apparatus includes without limitation a preamplifier, a read channel with a thermal asperity detector, and a comparator for counting and analyzing the resultant signals tested via biasing the magneto resistive head in a disc drive.
    Type: Application
    Filed: January 24, 2002
    Publication date: February 13, 2003
    Applicant: Seagate Technology LLC
    Inventors: Michael D. Schaff, Abhay T. Kataria
  • Patent number: 6519106
    Abstract: A method for compensating digital samples of an asymmetric read signal is presented. The method involves reading a digital sample of an asymmetric read signal V(t) (160), generating a compensated sample at least when the digital sample requires compensation (164), and outputting either the digital sample (168) or the compensated sample (166). Also presented is an asymmetry correction block (158) of a read channel (144) of a disc drive (110) that includes an input (200), a level detector (202), a compensator (204), and an output (208). The level detector (202) and the compensator (204) receive the digital sample through the input (200). The level detector (202) determines whether the digital sample requires compensation. The compensator (204) generates a compensated sample at least when the digital sample requires compensation. The output (208) selectively outputs either the digital sample or the compensated sample.
    Type: Grant
    Filed: April 20, 2000
    Date of Patent: February 11, 2003
    Assignee: Seagate Technology LLC
    Inventors: Nan Ling Goh, Ban Hok Goh, Utt Heng Kan, Kah Liang Gan
  • Publication number: 20030026029
    Abstract: In a high-frequency impedance type magnetic head having high impedance and capable of efficiently detecting a change in impedance, an electrically conductive metal film is sandwiched between two soft magnetic films, and the two soft magnetic films form a portion of a magnetic path. The thickness of one soft magnetic film is smaller than the thickness of the other soft magnetic film. The electrically conductive metal thin film has a pair of electrodes at respective ends thereof, to which are connected an oscillator for applying a high frequency carrier signal to the electrodes and a high frequency amplifier having a demodulator circuit. Further, an electrically conductive metal film winding is provided, and a DC current is applied to the electrically conductive metal film winding at the time of reproduction, while on the other hand, a signal current is applied to the electrically conductive metal film winding at the time of recording.
    Type: Application
    Filed: October 1, 2002
    Publication date: February 6, 2003
    Applicant: Matsushita Electric Industrial Co., LTD.
    Inventors: Akio Kuroe, Sayuri Muramatsu, Hirotsugu Fusayasu, Akio Murata
  • Publication number: 20030021052
    Abstract: An erasing apparatus for a magnetic recording medium is provided to instantaneously remove data recorded on the recording medium, so that the erased data is no longer readable. The erasing apparatus includes a transporter for carrying the recording medium to magnetic field, a positioner for setting the recording medium in position, an electromagnet for generating magnetic field, and a power source for the electromagnet.
    Type: Application
    Filed: April 29, 2002
    Publication date: January 30, 2003
    Inventor: Toshiharu Yoshikawa
  • Patent number: 6512647
    Abstract: A bias current for a magnetoresistive read head is selected by defining a tuning range based on a maximum and a minimum bias current value for the head. A plurality of read operations are iteratively performed using a different bias current value over the tuning range for each iteration. The results of each read iteration are measured and a bias current is selected on the basis of the read error rates, and particularly those bias currents associated with the lowest read error rate.
    Type: Grant
    Filed: April 14, 2000
    Date of Patent: January 28, 2003
    Assignee: Seagate Technology LLC
    Inventors: Beng Wee Quak, Bernard Tuang Liang Lim, Myint Ngwe, Song Wee Teo, Beng Theam Ko
  • Patent number: 6512648
    Abstract: A magnetic storage apparatus exploits the inherent characteristics of a magnetoresistive element to improve the performance of a magnetic head employing the element. Variations in element height or element thickness of the magnetoresistive element are considered in the selection of a sense current appropriate to the element size, by measuring the voltage between the terminals of the magnetoresistive head and controlling the sense current so that the output reference voltage approaches a predetermined value. In another embodiment, the sense current is controlled so that the voltage amplitude or a reference amplitude are set to a predetermined value. In both embodiments, a conversion table is preferably used to relate voltage amplitudes with sense currents, whereby an appropriate sense current is selected based upon the voltage amplitude.
    Type: Grant
    Filed: August 8, 2000
    Date of Patent: January 28, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Reijiro Tsuchiya, Mikio Suzuki
  • Patent number: 6507448
    Abstract: An information recording device which records information at a high recording density such that an error rate is reduced. In particular, an information recording device that includes a recording head, arranged near or to be close to the recording medium, for applying magnetic fields to the small regions when the recording head relatively moves with respect to the recording medium to pass on the small regions of the recording medium, and a recording head controller for controlling the recording head to cause the recording head to apply magnetic fields to the small regions in a free region of the recording medium in a standby state in which at least information is not recorded on the recording medium to uniform the directions of magnetization of the small regions so as to erase the information in the predetermined free region.
    Type: Grant
    Filed: December 14, 2000
    Date of Patent: January 14, 2003
    Assignee: Fujitsu Limited
    Inventors: Syuji Nishida, Ikuya Tagawa, Yuji Uehara
  • Publication number: 20030007271
    Abstract: The present invention relates to an amplifier intended to deliver to a load impedance RL connected between two output terminals of the amplifier an output current Iout which is representative of an input signal (Vin, −Vin) applied to two input terminals of the amplifier, which amplifier includes a first and a second transistor T1 and T2 connected as a differential pair around the load impedance RL.
    Type: Application
    Filed: June 25, 2002
    Publication date: January 9, 2003
    Inventors: Jan Mulder, Hugo Veenstra, Giuseppe Grillo
  • Publication number: 20030002193
    Abstract: A circuit to voltage bias a first head to access a disk includes a circuit to bias the head with said voltage, a feedback circuit to measure the voltage and generate a feedback signal to correct deviations in the voltage, and a switch circuit to switch the feedback circuit to a serial head while maintaining the feedback head or said first head.
    Type: Application
    Filed: May 17, 2002
    Publication date: January 2, 2003
    Inventor: Echere Iroaga
  • Publication number: 20030002192
    Abstract: A differential circuit to read differential data from a disk by a voltage bias includes a read circuit having a read circuit pole to read the differential data from the disk by maintaining the voltage bias and a feedback circuit having a feedback pole to sense deviations in the voltage and to adjust the voltage in response to the deviations. The read circuit pole is separated from the feedback pole in frequency.
    Type: Application
    Filed: June 29, 2001
    Publication date: January 2, 2003
    Inventors: Indumini W. Ranmuthu, Hong Jiang
  • Publication number: 20030002187
    Abstract: A disc drive with on-the-fly verification of an enabled condition of the write element, comprising a rotatable disc having a magnetic recording surface, and a data reading and writing assembly. The data reading and writing assembly comprises a read/write head comprising a write element and a read element, both adjacent the recording surface; a preamplifier comprising a write driver applying a series of write currents for writing data to the recording surface and a read amplifier for reading stored data from the recording surface; and an interconnect joining the write driver to the write element so as to generate time-varying magnetic fields selectively magnetizing the recording surface in response to the write currents, and joining the read amplifier to the read element so as to transduce magnetization vectors on the recording surface associated with stored data.
    Type: Application
    Filed: January 24, 2002
    Publication date: January 2, 2003
    Inventors: Beng Theam Ko, Eng Hock Lim, Victor WengKhin Chew, Myint Ngwe, Kah Liang Gan
  • Publication number: 20030002185
    Abstract: A differential circuit to read differential data from a disk by a current bias on a plurality of read heads includes a read circuit to read the differential data from the disk by maintaining the current bias. The current is below a maximum current of a read head having the lowest maximum voltage of said plurality of read heads.
    Type: Application
    Filed: June 29, 2001
    Publication date: January 2, 2003
    Inventor: Indumini W. Ranmuthu
  • Patent number: 6498693
    Abstract: Method and system aspects for calibrating an MR offset in an MR head are presented. A method aspect includes identifying an occurrence of a calibration condition to initiate an MR offset check, and performing the MR offset check to ensure an MR offset value has not changed beyond an acceptable tolerance in order to maintain proper servoing of the MR head. A system aspect includes a hard disk for storing data, a read/write MR head for reading and writing data to/from the hard disk, and a control unit. The control unit performs an MR offset calibration of an MR offset value for the read/write MR head in response to a calibration condition occurring in order to ensure maintenance of the MR offset value within an acceptable tolerance for proper servoing of the read/write MR head.
    Type: Grant
    Filed: August 2, 1999
    Date of Patent: December 24, 2002
    Assignee: International Business Machines Corporation
    Inventors: Andrew Hoan Au, Robert Li
  • Publication number: 20020191315
    Abstract: A differential circuit to read differential data from a disk by a voltage bias includes a read circuit to read the differential data from the disk by maintaining the voltage bias by a first transistor and a second transistor, the first transistor being positioned in a first current path to maintain a first current and the second transistor being positioned in a second current path to maintain a second current. The first current is approximately equal to the second current.
    Type: Application
    Filed: June 6, 2001
    Publication date: December 19, 2002
    Inventors: Echere Iroaga, Ashish Manjreka, Indumini Ranmuthu
  • Publication number: 20020181135
    Abstract: The current bias circuit used in a magnetic-signal detection head includes an amplifier that generates a bias current control voltage based on a reference current which regulates the bias current. A bias current I supplied to a MR head is controlled based on this control voltage. The current bias circuit is also provided with a control voltage changing unit that includes a current source and a switch. This control voltage changing unit changes a value of the control voltage without changing the reference current.
    Type: Application
    Filed: October 23, 2001
    Publication date: December 5, 2002
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Toru Takeuchi, Takehiko Umeyama
  • Patent number: 6490112
    Abstract: A circuit (50) and method are presented to provide positive biasing voltages to an MR head (18) in a mass data storage device (10). The circuit (50) includes upper (56) and lower (62) driver transistors to respectively bias respective opposite ends of the MR head (18) with positive voltages. A feedback circuit (58,60,74,84) controls a lower voltage (63) of the positive voltages to be a value as close as possible to a saturation voltage of the lower driver transistor (62), without causing the lower transistor (62) to saturate. Since the MR head (18) is connected between the upper (56) and lower (62) driver transistors, maintaining the lower voltage (63) just above the saturation voltage of the lower driver transistor (62) reduces the common mode voltage across the MR head (18) to a minimum value.
    Type: Grant
    Filed: August 20, 2001
    Date of Patent: December 3, 2002
    Assignee: Texas Instruments Incorporated
    Inventors: Indumini W. Ranmuthu, Reza Sharifi
  • Patent number: 6490115
    Abstract: A method and apparatus for recovering from operation errors arising in an information recording and reproducing unit using a head with a GMR sensor is described. The read and write operations of the unit comprise executing a first error recovery procedure for recovering the operation error, executing a first GMR evaluation procedure for evaluating the performance of the GMR sensor when the operation error cannot be recovered by the first error recovery procedure, and applying a resetting pulse to the GMR sensor in accordance with the first GMR evaluation procedure.
    Type: Grant
    Filed: December 22, 1998
    Date of Patent: December 3, 2002
    Assignee: International Business Machines Corporation
    Inventors: Hiroaki Suzuki, Koji Kurachi, Katsumi Suda, Hideo Asano, Kenji Okada, Makoto Takase, Akira Kibashi, Hiromi Nishimiya, Takao Matsui, Tatsuya Endo, Kenji Kuroki