Current Responsive Patents (Class 361/57)
  • Patent number: 11114730
    Abstract: A battery pack wherein each battery is mechanically and electrically connected by a magnetic device to a busbar. In case of failure of any accumulator, it is disconnected completely passively because its failure generates an inactivation of the magnetic device. The disconnection causes the gravity drop of the accumulator and the possibly completely passive implementation of an accumulator shunt.
    Type: Grant
    Filed: September 12, 2019
    Date of Patent: September 7, 2021
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Johann Lejosne, Pierre Jost, Pierre Perichon
  • Patent number: 10763642
    Abstract: A driver circuit includes: a variable power supply configured to apply a power supply voltage to a light emitting device and to vary a voltage value of the power supply voltage; a current-control switching device electrically connected to the light emitting device and configured to control a current flowing in the light emitting device; a detection part configured to detect a current value and a voltage value related to the current flowing in the light emitting device; and a control part configured to determine a minimum voltage of the power supply voltage based on a detection result of the detection part.
    Type: Grant
    Filed: April 26, 2019
    Date of Patent: September 1, 2020
    Assignee: NICHIA CORPORATION
    Inventor: Hideki Kondo
  • Patent number: 10389262
    Abstract: A device (2) for the on-demand commutation of an electrical current from a first line branch (14, 3; 36) to another, second line branch (4; 41; 71) is created, which has a number of power semiconductor switching elements (7; 47; 53), which are arranged in series and/or parallel to one another in the second line branch (4; 41; 71), and a control unit (18; 51) for controlling the number of power semiconductor switching elements (7; 47; 53). The control unit (18; 51) is adapted to apply to each of the number of power semiconductor switching elements (7; 47; 53) an increased control voltage (VGE) whose level is above the maximum permissible control voltage specified for continuous operation, in order to switch on or maintain the conduction of the number of power semiconductor switching elements and to cause an increased current flow through it, whose current rating is at least double the nominal operating current.
    Type: Grant
    Filed: February 10, 2017
    Date of Patent: August 20, 2019
    Assignee: GE ENERGY POWER CONVERSION TECHNOLOGY LTD
    Inventors: Roland Jakob, Martin Geske, Kowalsky Jens, Josef Lutz
  • Patent number: 10050556
    Abstract: Methods and apparatus for hard switching of Alternate-Arm-Converter voltage source converters. Such voltage source converters have a phase limb with a high and low side converter arm connecting an AC terminal to a high and low side DC terminal, respectively, including a chain-link circuit in series with a director switch. Each chain-link circuit includes series connected cells that can be switched to generate a controlled voltage across the chain-link circuit. In embodiments, a controller turns-off the director switch of a converter arm that is conducting current in response to a hard-switching request for a first phase limb. In response to a hard-switching request, the controller controls the chain-link circuits of the first phase limb at any point in a phase cycle to control: a DC voltage across the director switch and/or the current flowing through the director switch to a predetermined level before turning the director switch off.
    Type: Grant
    Filed: February 19, 2016
    Date of Patent: August 14, 2018
    Assignee: GENERAL ELECTRIC TECHNOLOGY GMBH
    Inventors: Francisco Javier Chivite Zabalza, Francisco Moreno Munoz, David Reginald Trainer
  • Patent number: 9866011
    Abstract: A device and a method are provided for interrupting battery current using a latch relay for substantially high current interruption, which enable the latch relay to return to an ON position after operating to an OFF position. Accordingly, the latch relay for substantially high current interruption is operated to return to an ON (closed) position in only a normal state other than a short-circuit state by self-diagnosing the presence of occurrence of a short circuit before the latch relay attempts to return to the ON (closed) position after operating to an OFF (open) position. Therefore the latch relay may not become fixed and damaged due to the returning of the latch relay to the ON (closed) position during a short-circuit state, thereby guaranteeing the reuse of the latch relay.
    Type: Grant
    Filed: December 13, 2014
    Date of Patent: January 9, 2018
    Assignees: Hyundai Motor Company, Kia Motors Corporation
    Inventor: Young Jong Lee
  • Patent number: 9755586
    Abstract: This radiofrequency power limiter includes at least one transistor, a drain of the transistor being directly connected to a mesh connecting an input to an output of the limiter, a source of the transistor being connected to a common reference potential, and a gate of the transistor being connected to a common control potential. The transistor is not biased between its drain and its source during operation of the limiter.
    Type: Grant
    Filed: November 18, 2014
    Date of Patent: September 5, 2017
    Assignee: THALES
    Inventors: Jean-Philippe Plaze, Vincent Petit, Benoît Mallet-Guy
  • Patent number: 9654023
    Abstract: The direct current (DC) side fault isolator for high voltage direct current (HVDC) converters (10) includes a first set of double thyristor switches (12) connected across the line-to-line voltage terminals between first and second phases of alternating current (AC) terminals of a HVDC converter (14), and a second set of double thyristor switches (12) connected across the line-to-line voltage between the second phase and a third phase of the AC terminals of the HVDC converter (14). In use, the first and second sets of double thyristor switches (12) separate the HVDC converter (10) from an external power grid (18) during direct current (DC) side faults by turning on these thyristors (12).
    Type: Grant
    Filed: January 27, 2015
    Date of Patent: May 16, 2017
    Assignee: QATAR FOUNDATIONFOR EDUCATION, SCIENCE AND COMMUNICTY DEVELOPMENT
    Inventors: Ahmed Elserougi, Ayman Abdel-Khalik, Ahmed Massoud, Shehab Ahmed
  • Patent number: 9438222
    Abstract: A method for switching a cycle in a power transistor circuit is created, especially in a parallel circuit of power transistors. The method includes the step of specifying a switching time difference and the switching of the power transistors of two switching times which are separate from one another by use of the switching time difference.
    Type: Grant
    Filed: October 15, 2014
    Date of Patent: September 6, 2016
    Assignee: Continental Automotive GmbH
    Inventor: Martin Goetzenberger
  • Patent number: 9419428
    Abstract: A protection device includes a diode having its forward direction in a normal power flow of a region of a DC collection system, a first switch in parallel with the diode, a second switch in series with the diode and a control unit for controlling the switches. The first switch can be opened so that current can flow through the diode in the forward direction without the first switch bypassing the diode, and closed if no current is flowing through the diode in the forward direction and power is needed upstream of the diode. The second switch can be closed so that current can flow through the diode in the forward direction to an AC grid interface of the DC collection system, and opened if no current is flowing through the diode in the forward direction due to a fault in a DC feeder to which the device is coupled.
    Type: Grant
    Filed: May 15, 2014
    Date of Patent: August 16, 2016
    Assignee: ABB TECHNOLOGY AG
    Inventors: Li Qi, Jiaqi Liang, Jiuping Pan
  • Publication number: 20150146332
    Abstract: An intrinsically safe voltage clamping device includes a regulated rail, a ground rail, and a shunt regulator assembly. The shunt regulator assembly is coupled to both the regulated rail and the ground rail and includes one or more regulating components. The shunt regulator assembly is configured to clamp a voltage applied across the regulated rail and the ground rail to a safety clamp voltage value. The intrinsically safe voltage clamping device also includes a power-sensing component configured to cause one or more limiting components to reduce a power dissipated in the respective regulating components without raising the clamp voltage.
    Type: Application
    Filed: November 26, 2013
    Publication date: May 28, 2015
    Applicant: Fisher Controls International LLC
    Inventor: Stephen G. Seberger
  • Patent number: 9022010
    Abstract: An ignition system is provided, which can restrict decreasing of constant-voltage duration of a spark plug and effectively prevents the occurrence of an accidental fire in an engine. A typical ignition system includes a secondary coil having one end connected to a positive side of a battery via a low-voltage side path and the other end connected to a center electrode via a connecting path which connects the secondary coil and the spark plug. A constant-voltage path having a grounded end is connected to the connecting path. A block diode is arranged between the secondary coil and a point where the constant-voltage path is connected with the connecting path. A Zener diode is disposed within the constant-voltage path. Each anode of the block diode and the Zener diode is mutually connected.
    Type: Grant
    Filed: February 4, 2013
    Date of Patent: May 5, 2015
    Assignee: Denso Corporation
    Inventors: Masamichi Shibata, Yuji Kajita, Atsuya Mizutani, Koichi Hattori, Yasuomi Imanaka
  • Publication number: 20150085411
    Abstract: A transceiver includes a control module and a transceiving module. The control module is configured to generate a control signal in response to a signal from a micro-control unit. The transceiving module is integrated with the control module. The transceiving module is configured to, in response to the control signal, broadcast a first electrical signal to a bus and receive a second electrical signal from the bus.
    Type: Application
    Filed: November 28, 2014
    Publication date: March 26, 2015
    Inventors: TSEN-SHAU YANG, YUAN-CHIH CHUNG
  • Publication number: 20150085410
    Abstract: A load driving device includes a driving switching element, an interrupting part, a short-circuiting switching element, and a protecting element. The driving switching element drives a load by controlling energization to the load. The interrupting part is disposed on an energizing path to the load. The interrupting part is not melted by a driving current to the load and is melted by an interrupting current larger than the driving current so as to interrupt energization to the load. The short-circuiting switching element is connected in parallel with the load and applies the interrupting current to the interrupting part. The protecting element protects the short-circuiting switching element.
    Type: Application
    Filed: September 8, 2014
    Publication date: March 26, 2015
    Inventors: Satoshi NISHIMOTO, Toru ITABASHI, Yuki MIKAMI, Ryoichi SHIRAISHI
  • Publication number: 20150070806
    Abstract: Apparatus and methods for active detection, timing, and protection related to transient electrical events are disclosed. A detection circuit generates a detection signal in response to a transient electrical stress. First and second driver circuits of an integrated circuit, each driver having one or more bipolar junction transistors, activate based on the detection signal and generate activation signals. The one or more bipolar junction transistors of the first and second driver circuits are configured to conduct current substantially laterally across respective base regions. A discharge circuit, having an upper discharge element and a lower discharge element, receives the activation signals and activates to attenuate the transient electrical event.
    Type: Application
    Filed: September 11, 2013
    Publication date: March 12, 2015
    Applicant: ANALOG DEVICES, INC.
    Inventors: Srivatsan Parthasarathy, Javier Alejandro Salcedo
  • Publication number: 20150062764
    Abstract: The ESD protection circuit includes a detection controlling circuit that is connected between the power supply line and the grounding line, detects a current flowing through the power supply line and outputs a controlling signal responsive to a result of the detection. The ESD protection circuit includes a protecting nMOS transistor connected to the power supply line at a drain thereof and receives the controlling signal at a gate thereof. The ESD protection circuit includes one stage of PN-junction diode connected to a source of the protecting nMOS transistor at an anode thereof and to the grounding line at a cathode thereof.
    Type: Application
    Filed: March 4, 2014
    Publication date: March 5, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Naoki WAKITA, Mitsuhiro YANO, Ryuji NISHIMOTO, Katsuhiko MURATA
  • Patent number: 8971000
    Abstract: A leak current absorption circuit for absorbing a leak current from an output transistor includes a switch connected to a grounding node on one end, a constant voltage circuit connected between the other end of the switch and an output node, a switch-operating circuit connected between the output node and the grounding node to operate the switch based on a voltage of the output node. When the voltage of the output node becomes equal to a predetermined threshold voltage or more, the switch-operating circuit turns on the switch to clamp the voltage of the output node by allowing at least a portion of the leak current from the output transistor flow to the grounding node.
    Type: Grant
    Filed: August 23, 2013
    Date of Patent: March 3, 2015
    Assignee: Rohm Co., Ltd.
    Inventor: Takeshi Nagata
  • Publication number: 20150049405
    Abstract: An arrester bypass device can include a switch having an normal state and an operated state. The arrester bypass device can also include a first electrode mechanically coupled to the switch, where the first electrode is held when the switch is in the normal state and released when the switch is in the operated state. The arrester bypass device can also include a second electrode positioned in line with the first electrode, wherein the first electrode contacts the second electrode when the switch is in the operated state. The arrester bypass device can further include a ground strap having a first end and a second end, where the first end is mechanically coupled to the plunger, and where the second end is mechanically coupled to an electrical ground.
    Type: Application
    Filed: August 13, 2013
    Publication date: February 19, 2015
    Applicant: Cooper Technologies Company
    Inventors: Michael M. Ramarge, Jeremy L. Martin, Jonathan J. Woodworth, Timothy S. Smith
  • Publication number: 20150049406
    Abstract: An electrostatic discharge, ESD, protection circuit arrangement is connectable to a first pin and a second pin of an electronic circuit and arranged to at least partly absorb an ESD current entering the electronic circuit through at least one of the first pin or the second pin during an ESD stress event. The protection circuit arrangement comprises a first ESD protection circuit arranged to absorb a first portion of the ESD current during a first part of the ESD stress event during which first part a level of the ESD current exceeds a predetermined current threshold; and a second ESD protection circuit arranged to absorb a second portion of the ESD current, the second portion having a current level below the current threshold, at least during a second part of the ESD stress event. The second ESD protection circuit comprises a current limiting circuit arranged to limit a current through at least a portion of the second ESD protection circuit to the current threshold.
    Type: Application
    Filed: February 29, 2012
    Publication date: February 19, 2015
    Applicant: Freescale Semiconductor, Inc.
    Inventors: Patrice Besse, Jerome Casters, Jean-Philippe Laine, Alain Salles
  • Publication number: 20150036249
    Abstract: A protection circuit is coupled between a power supply unit and a device. The protection circuit includes a delay circuit, a power circuit, a switch circuit, and a determining circuit. The power supply unit supplies power to the device through the power circuit when the device works normally. The delay circuit receives a power good signal and outputs the power good signal after a preset period of time to the switch circuit. The switch circuit energizes the determining circuit when the switch circuit receives the power good signal. The determining circuit outputs a control signal to the power circuit to disconnect the power supply unit from the device when the device is short-circuited.
    Type: Application
    Filed: August 1, 2014
    Publication date: February 5, 2015
    Inventors: BO TIAN, KANG WU
  • Publication number: 20150029626
    Abstract: An electronic device comprises a control module, a transceiving module, a first isolator, and a second isolator. The control module is configured to generate a control signal in response to a signal from an MCU. The transceiving module comprises a transceiving unit, which further comprises a first switch and a second switch. The electronic device further comprises a first isolator and a second isolator. The first isolator is external to the transceiving unit and is coupled between the first switch and a bus. Moreover, the first isolator is configured to isolate a first spike current coming from the bus. The second isolator is external to the transceiving unit and is coupled between a terminal of the second switch and the bus. Moreover, the second isolator is configured to direct a second spike current coming from the bus to the ground.
    Type: Application
    Filed: September 26, 2013
    Publication date: January 29, 2015
    Applicant: MYSON CENTURY, INC.
    Inventors: TSEN-SHAU YANG, YUAN-CHIH CHUNG, PO YUAN LIN
  • Publication number: 20150022923
    Abstract: Apparatus and methods disclosed herein implement steady-state and fast transient electronic current limiting through power transistors, including power transistors used as pass elements associated with general purpose drivers. Embodiments herein prevent excessive steady-state current flow through one or more driver pass elements and/or through load elements in series with the pass element(s) via a current sensing and driver preamplifier feedback loop. A transient over-current protection circuit includes a fast transient switch and a transient over-current control circuit. The transient over-current control circuit rectifies one or more transient voltage spikes to create a momentary direct current (DC) voltage power supply (MVS) to power a fast transient driver circuit and to trip the fast transient switch. The fast transient switch discharges a transient pass element input voltage (e.g.
    Type: Application
    Filed: August 20, 2013
    Publication date: January 22, 2015
    Inventors: Matthieu Chevrier, Michael Weitz
  • Patent number: 8937794
    Abstract: An apparatus includes a probe card, a plurality of sort probes coupled to the probe card and detector circuitry to detect a real time over current occurrence at the sort probes.
    Type: Grant
    Filed: September 28, 2012
    Date of Patent: January 20, 2015
    Assignee: Intel Corporation
    Inventors: Benjamin J. Norris, Pooya Tadayon, Mark W. Dryfuse
  • Patent number: 8885305
    Abstract: A high performance ESD protection circuit is provided. Embodiments include a circuit having an RC clamp circuit including a first NMOS transistor having a first source, drain, and gate, a current mirror circuit including first and second PMOS transistors having a second and third source, drain, and gate, respectively, and an SCR circuit including a first P+ contact. The first source is coupled to a ground rail, the first drain is coupled to the second drain, second gate, and third gate, the second and third sources are coupled to a power rail, and the third drain is coupled to the first P+ contact, wherein during an ESD event the first NMOS and PMOS transistors turn on to discharge a first current to the ground rail, and the current mirror provides a second current to the first P+ contact for turning on the SCR.
    Type: Grant
    Filed: April 25, 2012
    Date of Patent: November 11, 2014
    Assignee: GlobalFoundries Singapore Pte. Ltd.
    Inventors: Yi Shan, Manjunatha Prabhu
  • Publication number: 20140321012
    Abstract: A power switching circuit includes a power semiconductor element that includes a main switching element connected in parallel with a main body diode and a sense switching element connected in parallel with a sense body diode; a reverse overcurrent detection circuit that detects an overcurrent flowing in the reverse direction out of currents flowing through a parallel-connection body of the sense switching element and the sense body diode; and a control circuit that drives the gate of the power semiconductor element; wherein when the reverse overcurrent detection circuit detects a reverse overcurrent, the control circuit controls the main switching element and the sense switching element to turn on.
    Type: Application
    Filed: February 8, 2013
    Publication date: October 30, 2014
    Applicant: Mitsubishi Electric Corporation
    Inventor: Yasushi Nakayama
  • Publication number: 20140301003
    Abstract: The present disclosure relates to a junction box for a solar panel, having a protective circuit that defines an operating state and a protected state. The protective circuit includes a short-circuiting switch between the output-side connecting elements of the first and second external connecting lines and an isolating switch between the short-circuiting switch and one of the poles of the solar panel, in which in the protected state, the short-circuiting switch short-circuits the output-side connecting elements of the first and second connecting lines to each other and the isolating switch disconnects the short-circuiting switch from the solar panel on at least one side.
    Type: Application
    Filed: August 14, 2012
    Publication date: October 9, 2014
    Applicant: PHOENIX CONTACT GMBH & CO. KG
    Inventor: Martin Jankowski
  • Publication number: 20140268443
    Abstract: In one general aspect, an apparatus can include an input terminal, an output terminal and a ground terminal. The apparatus can also include an overcurrent protection device coupled between the input terminal and the output terminal. The apparatus can further include a thermal shunt device coupled between the output terminal and the ground terminal, the thermal shunt device being configured to, at a threshold temperature, operate in a thermally-induced low-impedance state.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 18, 2014
    Applicant: FAIRCHILD SEMICONDUCTOR CORPORATION
    Inventors: Christopher Nassar, William Newberry, Adrian Mikolajczak, Jamie Bravo
  • Publication number: 20140268453
    Abstract: A current limiter system includes a superconducting fault current limiter (SCFCL) operative to conduct load current during a normal operation state in which the SCFCL is in a superconducting state. The current limiter system also includes a shunt reactor connected in an electrically parallel fashion to the SCFCL and configured to conduct less current than the SCFL in the normal operation state, and a protection switch connected in electrical series with the SCFCL and shunt reactor and configured to disconnect the SCFCL for a predetermined time from a load current path during a fault condition after fault current exceeds a threshold current value.
    Type: Application
    Filed: March 15, 2013
    Publication date: September 18, 2014
    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventor: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
  • Patent number: 8809986
    Abstract: Provided is a semiconductor device capable of reducing a temperature-dependent variation of a current sense ratio and accurately detecting current. In the semiconductor device, at least one of an impurity concentration and a thickness of each semiconductor layer is adjusted such that a value calculated by a following equation is less than a predetermined value: [ ? i = 1 n ? ( R Mi × k Mi ) - ? i = 1 n ? ( R Si × k Si ) ] / ? i = 1 n ? ( R Mi × k Mi ) where a temperature-dependent resistance changing rate of an i-th semiconductor layer (i=1 to n) of the main element domain is RMi; a resistance ratio of the i-th semiconductor layer of the main element domain relative to the entire main element domain is kMi; a temperature-dependent resistance changing rate of the i-th semiconductor layer of the sense element domain is RSi; and a resistance ratio of the i-th semiconductor layer of the sense element domain to the entire sense element domain is kSi.
    Type: Grant
    Filed: May 29, 2009
    Date of Patent: August 19, 2014
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Hidefumi Takaya, Kimimori Hamada, Yuji Nishibe
  • Publication number: 20140168835
    Abstract: A method and apparatus for a smart junction box including: a first set of switches connected across input terminals adapted for connection to output terminals of a plurality of photovoltaic (PV) modules, a plurality of diodes connected across input terminals of each respective switch in the first set of switches, at least one reverse current detection device on at least one output terminal of the smart junction box, a second set of switches to selectively disconnect and short circuit output terminals of the smart junction box when a reverse current is detected, and wherein at least one switch of the second set of switches is located across the output terminals, a controller for controlling the first and second set of switches.
    Type: Application
    Filed: December 12, 2013
    Publication date: June 19, 2014
    Applicant: Enphase Energy, Inc.
    Inventor: Martin Fornage
  • Publication number: 20140111895
    Abstract: A surge protection circuit, related to the power electronics field. The surge protection circuit includes: an input configured to provide direct current power supply, an output configured to connect to a next circuit, and a cutoff circuit connected to the output; the surge protection circuit further includes: a discharge circuit connected between the input and the cutoff circuit; the discharge circuit includes: a diode and a field-effect transistor; the cathode of the diode is connected to the positive end of the input, and the anode of the diode is connected to the source of the field-effect transistor; the gate of the field-effect transistor is connected to the positive end of the input, the drain of the field-effect transistor is connected to the negative end of the input, and the direction of the parasitic diode of the field-effect transistor is opposite to the direction of the diode.
    Type: Application
    Filed: December 31, 2013
    Publication date: April 24, 2014
    Applicant: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Xuewen PENG, Wenzong Cao
  • Publication number: 20140092505
    Abstract: An apparatus includes a probe card, a plurality of sort probes coupled to the probe card and detector circuitry to detect a real time over current occurrence at the sort probes.
    Type: Application
    Filed: September 28, 2012
    Publication date: April 3, 2014
    Inventors: Benjamin J. Norris, Pooya Tadayon, Mark W. Dryfuse
  • Publication number: 20140091714
    Abstract: Aspects of the disclosure provide a circuit that includes a driver circuit and a current limiter circuit. The driver circuit is configured to drive a load with an output current when the load is coupled with the driver circuit. The current limiter circuit is configured to turn on a path to deplete a portion of the output current from the driver circuit in order to prevent a load current flowing through the load from exceeding a current limit.
    Type: Application
    Filed: September 27, 2013
    Publication date: April 3, 2014
    Applicant: Marvell World Trade Ltd.
    Inventors: Sehat Sutardja, Wanfeng Zhang
  • Publication number: 20140071568
    Abstract: A protection circuit for an alternative energy source comprises a primary path including an isolation element, e.g., diode or transistor, to prevent current backflow into the alternative energy source from the power device. A low resistance bypass path around the isolation element is also provided. In a protection mode, the bypass path is opened so current must flow through the primary path. In a bypass mode, the bypass path is closed to provide a low resistance path for current to flow from the alternative energy source to the power device.
    Type: Application
    Filed: October 31, 2012
    Publication date: March 13, 2014
    Inventors: Julius Michael Liptak, Mark John Kocher, George Edmund Burke
  • Publication number: 20140063668
    Abstract: A leak current absorption circuit for absorbing a leak current from an output transistor includes a switch connected to a grounding node on one end, a constant voltage circuit connected between the other end of the switch and an output node, a switch-operating circuit connected between the output node and the grounding node to operate the switch based on a voltage of the output node. When the voltage of the output node becomes equal to a predetermined threshold voltage or more, the switch-operating circuit turns on the switch to clamp the voltage of the output node by allowing at least a portion of the leak current from the output transistor flow to the grounding node.
    Type: Application
    Filed: August 23, 2013
    Publication date: March 6, 2014
    Applicant: Rohm Co., Ltd.
    Inventor: Takeshi Nagata
  • Patent number: 8630074
    Abstract: A triac circuit comprises a triac having first and second main terminals (MT1,MT2) and a gate terminal and a thyristor connected between one of the main terminals (MT1,MT2) and a control terminal of the triac circuit. The thyristor is used to prevent turn on of the triac when it has turned on by temperature induced leakage currents.
    Type: Grant
    Filed: March 29, 2012
    Date of Patent: January 14, 2014
    Assignee: NXP, B.V.
    Inventors: Nicholas John Ham, Ed Huang, Jianfeng Zhang, Andrew Mark Warwick, Andrew Butler, Minghaoi Jin
  • Patent number: 8625316
    Abstract: A neutral point clamped (NPC) power converter fault protection system is provided, and include a DC bus, a switching network, and a control module. The switching network is connected to the DC bus. The switching network includes at least two leg circuits. Each of the at least two leg circuits includes at least two switches connected in series and two NPC diodes. Each of the two NPC diodes corresponds to one of the at least two switches. Each of the at least two switches has an open position. The two NPC diodes are connected between a corresponding one of the at least two leg circuits and the DC bus. The control module is in communication with the switching network. The control module includes control logic for monitoring the switching network to detect a fault condition.
    Type: Grant
    Filed: December 9, 2011
    Date of Patent: January 7, 2014
    Assignee: General Electric Company
    Inventors: Petar Jovan Grbovic, Mathieu Giroux
  • Publication number: 20130321965
    Abstract: A residual-current circuit breaker includes switching contacts and at least one residual current detector configured to determine a residual current signal. The residual-current circuit breaker is configured to bring about an opening of the switching contacts upon the detection of a residual current greater than a pre-definable tripping current. A first circuit arrangement is configured to inhibit tripping of the residual-current circuit breaker when a residual current occurs that has a duration that is shorter than half a period of a grid frequency of an associated electrical grid.
    Type: Application
    Filed: February 16, 2012
    Publication date: December 5, 2013
    Applicant: EATON INDUSTRIES (AUSTRIA) GMBH
    Inventor: Ronaldus Niehoff
  • Publication number: 20130314827
    Abstract: A current detecting mechanism according to this invention includes a direct current shunt having a plurality of resistor members with high resistivity to output an electric potential difference across the resistor members, proportional to a current flowing through an electric load side terminal, as a voltage signal, and a hall sensor assembly having a pair of magnetic cores installed to face each other with an air gap therebetween, and a hall sensor to output an output voltage according to a magnetic flux induced in proportion to a current flowing through a load side terminal, without being connected with the direct current shunt, of load side terminals.
    Type: Application
    Filed: May 7, 2013
    Publication date: November 28, 2013
    Applicant: LSIS CO., LTD.
    Inventor: Jong Mahn SOHN
  • Publication number: 20130301166
    Abstract: Method for protecting an electrical energy distribution box, the electrical energy distribution box comprising a set of distribution bars intended to be connected between a generator and loads, each of the bars being able to transfer at least a part of the electrical energy passing through it to at least one other bar of the set of bars. According to this method, the incoming and outgoing currents of a single distribution bar are measured and a fault in the set of bars is detected on the basis of the currents measured in the said bar.
    Type: Application
    Filed: April 10, 2013
    Publication date: November 14, 2013
    Inventor: Jérôme Jean-Louis Comeil Valire
  • Publication number: 20130286520
    Abstract: A high performance ESD protection circuit is provided. Embodiments include a circuit having an RC clamp circuit including a first NMOS transistor having a first source, drain, and gate, a current mirror circuit including first and second PMOS transistors having a second and third source, drain, and gate, respectively, and an SCR circuit including a first P+ contact. The first source is coupled to a ground rail, the first drain is coupled to the second drain, second gate, and third gate, the second and third sources are coupled to a power rail, and the third drain is coupled to the first P+ contact, wherein during an ESD event the first NMOS and PMOS transistors turn on to discharge a first current to the ground rail, and the current mirror provides a second current to the first P+ contact for turning on the SCR.
    Type: Application
    Filed: April 25, 2012
    Publication date: October 31, 2013
    Applicant: GLOBALFOUNDRIES Singapore Pte. Ltd.
    Inventors: Yi Shan, Manjunatha Prabhu
  • Publication number: 20130286521
    Abstract: In an example embodiment, systems and methods for detecting and handling faults in a DC bus system (“system”) can comprise detecting a fault in the segment, isolating the segment from the system, waiting for a period of time, connecting a probe power unit to the system at the isolated segment, and determining if a fault still exists on the isolated segment, wherein the determining is based on whether power is discharging from the probe power unit when connected to the system. The system can comprise one or more controllers and a probe power unit.
    Type: Application
    Filed: March 15, 2013
    Publication date: October 31, 2013
    Applicant: The Regents of the University of Colorado, a body corporate
    Inventor: Jae-Do Park
  • Patent number: 8570779
    Abstract: A device for converting an electric current has a phase module, which in turn has an alternating current connection and at least one direct current connection connected to an intermediate direct current circuit. The device further has an energy accumulator. A phase modulation path is formed between each direct current connection and each alternating current connection. Each phase modulation path has a series connection of submodules, which each have a power semiconductor. A semiconductor protective device is provided in parallel connection to power semiconductors of each submodule. A control unit actuates the semiconductor protective device, and energy accumulator(s) are equipped for supplying energy to the control unit. The device safely prevents damage from a short circuit on the direct-current side, even when the supply grid is connected, because a direct current connection of each phase module is connected to the intermediate direct current circuit via a direct-current switch.
    Type: Grant
    Filed: March 13, 2007
    Date of Patent: October 29, 2013
    Assignee: Siemens Aktiengesellschaft
    Inventors: Mike Dommaschk, Jörg Dorn, Ingo Euler, Jörg Lang, Quoc-Buu Tu, Klaus Würflinger
  • Publication number: 20130140890
    Abstract: An overload protection circuit for supplying electric power has advantageous applications especially in supplying power to capacitive loads. In prior art circuits, the charging current is lead to the capacitive load through a linearly operating transistor or through a power resistor. Therefore, prior art circuits often involve a risk of exceeding safe operating area of a power transistor, or circuits with a large number of components are needed. The present overload protection circuit has an inductor (L) coupled in series with a switching element (Q). Load current is measured (35, 38), and the switching element (Q) is controlled (35, 36) to supply current to the load via the inductor (L) until a determined current limit is achieved. After achieving the current limit the switching element (Q) is controlled to off-state, during which the freewheeling current of the inductor (L) is lead through a voltage dependent element (Z).
    Type: Application
    Filed: December 3, 2012
    Publication date: June 6, 2013
    Applicant: EFORE OYJ
    Inventor: Efore Oyj
  • Patent number: 8452255
    Abstract: A field device for use in an industrial process control or monitoring system includes terminals configured to connect to a two-wire process control loop configured to carry data and to provide power. In one embodiment, RF circuitry in the field device is configured for radio frequency communication having variable power consumption. In another embodiment, the RF circuitry is coupled to the field device through a separate digital communication bus. A method of modulating the power of RF communication based upon a process communication signal is also provided.
    Type: Grant
    Filed: June 27, 2006
    Date of Patent: May 28, 2013
    Assignee: Rosemount Inc.
    Inventor: Kelly M. Orth
  • Publication number: 20130083441
    Abstract: A lightning surge detector 1 includes a first terminal unit 3 connected to a ground-side terminal unit of a surge protective device, a second terminal unit 4 connected with a ground wire, a conducting coupling bar 5 adapted to couple the first terminal unit 1 and the second terminal unit 4, a detection coil 7 placed in a vicinity of the conducting coupling bar 5 and adapted to detect a lightning surge current flowing through the conducting coupling bar 5, a waveform processing unit adapted to stretch a voltage waveform of the detected lightning surge current and thereby output a waveform-modified voltage, a computation control unit adapted to produce a calculation result of the lightning surge current from the waveform-modified voltage, and a display unit 40 adapted to display the calculation result, wherein all the above components are unitized by being housed in a casing 2.
    Type: Application
    Filed: July 27, 2012
    Publication date: April 4, 2013
    Applicant: SANKOSHA CORPORATION
    Inventors: Shuji HIGASHI, Yuichi TAKAHASHI, Kenichi EBUCHI, Tsuyoshi KAWABATA
  • Publication number: 20130063847
    Abstract: A fault protection circuit for use on a spur of an IEC 61158 Fieldbus network comprising a fast acting current limiter adapted to limit the spur current to the level of a reference current when the spur current reaches said reference current, control means adapted to monitor the spur AC and/or DC current and/or voltage, and isolation means adapted to apply a shunt short circuit isolation to said spur upon receipt of an activation signal from the control means, in which the control means is adapted to control the level of the reference current, and in which when said control means detects one or more pre-determined fault conditions on said spur it activates the isolation means and lowers the level of reference current.
    Type: Application
    Filed: May 24, 2011
    Publication date: March 14, 2013
    Applicant: PEPPERL + FUCHS GMBH
    Inventors: Renato Kitchener, Steffen Graber
  • Patent number: 8390970
    Abstract: A method and a system for ESD protection are provided. In one embodiment, the system comprises a circuit comprising at least one non-linear element, an application module configured to apply a set of current pulses to the circuit, a determination module configured to determine at least one frequency-dependent and amplitude-dependent transfer function of the circuit based on the set of applied current pulses, a modeling module configured to model at least one frequency-dependent and current-dependent impedance of the at least one non-linear element, and a simulation module to simulate a transmission to the circuit based on the model.
    Type: Grant
    Filed: October 27, 2010
    Date of Patent: March 5, 2013
    Assignee: Infineon Technologies AG
    Inventors: Harald Gossner, David Johnsson, Wolfgang Soldner
  • Publication number: 20130050887
    Abstract: Circuits, integrated circuits, apparatuses, and methods, such as those for protecting circuits against electrostatic discharge events are disclosed. In an example method, a thyristor is triggered to conduct current from a signal node to a reference voltage node using leakage currents provided by a transistor formed in a semiconductor doped well shared with the base of the thyristor. The leakage currents are responsive to a noise event (e.g., electrostatic discharge (ESD) event) at the signal node, and increase the voltage of the semiconductor doped well to forward bias the base and the collector of the thyristor. The triggered thyristor conducts the current resulting from the ESD event to the reference voltage node.
    Type: Application
    Filed: August 23, 2011
    Publication date: February 28, 2013
    Applicant: Micron Technology, Inc.
    Inventors: Xiaofeng Fan, Michael D. Chaine
  • Patent number: 8384292
    Abstract: Methods of protecting an electrical device, such as a ballast, from damage due to an inrush current, and devices incorporating such methods, are disclosed. A loss of input power received by the ballast is detected. In response, the ballast is entered into a standby mode. The ballast is able to remain in the standby mode for a standby period of time. The input power is monitored during the standby period of time to measure a start time. Measurement of the start time is triggered by the ballast receiving input power again. The ballast is entered into an active mode when the measured start time exceeds a protection time. The protection time corresponds to an amount of time needed for an inrush current to dissipate following input power again being received by the ballast, protecting the ballast from possible damage due to the inrush current.
    Type: Grant
    Filed: April 2, 2010
    Date of Patent: February 26, 2013
    Assignee: Osram Sylvania Inc.
    Inventors: Afroz M. Imam, Sivakumar Thangavelu
  • Publication number: 20130015833
    Abstract: A power converter includes a bypass circuit connected in parallel with a power stage of the power converter. The bypass circuit provides a lower loss current path in parallel with the power stage when an input voltage of the power converter exceeds a predetermined threshold. The power converter may be a boost power converter used in a vehicle to provide power from a main power bus of the vehicle to a subsystem of the vehicle such as an anti-lock brake system.
    Type: Application
    Filed: July 14, 2011
    Publication date: January 17, 2013
    Inventors: Mark Steven George, Charles Lawrence Bernards