Abstract: Techniques for detecting inactive peers of a tunneled communication session, while allowing for a scalable tunneled protocol that includes split control plane nodes and data plane nodes are described herein. A method according to a technique described herein may include establishing a communication session between a first node and a second node in a network such that control plane traffic of the communication session flows through one or more control nodes and data plane traffic of the communication session flows through one or more data nodes different than the one or more control nodes. The method may also include receiving, at a control node, an indication from a data node that a probe message is to be generated. The probe message may be configured to determine data plane connectivity in the communication session. Additionally, the control node may generate the probe message and send it to the first node.

Abstract: According to one embodiment, a magnetic memory device includes a first conductor extending along a first direction, a second conductor extending along a second direction and above the first conductor, and a first layer stack provided between the first conductor and the second conductor and including a first magnetoresistance effect element. The first layer stack has a rectangular shape along a stack surface of the first layer stack. The rectangular shape of the first layer stack has a side intersecting with both the first direction and the second direction.

Abstract: A wireless communication system to synchronize data transfer rates. A hard disk drive controller receives a first Long Term Evolution (LTE) Radio Resource Connection message generated by an eNodeB proposing a wireless communication network download data rate. The hard disk drive controller compares the proposed wireless communication network download rate in the first LTE RRC message with a hard disk drive storage data rate. If the proposed wireless communication network download rate is higher than the hard disk drive storage data rate, then the hard disk controller transfers a second LTE RRC message requesting a lower wireless communication network download rate.

Abstract: Hydro-carbon nanorings may be used in storage. Sufficiently cooled, an externally hydrogen doped carbon nanoring may be used to create a radial dipole field to contain streams of electrons. Similarly, an internally hydrogen doped carbon nanoring may be used to create a radial dipole field to contain streams of positrons. When matched streams of positrons and electrons are sufficiently compressed they may form Cooper pairs with magnetic moments aligned to the movement of the stream. Matched adjacent Cooper pairs of electrons and positrons may contain information within their magnetic moments, and as such, may transmit and store information with little or no energy loss. Information may be similarly encoded in magnetic moments of spins of pairs of positrons and electrons, not in the form of Cooper pairs.

Abstract: In one embodiment, the invention is a hybrid superconducting-magnetic memory cell and array. One embodiment of a memory cell includes a magnetoresistive element and at least one superconducting element wired in parallel with the magnetoresistive element. In a further embodiment, memory cells of the disclosed configuration are arranged to form a memory array.

Abstract: Hydro-carbon nanorings may be used in storage. Sufficiently cooled, an externally hydrogen doped carbon nanoring may be used to create a radial dipole field to contain streams of electrons. Similarly, an internally hydrogen doped carbon nanoring may be used to create a radial dipole field to contain streams of positrons. When matched streams of positrons and electrons are sufficiently compressed they may form Cooper pairs with magnetic moments aligned to the movement of the stream. Matched adjacent Cooper pairs of electrons and positrons may contain information within their magnetic moments, and as such, may transmit and store information with little or no energy loss.

Abstract: In one embodiment, the invention is a hybrid superconducting-magnetic memory cell and array. One embodiment of a memory cell includes a magnetoresistive element and at least one superconducting element wired in parallel with the magnetoresistive element. In a further embodiment, memory cells of the disclosed configuration are arranged to form a memory array.

Abstract: Provided are transistor devices such as logic gates that are capable of associating a computational state and or performing logic operations with detectable electronic spin state and or magnetic state. Methods of operating transistor devices employing magnetic states are provided. Devices comprise input and output structures and magnetic films capable of being converted between magnetic states.

Abstract: A paper-sheet recognition apparatus recognizes a paper sheet, which is being transported, by using an optical line sensor and a magnetic line sensor. The paper-sheet recognition apparatus includes a memory unit that stores therein magnetic templates defined in advance for respective types and respective transport directions of paper sheets, wherein the magnetic templates are defined at optical resolution representing resolution of the optical line sensor; a selecting unit that selects a magnetic template based on a type and a transport direction of the paper sheet, the type and the transport direction being obtained by analyzing optical data acquired by the optical line sensor; and a comparing unit that divides magnetic data acquired by the magnetic line sensor into pieces of data each corresponding to the optical resolution, and compares the magnetic template selected by the selecting unit with the divided magnetic data.

Abstract: In one embodiment, the invention is a hybrid superconducting-magnetic memory cell and array. One embodiment of a memory cell includes a magnetoresistive element and at least one superconducting element wired in parallel with the magnetoresistive element. In a further embodiment, memory cells of the disclosed configuration are arranged to form a memory array.

Abstract: A technique for performing read operations with reduced errors in a memory device such as flash memory. An automatic gain control approach is used in which cells which have experienced data retention loss are read by a fine M-level quantizer which uses M?1 read threshold voltage levels. In one approach, M-quantized threshold voltage values are multiplied by a gain to obtain gain-adjusted threshold voltage values, which are quantized by an L-level quantizer, where L<M, by comparing the gain-adjusted threshold voltage values to read threshold voltage levels of a fresh memory device. In another approach, the read threshold voltage levels of the fresh device are gain adjusted for reading non-gain-adjusted threshold voltage values from the cells which have experienced data retention loss.

Abstract: Systems and methods are provided for digital transport of paramagnetic particles. The systems and methods may include providing a magnetic garnet film having a plurality of magnetic domain walls, disposing a liquid solution on a surface of the magnetic garnet film, wherein the liquid solution includes a plurality of paramagnetic particles, and applying an external field to transport at least a portion of the paramagnetic particles from a first magnetic domain wall to a second magnetic domain wall of the plurality of magnetic domain walls.

Abstract: Between the value of an electric current and the supply duration for which the electric current is supplied that cause magnetization reversal, there is the relation of monotonous decrease. This means that, as the supply duration is shortened, the threshold current value for causing the magnetization reversal is larger. Therefore, in terms of suppressing occurrence of read disturb, the read current supply duration may be shortened to increase the threshold value of the current causing the magnetization reversal and thereby ensure a sufficient read disturb margin. Therefore, the read current supply duration may be shortened relative to the write current supply duration ensure the read disturb margin and suppress occurrence of read disturb.

Abstract: A memory device with a magnetic field generator and method of operating and manufacturing the same. In the device and method, a magnetic memory may includes a magnetic tunneling junction (MTJ) cell, a transistor, and a bit line, and a magnetic field generator external to the magnetic memory to generate a global magnetic field toward the magnetic memory in a parallel direction to the bit line.

Abstract: A data storage device for storing digital information in a readable form is described made up of one or more memory elements, each memory element comprising a planar magnetic conduit capable of sustaining and propagating a magnetic domain wall formed into a continuous propagation track. Each continuous track is provided with at least one and preferably a large number of inversion nodes whereat the magnetization direction of a domain wall propagating along the conduit under action of a suitable applied field, such as a rotating magnetic field, is changed.

Abstract: A magnetic tunnel junction device includes a magnetically programmable free magnetic layer. The free magnetic layer includes a lamination of at least two ferromagnetic layers and at least one intermediate layer interposed between the at least two ferromagnetic layers.

Abstract: A programmable resistance memory element using a conductive sidewall layer as the bottom electrode. The programmable resistance memory material deposited over the top edge of the bottom electrode, in a slot-like opening of a dielectric material. A method of making the opening.

Abstract: A method for manipulating a quantum system comprises at least one mobile charge carrier with a magnetic moment. The method comprises the steps or acts of applying magnetic field to the charge carrier. The magnetic is spatially non-homogeneous. The method also comprises bringing the charge carrier into an oscillatory movement along a path. The magnetic field depends on the position of the charge carrier on said path. The oscillatory movement may be caused by electrostatic interaction with gate electrodes. Due to this approach, thus, in a magnetic moment resonance process the conventional oscillating magnetic field is replaced by an oscillating electric field which is locally transformed into a magnetic field by the Coulomb interaction that displaces the charge carrier wave function within an inhomogeneous magnetic field or in and out of a magnetic field.

Abstract: The invention concerns a magnetic memory, whereof each memory point consists of a magnetic tunnel junction (60), comprising: a magnetic layer, called trapped layer (61), whereof the magnetization is rigid; a magnetic layer, called free layer (63), whereof the magnetization may be inverse; and insulating layer (62), interposed between the free layer (73) and the trapped layer (71) and respectively in contact with said two layers. The free layer (63) is made with an amorphous or nanocrytallized alloy based on rare earth or a transition metal, the magnetic order of said alloy being of the ferromagnetic type, said free layer having a substantially planar magnetization.

Abstract: Low power magnetoresistive random access memory elements and methods for fabricating the same are provided. In one embodiment, a magnetoresistive random access device has an array of memory elements. Each element comprises a fixed magnetic portion, a tunnel barrier portion, and a free SAF structure. The array has a finite magnetic field programming window Hwin represented by the equation Hwin?(Hsat??sat)?(Hsw+?sw), where Hsw is a mean switching field for the array, Hsat is a mean saturation field for the array, and Hsw for each memory element is represented by the equation HSW??{square root over (HkHSAT)}, where Hk represents a total anisotropy and HSAT represents an anti-ferromagnetic coupling saturation field for the free SAF structure of each memory element. N is an integer greater than or equal to 1. Hk, HSAT, and N for each memory element are selected such that the array requires current to operate that is below a predetermined current value.

Abstract: A method for erasing a flash memory group is provided, which comprises the following steps. (a) Apply a erase (ERS) pulse to a first subset of the group. (b) Perform one of a soft program verification (SPGMV) and a tight soft program verification (TSPGMV) on the first subset of the group. (c) Repeat steps (a) and (b) until a first predetermined condition is true. (d) Perform an erase verification (ERSV) on a second subset of the group. (e) Repeat steps (a) to (d) until a second predetermined condition is true. And (f) fix bit line leakage in a third subset of the group with a slow program (SLPGM) and apply an ERS pulse to the third subset.

Abstract: During data reading, a sense enable signal is activated to start charging of a data line prior to formation of a current path including the data line and a selected memory cell in accordance with row and column selecting operations. Charging of the data line is completed early so that it is possible to reduce a time required from start of the data reading to such a state that a passing current difference between the data lines reaches a level corresponding to storage data of the selected memory cell, and the data reading can be performed fast.

Abstract: Low power magnetoresistive random access memory elements and methods for fabricating the same are provided. In one embodiment, a magnetoresistive random access device has an array of memory elements. Each element comprises a fixed magnetic portion, a tunnel barrier portion, and a free SAF structure. The array has a finite magnetic field programming window Hwin represented by the equation Hwin?(Hsat?N?sat)?(Hsw+N?sw), where Hsw is a mean switching field for the array, Hsat is a mean saturation field for the array, and Hsw for each memory element is represented by the equation HSW??{square root over (HkHSAT)}, where Hk represents a total anisotropy and HSAT represents an anti-ferromagnetic coupling saturation field for the free SAF structure of each memory element. N is an integer greater than or equal to 1. Hk, HSAT, and N for each memory element are selected such that the array requires current to operate that is below a predetermined current value.

Abstract: MRAM has read word lines WLR and write word line WLW extending in the y direction, write/read bit line BLW/R and write bit line BLW extending in the x direction, and the memory cells MC disposed at the points of the intersection of these lines. The memory MC includes sub-cells SC1 and SC2. The sub-cell SC1 includes magneto resistive elements MTJ1 and MTJ2 and a selection transistor Tr1, and the sub-cell SC2 includes magneto resistive elements MTJ3 and MTJ4 and a selection transistor Tr2. The magneto resistive elements MTJ1 and MTJ2 are connected in parallel, and the magneto resistive elements MTJ3 and MTJ4 are also connected in parallel. Further, the sub-cells SC1 and SC2 are connected in series between the write/read bit line BLW/R and the ground.

Abstract: A semiconductor storage device including a tip electrode, a media electrode and a storage media. The storage media has a storage area configurable to be in one of a plurality of structural states to represent information stored at the storage area, by passing a current through the storage area between the tip electrode and media electrode.

Abstract: A magnetic memory includes a magnetic substance composed of a disc-shaped first magnetic layer and a ring-shaped second magnetic layer which is formed on the first magnetic layer.

Abstract: This invention relates to MRAM technology and new variations on MRAM array architecture to incorporate certain advantages from both cross-point and 1T-1MTJ architectures. The fast read-time and higher signal-to-noise ratio of the 1T-1MTJ architecture and the higher packing density of the cross-point architecture are both exploited by combining certain characteristics of these layouts. A single access transistor 16 is used to read multiple MRAM cells, which can be stacked vertically above one another a plurality of MRAM array layers arranged in a “Z” axis direction.

Abstract: MRAM has read word lines WLR and write word line WLW extending in the y direction, write/read bit line BLW/R and write bit line BLW extending in the x direction, and the memory cells MC disposed at the points of the intersection of these lines. The memory MC includes sub-cells SC1 and SC2. The sub-cell SC1 includes magneto resistive elements MTJ1 and MTJ2 and a selection transistor Tr1, and the sub-cell SC2 includes magneto resistive elements MTJ3 and MTJ4 and a selection transistor Tr2. The magneto resistive elements MTJ1 and MTJ2 are connected in parallel, and the magneto resistive elements MTJ3 and MTJ4 are also connected in parallel. Further, the sub-cells SC1 and SC2 are connected in series between the write/read bit line BLW/R and the ground.

Abstract: The present invention discloses a magnetic random access memory for reading two or more data, by sensing the current flowing into source and drain regions. The current is regulated by the amount of a current flowing through an MRJ in an MRAM cell according to a word line voltage. In order to accomplish this object of the present invention, the MRAM comprises a data detecting circuit for converting a current flowing through an MTJ in the MRAM cell into a voltage and detecting data resulting in magnetization orientation ge.

Abstract: A write line structure for a magnetic memory cell includes a write conductor having a front surface facing the memory cell, a back surface and two sides surfaces. A cladding layer is disposed adjacent a portion of the front surface of the write conductor, with the cladding layer terminating at spaced first and second poles adjacent the front surface of the write conductor. A data storage layer is operatively positioned adjacent the cladding layer. The distance between the poles is less than the width of the write conductor. The width of the data storage layer may be greater than or less than the distance between the poles.

Abstract: During data reading, a sense enable signal is activated to start charging of a data line prior to formation of a current path including the data line and a selected memory cell in accordance with row and column selecting operations. Charging of the data line is completed early so that it is possible to reduce a time required from start of the data reading to such a state that a passing current difference between the data lines reaches a level corresponding to storage data of the selected memory cell, and the data reading can be performed fast.

Abstract: A problem associated with the programming of MRAM (magnetic random access memory) has been that the required current is orders of magnitude larger than that needed for many other memory devices such as SRAMs or DRAMs. This problem has been overcome by adding heating lines to the standard array configuration. These lines provide local heating sources located in close proximity to the memory elements so that when a given element is being programmed it is also being heated. The effect of the heating is to lower the threshold for magnetization so that a lower field (and hence reduced program current) can be used. It is also possible to make the base layer of the memory element itself serve as the heating element.

Abstract: A problem associated with the programming of MRAM (magnetic random access memory) has been that the required current is orders of magnitude larger than that needed for many other memory devices such as SRAMs or DRAMs. This problem has been overcome by adding heating lines to the standard array configuration. These lines provide local heating sources located in close proximity to the memory elements so that when a given element is being programmed it is also being heated. The effect of the heating is to lower the threshold for magnetization so that a lower field (and hence reduced program current) can be used. It is also possible to make the base layer of the memory element itself serve as the heating element.

Abstract: A write line structure for a magnetic memory cell includes a write conductor having a front surface facing the memory cell, a back surface and two sides surfaces. A cladding layer is disposed adjacent a portion of the front surface of the write conductor, with the cladding layer terminating at spaced first and second poles adjacent the front surface of the write conductor. A data storage layer is operatively positioned adjacent the cladding layer. The distance between the poles is less than the width of the write conductor. The width of the data storage layer may be greater than or less than the distance between the poles.

Abstract: The integrated circuit has a circuit with information that is protected by a covering shielding level. A network with a large number of nodes is formed in the shielding level. Some of the nodes are linked to a comparator for a nominal-actual comparison. The comparator checks for a characteristic output current from each node. Errors on the characteristic output current lead to a change in the information which is stored in the circuit, so that the latter is protected against manipulation or analysis.

Abstract: The invention described herein defines a system and a method for selectively controlling the sensitivity of a region of a magnetoresistive element to an incident magnetic field, by applying an external magnetic field to the magnetoresistive element. A number of applications to non-volatile data storage are described, as is a magnetic sweep element based on a FET structure. Finally, the storage media and recording modes (in-plane vs. perpendicular) best suited to the proposed applications are analyzed, and the desired or optimal characteristics of the proposed devices are discussed.

Abstract: A method for reproducing an image from a photoprint is disclosed. This aspect of the present invention comprises: providing a photoprint comprising an imaging media and a data storage medium; imaging the imaging media to produce an image on an image side of the media; encoding the data storage medium with data corresponding to the image; reading the data from the data storage medium corresponding to the image; and reproducing the image based on the data read from the data storage medium.

Abstract: A non-volatile memory array includes first and second pluralities of electrically conductive traces formed on a substrate. The second plurality of electrically conductive traces overlap first plurality of traces at a plurality of intersection regions. Each of a plurality of memory cells is located at an intersection region between one of the first plurality of traces and one of the second plurality of traces. At least one of the memory cells includes a non-linear selection element in series with a magnetic tunnel junction storage element. The non-linear selection element includes at least a first metallic electrode layer, a barrier layer and a second metallic electrode layer metal.

Abstract: A magnetic tape unit is provided which performs a read/write operation in a precise timing by regularly using a reference tape on which a reference signal is written. The magnetic tape unit, which transmits data to a magnetic tape drive based on a predetermined clock signal and writes or reads data to or from a magnetic tape, includes means for changing a data transmission timing in which the data is transmitted.

Abstract: A data storing apparatus in which a magnetic storing means includes magnetic memory cells for memorizing data of a first value or a second value. Input data is written to the memory cells separately or simultaneously by electromagnetic induction. One or more magnetic memory cells are selected, with respect to which the data is to be read or written. Each magnetic memory cell has a ferromagnetic body holding the data of the first value or the second value in accordance with direction of magnetization or magnetizing force thereof. The current control means performs the reading or writing of the data with respect to the selected magnetic cells. The current control means comprises semiconductor devices and controls current therethrough in both directions.

Abstract: A nonvolatile magnetic memory array uses magnetic memory cells that are formed in two types of shapes. The cells lie at the intersections of rows and columns of electrically conductive lines, which serve as the conductive paths for the write currents used to change the magnetization states of the magnetic cells. The two types of cells have shapes that are mirror images of each other, i.e, the shape of the second type of cell is arrived at by rotating the first type of cell 180 degrees about an axis through the cell. The two types of cells are thus a pair of asymmetric cells because they are asymmetric in regard to the predominant axis of magnetization. In the preferred pattern, each of the cells has a parallelogram shape with a length and a width with the predominant axis of magnetization lying substantially along a line between the acute corners of the parallelogram.

Abstract: A complete voice record and playback system capable of being powered by a single 1.8 VDC battery is operated in either stand-alone or CPU modes. In the stand-alone mode, two-button operation controls record, play, and memory erase functions. In CPU mode, commands may be provided through a serial interface which directly control record, playback, specialized memory management functions, and power amplifier gain settings. Through a serial interface, the system may be set up to directly write to external memory, using an analog signal generated by a microphone or other analog input device, or may instead be set up so that digital data provided by an external CPU and converted to analog using the on-chip D/A converter may be output by the speaker in real-time.

Abstract: A non-physical movement component recording and reproducing device produces a pair of special waves with special waveforms that form a special stationary waveform. An electrically-conducting media contains three overlaid layers, a first layer contains the special stationary waveform, a middle layer allows signals to be recorded or be reproduced therein, and a third layer allows the signals to be connected. Two diodes are connected in reverse polarity to the third layer wherein one diode is used for recording and reproducing signals, while the other diode is used for erasing unused signals during the recording process. The bias voltage of the diodes is bigger than the peak value of the special waveform, but less than the maximum peak value of the special stationary waveform. The control unit changes at least one of the intermittence length and the phase of the special waves.

Abstract: A ferromagnetic memory circuit (10) and a ferromagnetic memory device (15) which has a substrate (42). Within the substrate (42), a first current electrode (44) and a second current electrode (46) are formed. A control electrode (50) is formed to control current flow between the first and second current electrodes (44 and 46). A ferromagnetic region (68) is used to store a logic value via magnetic flux. Two conductive layers (62 and 70) and a conductive spacer (78) form a sense conductor for device (15). The sense conductor is used to externally provide the logic value stored in the device (15). A conductive layer (82) forms a program/erase line for altering the logic value stored in the device (15). A logic one or a logic zero is stored in ferromagnetic region (68) depending upon a direction and a magnitude of current flow through conductive layer (82).

Abstract: The inclination angle, in the conductor pattern end portion of a magnetic bubble memory element having a bubble diameter of up to 1.2 .mu.m, can be remarkably reduced by employing a polymer resin, having fluidity in a curing process, as the insulation film under the conductor pattern, so that the transfer margin is greatly improved.

Abstract: A hybrid magnetic bubble memory device comprising soft magnetic material propagation tracks and ion-implanted propagation tracks. In the soft magnetic material propagation track region, a layer made of a heat-resistant polymer was provided as an interlaminar insulating layer between a conductor and a pattern of a soft magnetic material. An insulator film made of a heat-resistant polymer was provided on the pattern made of a soft magnetic material. A passivation film made of an inorganic material was provided on the ion-implanted propagation tracks and the insulator film made of a heat-resistant polymer.

Abstract: A garnet film for use in magnetic bubble devices that supports magnetic bubbles with a bubble diameter of 0.4 micron or less. The curie temperature can be made over 240.degree. C., and the garnet film used is suitable for ion implanted devices.

Abstract: In order for the temperature dependence of the strip out field of a magnetic garnet crystal film (54) to match the temperature dependence of the residual magnetization of a permanent magnet (56) for applying a bias magnetic field in a magnetic bubble memory chip (2) after conductor paterns are formed thereon, it is necessary that the temperature coefficient of the collapse field of the magnetic garnet crystal film (51) be from 0.01 to 0.04%/.degree.C., in terms of an absolute value, greater than the temperature coefficient of the above-mentioned residual magnetization (56). The present invention achieves this by increasing the degree of substitution of Lu ions for Fe ions in the octahedral sites constituting the unit lattice of the magnetic garnet crystal. As a result, an operating temperature range about twice as wide as the conventional operating temperature range is ensured.

Abstract: The invention relates to a garnet film for an ion-implanted device characterized in that the quantity of Fe is increased and a predetermined quantity of Gd is added.The garnet film of the invention has a sufficiently high Curie temperature without sacrificing its other properties and hence is extremely suitable as a garnet film for an ion-implanted device.

Abstract: Certain Tm-containing iron garnet compositions provide layers having desirably high values of Curie temperature and magnetic anisotropy and permit the fabrication of devices having 1.2 .mu.m diameter magnetic bubbles. The compositions, based on Tm-substitution on dodecahedral sites of [(La,Bi)(Sm,Eu),(Ca,Sr),R].sub.3 (Fe,Si,Ge).sub.5 O.sub.12, are grown by liquid phase epitaxy onto suitable substrates. Bubble devices that incorporate the layers find applications in high density information storage.