Abstract: A process for evaluating and geocoding of GIS data elements utilizes a plurality of “locate” tests and a weighting scheme to express the match results as a multidimensional vector. Multiple inputs and data sources, as well as ambiguous and partial input data, are used to generate an output with improved precision by applying a weighting function to each input element and generating a set of test vectors (i.e., in the input data element weighted by the known accuracy of the element/source). A sum of a plurality of tests is then generated as the “characteristic vector” of the test set. By using two (or more) different sets of tests, two (or more) characteristic vectors are formed. Various well-known algebraic techniques can then be used to evaluate the results of each set of tests and select the “best match” result.

Abstract: A sensor for sensing magnetic field strength has a sensor element, and detection circuitry for detecting a level of resistance of the sensor element, the level of resistance varying with magnetic field under test and having hysteresis, so that upon electromagnetic excitation the resistance can switch between two or more stable levels as the magnetic field under test varies. The sensor outputs a digital signal according to the level of resistance. The sensor output may further be interpreted in terms of a change-of-state upon electromagnetic excitation. As the sensor no longer needs a different characteristic from magnetic memory cells, it can be much easier to construct and to integrate with magnetic memory cells than an analog sensor. An excitation signal varies a threshold for the magnetic field under test at which the resistance switches, to enable multiple measurements with different thresholds. Multiple sensor elements can have different thresholds, by having differing geometry or size.

Abstract: A method is described for parametrizing an integrated circuit by applying a digital start command signal followed by a parametrization data signal to the supply voltage terminal and/or the output terminal of the integrated circuit. During the parametrization process, the voltage level applied to the supply voltage terminal and/or the output terminal is kept above the normal operating voltage level and detected by a detector device provided in integrated circuit. The integrated circuit includes the supply voltage terminal, a reference potential terminal, and the output terminal, as well as an internal memory which is preferably non-volatile. The adjustment specification for parametrizing the integrated circuit is stored in the memory and activated by the parametrization data signal.

Abstract: A write control driver circuit writes a data in a high-speed semiconductor chip by obtaining an earlier enabling time of a write control signal. The circuit includes a first logic circuit unit that outputs a first pulse signal of an address transition detection signal based on an input write enable signal, a second pulse signal of an address transition detection signal generated after the first pulse signal, and a delay control signal in which the first pulse signal is removed when the first and second pulse signals are inputted thereto. A second logic circuit unit that receives the delay control signal and a coding signal and output a write control signal.

Abstract: An imaging lidar system is presented which employs a multipulse multiple gating system which is particularly well suited for underwater imaging. The imaging lidar system of this invention utilizes a multipulse Q-switched laser operating within the pumping envelope of discharging flash lamps (or other means) to cumulatively illuminate a single frame on a camera (e.g., CCD camera) while the camera is gated repetitively so that each pulse is "observed" at the same depth; that is, the gated camera views that same illuminated area in the ocean. The sequence is repeated at a frequency which is both the laser pulse repetition rate and the camera frame rate. The present invention also allows the use of multiple cameras with frame addition or with frames processed separately. As a result, energy is extracted from the laser in the form of short (1-10 nsec) pulses by rapidly Q-switching during the time the laser is being pumped by the flashlamps.

Abstract: An apparatus for controllable propagation of magnetic domains, or bubbles, through an arrangement of closely spaced magnetic propagating elements arranged in an input stage, a strip-former stage, and a decoder stage. Binary logic circuitry results from selective control of bubble movement through alternate paths of elements, with at least one of said paths producing a domain strip extending the full height of the strip-former stage. The decoder stage includes a propagating element spaced apart from the strip-former stage a distance sufficient to prevent propagation of all domains in the strip-former stage except for the full-height strip. The asymmetric geometry of the strip former stage makes the full elongation of a bubble dependent upon which input provided the bubble.

Abstract: An apparatus for controllable propagation of magnetic domains, or bubbles, through an arrangement of closely spaced magnetic propagating elements arranged in an input stage, a strip-former stage, and a decoder stage. Binary logic circuitry results from selective control of bubble movement through alternate paths of elements, with at least one of said paths producing a domain strip extending the full height of the strip-former stage. The decoder stage includes a propagating element spaced apart from the strip-former stage a distance sufficient to prevent propagation of all domains in the strip-former stage except for the full-height strip.

Abstract: A magnetic bubble domain circuit which permits the information in two separate propagation paths to crossover each other without deleterious effects. The crossover junction includes at least two definable propagation paths, a merge device for joining the paths, and an active transfer junction between the two paths. The information on the two paths is arranged to become interleaved or intermixed at the merge and to be separated at the active transfer switch arrangements are made for crossing over a plurality of propagation paths by using information properly timed or spaced, or, in the alternative, using a multiple junction arrangement.

Abstract: A logical operation circuit for performing a desired logical operation by transferring at least one magnetic bubble on a plurality of magnetic bubble transfer routes paths employing chevron patterns, in which two neighboring ones of the magnetic bubble transfer routes provides with a first magnetic bubble transfer section which is formed by narrowed transfer routes or by magnetic bubble elongating means, so that a magnetic bubble transferred through one of the two magnetic bubble transfer routes is stably held across the two magnetic bubble transfer routes of the first magnetic bubble transfer section, while two magnetic bubbles transferred through the two magnetic bubble transfer routes on the two magnetic bubble transfer routes respectively.

Abstract: Compact arrangements of two-input magnetic bubble logic gates providing bubble devices for performing serial integer arithmetic on binary integers are disclosed. Using only a small number of different types of logic gates, designs are given for devices for performing serial addition, subtraction, multiplication and division arithmetic operations on binary integers, represented as sequences of magnetic bubbles. All logical interactions use bubble repulsion to prevent bubbles from transferring to adjacent propagation paths via preferred transitions. By using only two-input gates and a pipeline computational structure, hardware design is simplified and advantage is taken of the inherent serial nature of bubble technology. The simple gate interconnection geometry has a minimum of feedback paths and results in devices which are not burdened with excessive numbers of bubble generators, annihilators or crossovers.

Abstract: An associative bubble memory apparatus utilizing a plurality of registers therein to provide a high total memory capacity and to provide data retrieval or correlation based upon content rather than the address of the data of interest.

Abstract: A set of three input, three output bubble logic gates forms all of the possible distinct output functions for conservative three variable gates. The magnetic interaction between single wall domains propagating through separate channels defined by closely spaced circuit element paths causes the domains to switch to or remain on alternate paths via between-path transfer means in a predetermined fashion. In addition to vertically graded element transfer means, several new circuit arrangements are introduced including non-graded elements, strong and weak S-curves, elements having uneven gradation, and other circuit techniques. A group of primitive realizations are described which can be combined to produce other gates having output functions in each of 31 equivalence classes. A methodology for using the gates in logic design is suggested, and several new building block gates producing functions of two variables are presented.

Abstract: A magnetic domain memory including bubble operated access elements for non-destructively reading the memory, for erasing bubbles from the memory and for writing new data into the memory. The access elements comprise retrograde transient bubble switches, exclusive merge elements, disjoint crossover elements and bubble generators, all of which are all-bubble logic elements.