For Compensation Patents (Class 368/202)
  • Patent number: 9651202
    Abstract: The present invention relates to a contact element (3, 3?, 3?), a base (2, 2?, 2?, 2??), a clamping element (4, 4?, 4?), an arrangement (1, 1?, 1?, 1??, 1??, 1???) and a mounting section (301, 301?, 301?) for electrically contacting a light-emitting diode (LED) (100, 100?). In order to conveniently and cost-effectively hold and electrically contact the LED (100, 100?), the present invention provides that the contact element (3, 3?) comprises a mounting section (301, 301?) adapted for mounting the contact element (3, 3?) to the base (2, 2?) in a manner that the contact element (3, 3?) is pivotable about a pivot axis (P) extending through the mounting section (301, 301?), and comprises a contact arm (302, 302?) protruding laterally from the mounting section (301, 301?) and having on a distal end a contact point (303) facing essentially in a contact direction (K) for contacting the LED (100), wherein the contact direction is running essentially in parallel to the pivot axis (P).
    Type: Grant
    Filed: March 21, 2013
    Date of Patent: May 16, 2017
    Assignee: TE Connectivity Nederland BV
    Inventors: Henricus Egbertus Geert Derks, Jasper Van Der Krogt, Peter Poorter
  • Patent number: 9231519
    Abstract: A temperature compensation apparatus may include a sense circuit configured to produce a sense voltage that is dependent on temperature and a temperature compensation circuit configured to receive the sense voltage and produce a temperature compensation control signal to control a compensation capacitor array of an oscillator. The temperature compensation circuit may be configured to calibrate the control signal to have a first value at a first temperature. The temperature compensation circuit may also be configured to calibrate a trimming level (e.g., slope) of the control signal.
    Type: Grant
    Filed: March 13, 2012
    Date of Patent: January 5, 2016
    Assignee: Intel Corporation
    Inventors: Fangxing Wei, Yongping Fan
  • Patent number: 9116511
    Abstract: The present invention makes it possible to measure a precision event time in such a way to make a reference data in accordance with a standard time reference frequency signal and to make a measurement data by using an apparatus with the same structure as a reference data with respect to a signal to be measured and to compare the measurement data with a reference data, whereby temperature effects can be minimized by making the time changes due to temperature changes occurring between two apparatuses happen equally, by providing the same structure and parts to a reference signal circuit apparatus for an event time measurement and a signal circuit apparatus to be measured, and the zero point adjustment is performed during the real time operation, so the system is not needed to stop.
    Type: Grant
    Filed: October 21, 2011
    Date of Patent: August 25, 2015
    Assignee: Korea Astronomy and Space Science Institute
    Inventors: Seung-Cheol Bang, Hyung Chul Lim, Jong Uk Park
  • Patent number: 9068896
    Abstract: The inventive concept discloses a new temperature sensor structure based on oscillator which is insensitive to a process change and improves an error rate of temperature output. The temperature sensor based on oscillator compares an oscillator circuit structure insensitive to a temperature change with an oscillator circuit structure having a frequency change in proportion to a temperature change to output a relative difference between the two oscillator circuit structures and thereby it is compensated itself. In the temperature sensor based on oscillator, a problem of performance reduction due to an external environment and a process deviation of temperature sensor is improved and an output distortion and temperature nonlinearity are effectively improved. Thus, since the temperature sensor based on oscillator has a structure of high performance, low power and low cost, it can be variously used in a detection equipment of temperature environment.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: June 30, 2015
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Seok Ju Yun, Young-deuk Jeon, Tae Moon Roh, Jong-Kee Kwon, Woo Seok Yang, Jongdae Kim
  • Publication number: 20140341002
    Abstract: The method for adapting a timepiece movement provided to operate at ambient atmospheric pressure so as to operate in a low-pressure atmosphere comprises the following steps: 1. measuring the quality factor of the movement at atmospheric pressure, 2. measuring the quality factor of the movement at a predetermined low pressure corresponding to the operating pressure intended for the modified movement, 3. calculating the energy gain between the two measurements, 4. adapting the dimensions of the movement based on this energy gain, in particular by modifying at least one of the following elements of the movement: the reduction ratio of the finishing going train, the torque of the barrel, the size of the barrel and the inertia of the balance.
    Type: Application
    Filed: December 4, 2012
    Publication date: November 20, 2014
    Applicant: CARTIER CREATION STUDIO S.A.
    Inventors: Kewin Bas, Cyrille Chatel
  • Publication number: 20140313866
    Abstract: A temperature-compensated resonator including a body used in deformation, a core of the body being formed by ceramic. At least one part of the body includes a coating whose Young's modulus variation with temperature is of an opposite sign to that of the ceramic used for the core, so that at least the first order frequency variation with temperature of the resonator is substantially zero frequency.
    Type: Application
    Filed: October 11, 2012
    Publication date: October 23, 2014
    Applicant: The Swatch Group Research and Development Ltd.
    Inventors: Thierry Hessler, Philippe Dubois, Thierry Conus
  • Patent number: 8344814
    Abstract: A circuit comprises a frequency divider configured to receive an oscillating signal generated by an oscillator and to divide the oscillating signal into a clock signal, wherein the division ratio of the frequency divider is set to a value equal to one of: the integer part of the resonant frequency of the oscillator and the integer part of the resonant frequency of the oscillator plus 1. The circuit further comprises a control element which switchable connects or disconnects a calibration element to alter the frequency of the oscillation signal input to the frequency divider based on a number of oscillations that have transpired in the oscillating signal.
    Type: Grant
    Filed: December 21, 2010
    Date of Patent: January 1, 2013
    Assignee: STMicroelectronics (Shenzhen) R&D Co. Ltd.
    Inventor: Henry Ge
  • Patent number: 8321169
    Abstract: Aspects of a method and system for compensating temperature readings from a temperature sensing crystal integrated circuit are provided. An electronic device may digitize a temperature indication received from a temperature sensing circuit, digitize one or more calibration voltages received from said temperature sensing circuit, and calculate a compensated temperature indication utilizing the digitized calibration voltage(s), and the digitized temperature indication, and data from a table that characterizes behavior of the temperature sensing circuit as a function of temperature. One or more circuits in the electronic device may be controlled based on the compensated temperature indication. The compensated temperature indication may compensate for a gain error and/or offset error of a digital to analog converter that digitizes the temperature indication and the calibration voltage(s). There may be two calibration voltages.
    Type: Grant
    Filed: April 12, 2011
    Date of Patent: November 27, 2012
    Assignee: Broadcom Corporation
    Inventors: Todd Brooks, Vinay Chandrasekhar, Josephus Van Engelen, Jared Welz
  • Publication number: 20120014224
    Abstract: A backlash-compensating mechanism includes a cam, an actuating member bearing against the cam and a wheel coaxial to the cam and intended to be driven by a gear train of the movement. The cam and the wheel are connected to each other such that one revolution of the wheel includes a sequence of a first phase in which the wheel drives the cam whilst the co-operation between the cam and the actuating member cocks the latter, a second phase in which the actuating member uncocks and causes the cam to effect an instantaneous jump, and a third phase in which the cam is immobilized and the wheel continues to advance until it catches up with the cam to once again drive it during the first phase of the following revolution. This mechanism includes a resilient element acting between the cam and the wheel and applying a return torque to the wheel during the third phase to compensate the backlash in the gear train.
    Type: Application
    Filed: July 14, 2011
    Publication date: January 19, 2012
    Applicant: BREITLING AG
    Inventors: Jacques GABATHULER, Serge NICOLLIN
  • Patent number: 7944777
    Abstract: The invention concerns an electronic watch (8) including: a motor (5), a power circuit (7) supplying first and second voltage levels; a case (11), in which there are mounted: first and second (A, D) output connections; a switch (9) actuated by an external actuator to connect the first connection to the second level (Vdd); a control circuit (4) for the motor including first and second three-state gates (12, 14) respectively connected to the first and second connections (A, D), a member (13) selectively connecting the first connection to the first level, the circuit including a test mode wherein the gates are brought to high impedance, the first connection (D) is connected to the first level (Vss), actuation of the actuator is determined as a function of the voltage measured at the output of the first gate.
    Type: Grant
    Filed: June 17, 2009
    Date of Patent: May 17, 2011
    Assignee: EM Microelectronic-Marin SA
    Inventors: Yves Godat, Fabien Blondeau, Yves Sierro, Nicolas Jeannet
  • Patent number: 7925463
    Abstract: Aspects of a method and system for compensating temperature readings from a temperature sensing crystal integrated circuit are provided. In this regard, a temperature indication and calibration voltages from a temperature sensing crystal integrated circuit (TSCIC) may be digitized and the digital signals may be utilized to calculate a compensated temperature indication. Data derived from a memory integrated within the TSCIC may be retrieved based on the compensated temperature indication. The retrieved data may be utilized to control operation of one or more circuits. The compensated temperature indication may be calculated by removing a gain error and/or offset error from the digitized temperature indication. The compensated temperature indication may be utilized as an index for a data table. The compensated temperature indication may be a normalized compensated temperature indication. The calibration voltages may include a minimum voltage and/or a maximum voltage that the TSCIC is operable to output.
    Type: Grant
    Filed: February 2, 2009
    Date of Patent: April 12, 2011
    Assignee: Broadcom Corporation
    Inventors: Todd Brooks, Vinay Chandrasekhar, Josephus Van Engelen, Jared Welz
  • Patent number: 7661875
    Abstract: The balance comprising a felloe (3), arms (4) connecting the felloe (3) to the balance staff and inertia blocks (11) is characterized in that the felloe (3) includes studs (7) in its inner surface, a threaded hole (9) into which said inertia blocks (11) are screwed from the inside, without passing beyond the external surface of the felloe (3), passing through said felloe (3) and said studs (7).
    Type: Grant
    Filed: March 23, 2007
    Date of Patent: February 16, 2010
    Assignee: Nivarox-FAR S.A.
    Inventors: Marco Verardo, Emmanuel Graf, Alexandre F├╝ssinger
  • Publication number: 20080117722
    Abstract: An automatic temperature compensated real-time clock (RTC) chip includes a clock portion having a crystal oscillator block including crystal compensation circuitry adapted to be coupled to a crystal. The crystal compensation circuitry includes a non-linear capacitor DAC including a plurality of load capacitors, wherein the load capacitors have respective switches which switch respective ones of the load capacitors to change a parallel resonance frequency (fp) generated by the oscillator block. The capacitor DAC is arranged so that Analog Trimming (ATR) bits received cause an arrangement of the switches to provide a non-linear change in overall load capacitance to result in a linear relationship between fp and the ATR bits. A temperature sensor block is coupled to the crystal for measuring a temperature of at least the crystal. An A/D converter is coupled to the temperature sensor for outputting a digital temperature signal representative of the temperature of the crystal.
    Type: Application
    Filed: June 14, 2007
    Publication date: May 22, 2008
    Inventors: Bhupendra K. Ahuja, Hoa Vu, Teck-Boon Serm
  • Patent number: 7371005
    Abstract: An automatic temperature compensated real-time clock (RTC) chip includes a clock portion having a crystal oscillator block including crystal compensation circuitry adapted to be coupled to a crystal. The crystal compensation circuitry includes a non-linear capacitor DAC including a plurality of load capacitors, wherein the load capacitors have respective switches which switch respective ones of the load capacitors to change a parallel resonance frequency (fp) generated by the oscillator block. The capacitor DAC is arranged so that Analog Trimming (ATR) bits received cause an arrangement of the switches to provide a non-linear change in overall load capacitance to result in a linear relationship between fp and the ATR bits. A temperature sensor block is coupled to the crystal for measuring a temperature of at least the crystal. An A/D converter is coupled to the temperature sensor for outputting a digital temperature signal representative of the temperature of the crystal.
    Type: Grant
    Filed: June 14, 2007
    Date of Patent: May 13, 2008
    Assignee: Intersil Americas Inc.
    Inventors: Bhupendra K. Ahuja, Hoa Vu, Teck-Boon Serm
  • Patent number: 7284141
    Abstract: A sampling system is disclosed which measures high speed data signals by performing sampling events at intervals determined by a programmable DDS output frequency and a programmable counter. The reference frequency of the DDS is that of a clock signal that is synchronous with the data signal to be measured. The present invention is able to arrange the sample points to form an eye diagram of the input signal. In addition, the present invention is capable of sampling synchronously with the data clock and controlling the phase of the synthesized signal such that the samples are localized around the rising and falling edges of the data waveform. The present invention is thereby able to determine the location of the edges of the data signal and analyze the deterministic jitter of the waveform.
    Type: Grant
    Filed: February 5, 2004
    Date of Patent: October 16, 2007
    Assignee: Anritsu Company
    Inventor: Kyle Stickle
  • Patent number: 7246022
    Abstract: A method includes detecting a change in temperature in an integrated circuit that is coupled to a differential communication link, and responding to the detected change in temperature by initiating a retraining process for the differential communication link.
    Type: Grant
    Filed: June 20, 2005
    Date of Patent: July 17, 2007
    Assignee: Intel Corporation
    Inventors: James A. McCall, Klaus Ruff, David Shykind
  • Patent number: 7118269
    Abstract: A method of correcting a real-time clock of an electronic apparatus, notably a mobile telephone, in which the real-time clock operates with a first clock generator which generates a real-time clock while the electronic apparatus operates with a second clock generator which generates a system clock, which method includes the following steps: determining the actual frequency of the real-time clock, determining the ratio Vclock/standard of the actual frequency of the real-time clock to the reference frequency of a standard clock, determining the deviation time of the real-time clock per second from the difference (1?Vclock/standard), determining, on the basis of the deviation time per second, a time difference dt within which the real-time clock is to be corrected by a correction time difference ?t, correcting the real time by ?t after expiration of dt.
    Type: Grant
    Filed: March 13, 2002
    Date of Patent: October 10, 2006
    Assignee: Koninklijke Philips Electronics N.V.
    Inventor: Andreas Bening
  • Patent number: 6961287
    Abstract: A time-error-compensating apparatus and method corrects errors in a real-time clock caused by temperature fluctuations or other external influences. The apparatus includes a frequency counting unit which counts a high-frequency clock signal and a low-frequency clock signal, and a time compensating unit which computes a clock count compensation value based on a comparison of the count values of of the low-frequency and high-frequency clock signals. Correcting time using a high-frequency clock is highly desirable because a clock of this type has proven to be accurate in high external stress conditions. Use of this clock also allows the real-time clock to be implemented as a low-frequency, inexpensive low-frequency clock. The method and apparatus are well suited to correcting time information in the terminals of a mobile communications system, or in any other system or device where time tracking is sought.
    Type: Grant
    Filed: October 15, 2002
    Date of Patent: November 1, 2005
    Assignee: LG Electronics Inc.
    Inventor: Dong Soo Jung
  • Patent number: 6729755
    Abstract: A temperature compensated clock and method of clocking systems are provided. The clock preferably has an oscillator for generating an oscillating waveform signal at a preselected frequency and a frequency divider responsive to the oscillator for dividing the frequency of the oscillating waveform signal. A temperature monitoring circuit is positioned responsive to a voltage input signal independent of temperature and a voltage input signal proportional to temperature for monitoring temperature variations. A temperature compensating circuit, preferably including a programmable scaling circuit, is responsive to the frequency divider and the temperature monitoring circuit for scaling the divided frequency of the generated waveform and thereby advantageously produces a temperature compensated output timing signal.
    Type: Grant
    Filed: April 10, 2000
    Date of Patent: May 4, 2004
    Assignee: STMicroelectronics, Inc.
    Inventor: Rong Yin
  • Patent number: 6616328
    Abstract: Accuracy adjustment apparatus for a timepiece has an accuracy adjustment data input control section including a case-mounted switch such as a crown of the timepiece. A crown state detection signal is used to determine the state of the crown. When an accuracy adjustment data input mode is indicated based on the position of the crown, an indicator of the timepiece is driven to provide a visual indication of accuracy adjustment data selectable by operation of the crown. When the proper accuracy adjustment data has been selected, the data is stored to a memory.
    Type: Grant
    Filed: October 26, 1999
    Date of Patent: September 9, 2003
    Assignee: Seiko Instruments Inc.
    Inventor: Hiroyuki Masaki
  • Publication number: 20030086339
    Abstract: A clock recovery circuit includes a sampler for sampling a data signal. Logic determines whether a data edge lags or precedes a clock edge which drives the sampler, and provides early and late indications. A filter filters the early and late indications, and a phase controller adjusts the phase of the clock based on the filtered indications. Based on the filtered indications, a frequency estimator estimates the frequency difference between the data and clock, providing an input to the phase controller to further adjust the phase so as to continually correct for the frequency difference.
    Type: Application
    Filed: June 21, 2002
    Publication date: May 8, 2003
    Applicant: Velio Communications, Inc.
    Inventors: William J. Dally, John H. Edmondson, Ramin Farjad-Rad
  • Patent number: 6529447
    Abstract: An apparatus comprising a first circuit and a timing circuit. The first circuit may be configured to generate an output clock signal that may compensate for oscillation build-up and stabilization time after a power up. The timer circuit may be configured to provide timing in response to the output clock signal.
    Type: Grant
    Filed: June 19, 2000
    Date of Patent: March 4, 2003
    Assignee: Cypress Semiconductor Corp.
    Inventors: K. S. Anil, Thomas K. Mathew, Pradeep Mishra, Rajat Gupta
  • Patent number: 6381702
    Abstract: A highly accurate electronic timepiece is provided in which the operation of a logical slowdown/speedup circuit for adjusting accuracy is controlled by a CPU. The output of an oscillation circuit is input to a system clock generation circuit which generates a system clock for operating the CPU. The output of an oscillation circuit is also supplied to a frequency dividing circuit, and an output of the frequency dividing circuit is supplied to an interrupt signal generating circuit to generate an interrupt signal to the CPU. A logical slowdown/speedup circuit increments a logical slowdown/speedup cycle counter allocated in RAM upon each interrupt operation and, when a predetermined count is reached, the logical slowdown/speedup circuit operates to adjust the timekeeping accuracy of the timepiece. Slowdown/speedup data stored in the logical slowdown/speedup circuit is acquired from a slowdown/speedup data input port.
    Type: Grant
    Filed: November 29, 1999
    Date of Patent: April 30, 2002
    Assignee: Seiko Instruments Inc.
    Inventor: Kenji Ogasawara
  • Patent number: 6312153
    Abstract: A register having a predetermined set value is provided in parallel with a counter for counting a basic signal generated from a crystal oscillator. The register and the counter are connected to a comparator for inputting a count signal into a time-counting circuit every time when the count value of the basic signal in the counter has reached the set value in the register. A signal based on the time-counting signal is sent from the time-counting circuit to a display which indicates time based on the signal. The time indicated on the display is compared with the standard time indicated by a television or the like. In this case, when there is a time difference between the display time and the standard time, a correction value, in terms of the number of seconds, corresponding to the time difference is input through an input unit. The input correction value is calculated in a computing circuit, and is set as a new set value in the register.
    Type: Grant
    Filed: December 3, 1999
    Date of Patent: November 6, 2001
    Assignee: Hudson Soft Co., Ltd.
    Inventor: Setsuo Okada
  • Patent number: 6217213
    Abstract: A temperature-controlled counter/clock arrangement is provided where th rate or frequency of the counting is temperature dependent. This allows for a measuring of thermal accumulation and/or history. The temperature sensing is based upon the use of the varying current that will flow through a toward biased semiconductor diode. In one embodiment a constant voltage source is used so that the current variation will follow Arrhenius's law.
    Type: Grant
    Filed: May 26, 1998
    Date of Patent: April 17, 2001
    Assignee: Dallas Semiconductor Corporation
    Inventors: Stephen M. Curry, Michael L. Bolan, Kevin E. Deierling, William Lee Payne, II, Hal Kurkowski
  • Patent number: 6176611
    Abstract: A timer for measuring a time period including a high frequency generating unit, a low frequency generating unit and a controller connected to the high and low frequency generating units, wherein the controller deactivates the high frequency generating unit during at least a portion of the time period, detects and counts predetermined portions of the signals provided by the high and low frequency generating units and counts a plurality of the portions of the currently active frequency generating unit.
    Type: Grant
    Filed: August 5, 1997
    Date of Patent: January 23, 2001
    Assignee: D.S.P.C. Technologies Ltd.
    Inventors: Asaf Schushan, Yona Leshets
  • Patent number: 6163126
    Abstract: In an electronic apparatus such as a timing device capable of a quick-moving operation, a detecting coil wound coaxially with a driving coil for driving a rotor is arranged, a feedback-induced voltage appearing in the detecting coil is detected by a detector circuit, and a first peak appearing first subsequent to the supply of a drive pulse and having the same polarity as the drive pulse is picked up to detect the rotation of a rotor. Based on the detected timing of the first peak, a next drive pulse is supplied, and the drive pulse is thus fast supplied while the rotation of the rotor is checked. This arrangement allows a quick-moving operation free from faulty watch hand driving to run even faster.
    Type: Grant
    Filed: April 12, 1999
    Date of Patent: December 19, 2000
    Assignee: Seiko Epson Corporation
    Inventors: Hiroyuki Kojima, Noriaki Shimura, Joji Kitahara
  • Patent number: 6146011
    Abstract: To provide a self-correcting watch wherein a high precision self-correction of the watch circuit can be realized without any troublesome operation, a self-correcting watch of the invention having a zero second set button comprises: a time interval counter circuit for counting a time interval from a first pressing of the zero second set button for time setting until each following pressing of the zero second set button for manually correcting time indication; a correction value memory for storing correction information including the time interval and an accumulation of correction values of the time indication performed both manually and automatically from the first pressing of the zero second set button; and a correction value calculator circuit for calculating an absolute time interval at which the time indication is to be corrected automatically by one second, from the time interval of a concerning pressing of the zero second set button counted by the time interval counter, a correction value of the time ind
    Type: Grant
    Filed: December 3, 1997
    Date of Patent: November 14, 2000
    Assignee: NEC Corporation
    Inventor: Toru Owai
  • Patent number: 6086244
    Abstract: A temperature compensated clock and method of clocking systems are provided. The clock preferably has an oscillator for generating an oscillating waveform signal at a preselected frequency and a frequency divider responsive to the oscillator for dividing the frequency of the oscillating waveform signal. A temperature monitoring circuit is positioned responsive to a voltage input signal independent of temperature and a voltage input signal proportional to temperature for monitoring temperature variations. A temperature compensating circuit, preferably including a programmable scaling circuit, is responsive to the frequency divider and the temperature monitoring circuit for scaling the divided frequency of the generated waveform and thereby advantageously produces a temperature compensated output timing signal.
    Type: Grant
    Filed: March 20, 1997
    Date of Patent: July 11, 2000
    Assignee: STMicroelectronics, Inc.
    Inventor: Rong Yin
  • Patent number: 6019500
    Abstract: An apparatus for measuring cumulative time of operation time of an electrical equipment is comprised of a CPU having a nonvolatile memory and a RAM. This apparatus executes the following steps: (1) reading cumulative time data Ts of the nonvolatile memory and presetting it to a timer counter of the RAM when a measurement command is turned on wherein Ts is a value represented by Ts=(A minutes.times.n+A/2 minutes) when n is a positive integer; (2) measuring ON time on the timer counter in which Ts is preset; (3) checking as to whether the ON time becomes integer time A minutes; (4) When the ON time becomes integer times A minutes, the sum of the ON time and A/2 minutes is read in the nonvolatile memory as Ts. Therefore, the accumulated error of the cumulative time is decreased.
    Type: Grant
    Filed: July 2, 1996
    Date of Patent: February 1, 2000
    Assignee: Sony Corporation
    Inventors: Nobuo Hasegawa, Ryoichi Tojo
  • Patent number: 5936149
    Abstract: A personal data/time notary device is embodied in a token device such as a "smart card". The portable notary device includes an input/output (I/O) port, which is coupled to a single integrated circuit chip. The I/O port may be coupled to a conventional smart card reading device which in turn is coupled to a PC, lap-top computer or the like. A tamper resistant secret private key storage is embodied on the chip. The private key storage is coupled to the processor which, in turn, is coupled to a permanent memory that stores the program executed by the processor. At least one clock is embodied on the card. A second clock 14 and a random value generator 10 are also preferably coupled to the processor. The device combines digital time notarization into a digital signature operation to ensure that a time stamp is always automatically present. The user does not need to be involved in any additional decision making as to whether time stamping is necessary.
    Type: Grant
    Filed: June 2, 1995
    Date of Patent: August 10, 1999
    Inventor: Addison M. Fischer
  • Patent number: 5903523
    Abstract: A time analyzer having an improved interpolator with temperature compensation. The time analyzer of the present invention can be operated in a wide range of temperatures without need of recalibration in the field. The device includes hardware for making a coarse time measurement. A fine time measurement is obtained by interpolating within a cycle of the master clock. A temperature correction look up table is produced which incorporates information unique to each analyzer. Information stored in the look up table of each instrument is used to correct time measurement for enhanced precision.
    Type: Grant
    Filed: November 8, 1996
    Date of Patent: May 11, 1999
    Assignee: EG & G Instruments, Inc.
    Inventor: Jeffrey V. Peck
  • Patent number: 5767747
    Abstract: A relatively low frequency oscillator in junction with a much higher frequency oscillator is used to produce a clock that is both accurate and minimizes power consumption. The high frequency oscillator is enabled only during a small portion of the clock's operation and is used to gauge the output of the low frequency oscillator. The output of the high frequency oscillator is counted during its operation period, and the amount counted is accumulated for subsequent time periods. When the accumulated count reaches a predetermined value, a clock output is provided.
    Type: Grant
    Filed: September 12, 1996
    Date of Patent: June 16, 1998
    Assignee: International Business Machines Corporation
    Inventor: Wilbur David Pricer
  • Patent number: 5748570
    Abstract: An electronic clock includes a usual oscillator and a more accurate oscillator. The usual oscillator generates a first frequency which causes the electronic clock to operate and the more accurate oscillator generates a second frequency which is used as a reference frequency. Referring to the second frequency, the first frequency is measured by a frequency measurement circuit and a deviation of the first frequency from a design frequency is calculated by a processor. According to the deviation, time correction of the electronic clock is performed. Therefore, even if an actual oscillation frequency of the usual oscillator is not stable precisely, the accurate time correction can be achieved.
    Type: Grant
    Filed: January 22, 1997
    Date of Patent: May 5, 1998
    Assignee: NEC Corporation
    Inventor: Motoyoshi Komoda
  • Patent number: 5719827
    Abstract: A highly stable frequency generator (G) comprises an oscillator (10) for generating a first frequency (F1), andfurther comprises a time base (BT) providing a time stable frequency signal which is independent of the temperature, and a feedback circuit arranged to provide a first number of pulses (n.sub.T) coming from the oscillator (10) to a comparing circuit (13), a circuit (14) for providing a reference number of pulses (N.sub.T) to said comparing circuit (13), and a circuit (13,15,16) providing a correction signal (Sc) as a function of the difference (.DELTA.) between the first number (n.sub.T) and the reference number (N.sub.T), the generator (G) further comprising a correction circuit (17) of the oscillation frequency (F1) of said first oscillator (10), this correction circuit being controlled by said control signal (Sc).
    Type: Grant
    Filed: October 18, 1995
    Date of Patent: February 17, 1998
    Assignee: Aulab S.A.
    Inventors: Minh-Tam Diep, Emil Zellweger, Rudolf Dinger, Pierre-Andre Farine
  • Patent number: 5717661
    Abstract: A method and apparatus for adjusting the accuracy of an electronic timepiece that includes an oscillator with a 2.sup.n frequency output, means for reducing the oscillator output frequency to a time keeping frequency, means for counting the time keeping frequency, and means for displaying the time corresponding to the count of the time keeping frequency. The timepiece is initially synchronized with a time standard. After a period of time has elapsed, the timepiece is resynchronized with a time standard and the error E accumulated by the timepiece since the previous synchronization is calculated. The accumulated error, E, is divided by the number of adjustment intervals elapsed since the previous synchronizing of the timepiece, N, to obtain an accuracy adjustment factor. Then, at a specified time interval during each subsequent adjustment interval, the timekeeping frequency is adjusted by the amount of the accuracy adjustment factor to produce a resultant adjustment interval which equals an ideal time period.
    Type: Grant
    Filed: December 20, 1994
    Date of Patent: February 10, 1998
    Inventor: T. Earl Poulson
  • Patent number: 5644271
    Abstract: A temperature compensation system includes a first oscillator to generate a number of pulses which vary from a desired frequency as a function of temperature of the first oscillator. The system also includes a second oscillator to generate digital pulses at a corrective frequency which is greater than the desired frequency. A sensor provides an temperature signal for the first oscillator. A digital memory has a digital error table addressable by a signal corresponding to the temperature signal to provide a number of pulse errors corresponding to temperature error for each of the number of pulses. Each pulse error is a function of the corrective frequency and a temperature versus frequency characteristic of the first oscillator. An accumulator receives each pulse error to generate a cumulative error corresponding to one of the number of pulses. A variable delay device counts a quantity of corrective pulses from second oscillator to provide a delayed output pulse in accordance with the desired frequency.
    Type: Grant
    Filed: March 5, 1996
    Date of Patent: July 1, 1997
    Assignee: Mehta Tech, Inc.
    Inventors: Ivan Petrov Mollov, Robert Eugene Havens
  • Patent number: 5546363
    Abstract: A commercially available clock IC which is easily influenced by a temperature change or the like is used as it is, thereby easily allowing the clock IC to function as a high precision clock IC. A high precision oscillator is provided separately from a clock circuit as a clock IC. On the basis of a clock signal from the high precision oscillator, a predetermined time, for example, one minute is measured by a high precision clock control circuit. A correction signal is transmitted to the clock circuit as a clock IC from a high precision control circuit every measurement of such a predetermined time, thereby allowing the correcting operation of the time information to be executed. The clock circuit is, consequently, made operative at a precision of the high precision oscillating circuit.
    Type: Grant
    Filed: December 19, 1994
    Date of Patent: August 13, 1996
    Assignee: Fujitsu Limited
    Inventors: Jun Funaki, Shoji Tenma
  • Patent number: 5375105
    Abstract: An adjustable vibrations counter (20) and an elapsed time counter and switch (18) that select and adjust one second durations, the adjustment depending on whether the timekeeping rate of a watch or clock is fast or slow. The adjustable vibrations counter provides for an increase or decrease in the number of crystal (12) vibrations that are counted during each adjusted one second duration. The elapsed time counter and switch provides for the number of seconds that are selected for adjustment during each hour or day.A slide switch (22) or other means for changing the number of crystal vibrations that are counted during an adjusted one second duration, thus providing the timekeeping rate regulation. A display (28) of the amount of timekeeping rate adjustment that has been entered into a watch or clock.
    Type: Grant
    Filed: July 20, 1993
    Date of Patent: December 20, 1994
    Inventor: Raymond J. Borowski
  • Patent number: 5274545
    Abstract: A device and method provide for an accurate output from a unit, such as an oscillator and/or clock providing an output indicative of frequency and/or time. The device includes a processing section having a microprocessor that develops a model characterizing the performance of the device, including establishing predicted accuracy variations, and the model is then used to correct the unit output. An external reference is used to provide a reference input for updating the model, including updating of predicted variations of the unit, by comparison of the reference input with the unit output. The ability of the model to accurately predict the performance of the unit improves as additional updates are carried out, and this allows the interval between the updates to be lengthened and/or the overall accuracy of the device to be improved. The accuracy of the output is thus adaptively optimized in the presence of systematic and random variations.
    Type: Grant
    Filed: April 3, 1992
    Date of Patent: December 28, 1993
    Assignee: The United States of America as represented by the Secretary of Commerce
    Inventors: David W. Allan, Judah Levine, Dicky D. Davis, Marc A. Weiss
  • Patent number: 5245592
    Abstract: A medical apparatus to be worn in the mouth comprises a battery-fed measuring unit (15) including a clock generator (18) and a counter (20) for counting the pulses of the clock generator. Accuracy of the time measurement decisively depends on the precision of the oscillating frequency of the clock generator. In the invention, there is used a clock generator (18) wherein frequency precision is low. When the counted value of the counter (20) is read into an external evaluating unit, the measuring unit supplies a reference time required by the clock generator (18) for generating a number of pulses. The evaluating unit calculates the time corresponding to the counted value under consideration of the length of the reference time. Thus, the evaluating unit measures the cycle length of the pulses of the clock generator, and this cycle length is multiplied by the number of the counted clock pulses. In this manner, time measurement is performed in a precise manner without requiring a highly precise clock generator.
    Type: Grant
    Filed: February 21, 1992
    Date of Patent: September 14, 1993
    Assignee: Hermann-Josef Frohn
    Inventors: Dietmar Kuemmel, Gerhard Knoerzer, Juergen Wurst
  • Patent number: 5168478
    Abstract: A time standard assembly for a global positioning system (GPS), such as for a space vehicle, has a natural-frequency atomic frequency standard (NAFS) which is operated at its natural resonant frequency in order to output an upset-proof natural frequency signal. The assembly includes a frequency synthesizer unit (FSU) and microprocessor data unit (MDU) which are hardened by combining them together and enclosing them in one integral unit which is shielded from the electromagnetic pulse of an upset event. Multiply redundant NAFS, FSUs, and MDUs are used to improve reliability and for maintaining units on-line and in standby. A dithered clock frequency signal is generated by the FSU according to a dither algorithm performed by the MDU, and the MDU generates encoded clock data using the dithered clock frequency signal. The MDU includes an upset recovery mechanism for resetting its registers and counters using the upset-proof natural frequency signal from the NAFS upon detecting the occurrence of an upset event.
    Type: Grant
    Filed: March 2, 1990
    Date of Patent: December 1, 1992
    Assignee: ITT Corporation
    Inventor: Anthony P. Baker
  • Patent number: 5138707
    Abstract: A method of operating a timer mechanism in a digital data processing system is described in which the contents of at least one timer register is updated by a predetermined time increment during each of successive periodic update cycles. Each update cycle includes a predetermined number of operating cycles of the data processing system. During each update cycle, the contents of an adjustment register is circularly shifted by one bit position and if the bit value at a particular position in this adjustment register has a predetermined binary value during an update cycle, then actual updating of the timer register is omitted during a related update cycle.
    Type: Grant
    Filed: September 13, 1989
    Date of Patent: August 11, 1992
    Assignee: International Business Machines Corporation
    Inventors: Wilhelm Haller, Johann Hajdu, Klaus J. Getzlaff
  • Patent number: 5128909
    Abstract: A system to measure time based on the output of a plurality of clocks employs a common oscillator, rather than a frequency synthesizer. Phase differences between a plurality of clocks are measured by mixing the output from each clock with the output of the common oscillator and detecting the zero crossing of each of the resulting beat signals. The zero crossings are counted and used to start and stop time interval counters, which count the time intervals between zero crossings of the beat signals from different clocks. The output of one of the clocks is used to provide a time base. The output of the first clock is input to a divider, and the divided signal used to start the first of the time interval counters. The number of zero crossings of the divided signal are also counted so that the relative frequency of the common oscillator can be determined. The output of the divider can be synchronized with an external clock.
    Type: Grant
    Filed: August 17, 1990
    Date of Patent: July 7, 1992
    Assignee: Ball Corporation
    Inventor: Samuel R. Stein
  • Patent number: 4953148
    Abstract: Improved atomic clocks and frequency standards of the type where the frequency of an oscillator is stabilized by locking via a phase lock loop to an atomic resonator and where the output of the clock is taken from this oscillator. Protective means are provided to maintain a high accuracy when such clock is exposed to a strong magnetic field. The stabilization is based on two magnetic "C"-fields which are controlled and adjusted to maintain the accuracy of the clock.
    Type: Grant
    Filed: May 5, 1989
    Date of Patent: August 28, 1990
    Inventors: Alexander Lepek, Avinoam Stern
  • Patent number: 4899117
    Abstract: A high accuracy atomic frequency standard and clock which utilizes a micrmputer. The microcomputer compensates for aging and temperature variations in the atomic standard and its slave crystal oscillator and generates an error signal which is used to either correct the frequency of the slave crystal oscillator or to adjust the number of clock pulses per unit time interval. No C-field adjustment is employed.
    Type: Grant
    Filed: December 24, 1987
    Date of Patent: February 6, 1990
    Assignee: The United States of America as represented by the Secretary of the Army
    Inventor: John R. Vig
  • Patent number: 4879669
    Abstract: A sensor signal processing apparatus for measuring a physical quantity through the use of a sensor. A data processor automatically provides an operation equation by applying two known physical quantities, at two points, to the sensor and storing the data at these two points in a pair of memories. The quantities in the memories are then converted in accordance with a sensor characteristics equation and displayed on a display unit. In addition, a battery is used to supply the data processor with power. If that battery's voltage level falls below a certain point an alarm is sounded, indicating that the battery should be replaced.
    Type: Grant
    Filed: March 16, 1988
    Date of Patent: November 7, 1989
    Assignee: Citizen Watch Co., Ltd.
    Inventors: Hiroyuki Kihara, Kazuya Mitaki
  • Patent number: 4779248
    Abstract: A rate displaying oscillator circuit for converting and displaying a rate is provided separately from an oscillator which generates a reference signal so that, even when the period of a logical regulator is extended in order to improve the resolving power of the logical regulation, the average rate of the logical regulator can be measured with a commercially available measuring device.
    Type: Grant
    Filed: April 6, 1987
    Date of Patent: October 18, 1988
    Assignee: Seiko Instruments Inc.
    Inventors: Hiroshi Odagiri, Yuichi Inoue, Hiroyuki Masaki
  • Patent number: 4761771
    Abstract: An electronic timekeeping apparatus includes a temperature value generating circuit for generating a temperature value, a temperature value converting circuit including a slope adjusting circuit which provides a slope corrected output in accordance with a frequency versus temperature characteristic of the apparatus in response to the temperature value, a pace compensation data circuit for producing pace compensation data corresponding to the slope corrected output, and a pace compensating circuit for compensating pace of the apparatus in accordance with the pace compensation data. An offset adjustment circuit may operate on said temperature value or said slope corrected output.
    Type: Grant
    Filed: May 4, 1987
    Date of Patent: August 2, 1988
    Assignee: Seiko Epson Corporation
    Inventors: Tatsuo Moriya, Hitomi Aizawa, Kuniharu Natori, Kazumi Kamoi, Hiroshi Yabe
  • Patent number: RE43236
    Abstract: An automatic temperature compensated real-time clock (RTC) chip includes a clock portion having a crystal oscillator block including crystal compensation circuitry adapted to be coupled to a crystal. The crystal compensation circuitry includes a non-linear capacitor DAC including a plurality of load capacitors, wherein the load capacitors have respective switches which switch respective ones of the load capacitors to change a parallel resonance frequency (fp) generated by the oscillator block. The capacitor DAC is arranged so that Analog Trimming (ATR) bits received cause an arrangement of the switches to provide a non-linear change in overall load capacitance to result in a linear relationship between fp and the ATR bits. A temperature sensor block is coupled to the crystal for measuring a temperature of at least the crystal. An A/D converter is coupled to the temperature sensor for outputting a digital temperature signal representative of the temperature of the crystal.
    Type: Grant
    Filed: May 13, 2010
    Date of Patent: March 13, 2012
    Assignee: Intersil Americas Inc.
    Inventors: Hoa Vu, Teck-Boon Serm, Bhupendra K. Ahuja