Loopback Patents (Class 370/249)
  • Patent number: 7324457
    Abstract: A method and apparatus are disclosed for compensating for optical transmission delays in a synchronous mobile communication system. A Base Station Transceiver Subsystem (BTS) includes a Main Unit (MU) for processing a mobile communication signal and a plurality of Remote Units (RUs) connected to the MU by Synchronous Digital Hierarchy (SDH) transmission, for performing radio processing for communication with a Mobile Station (MS). The method comprises the steps of sequentially forming a loop on an optical transmission line to each of the RUs for optical transmission delay compensation test between the MU and each of the RUs; once a loop for the optical transmission delay compensation test is formed, transmitting a test SDH frame to a corresponding RU, and measuring a delay time until the test SDH frame is fed back; and transmitting data to the corresponding RU after compensating the transmission time by the measured delay time.
    Type: Grant
    Filed: January 14, 2003
    Date of Patent: January 29, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun-Pyo Lee, Kwang-Hee Han, Jeong-Deog Seo
  • Patent number: 7324458
    Abstract: In some embodiments, a chip comprises control circuitry to provide inband signals, inband output ports, and transmitters to transmit the inband signals to the inband output ports. The control circuitry selectively includes loopback initiating commands in the inband signals. Other embodiments are described and claimed.
    Type: Grant
    Filed: March 21, 2003
    Date of Patent: January 29, 2008
    Assignee: Intel Corporation
    Inventors: Theodore Z. Schoenborn, Andrew W. Martwick, David S. Dunning
  • Publication number: 20080019280
    Abstract: A method according to one embodiment may include communicating, by a far end device with a near end device, using a Serial ATA (SATA) communications protocol; receiving, by the far end device, a SATA signal sequence having two bits, the state of which define at least one loopback mode; defining, by the far end device, a reserved and/or error state if both of the bits are set; and processing, by the far end device, the two bits together to determine if the two bits are in a state that defines at least one loopback mode or if the two bits are set. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.
    Type: Application
    Filed: July 21, 2006
    Publication date: January 24, 2008
    Inventors: Luke L. Chang, Pak-Lung Seto, Naichih Chang
  • Patent number: 7317692
    Abstract: A method and apparatus to perform network path discovery are described.
    Type: Grant
    Filed: November 13, 2002
    Date of Patent: January 8, 2008
    Assignee: Intel Corporation
    Inventors: James L. Jason, Jr., Erik J. Johnson
  • Patent number: 7317690
    Abstract: An interface circuit that can disconnect a loop connection among nodes. The interface circuit includes ports, which are connected to bus cables, a state machine and a port controller, which is connected to the ports and the state machine. The state machine determines that a loop connection exists when a process in a predetermined state has been stacked for a predetermined time. When a loop connection exists, the port controller electrically disconnects a port on the loop.
    Type: Grant
    Filed: October 2, 2001
    Date of Patent: January 8, 2008
    Assignee: Fujitsu Limited
    Inventors: Kenji Oi, Takashi Shimizu, Hirotaka Ueno, Hiroshi Takase
  • Patent number: 7313097
    Abstract: A bit stream multiplexer includes an input ordering block, a plurality of multiplexers, an output ordering block, and a loop back circuitry. A bit stream demultiplexer includes an input ordering block, a plurality of demultiplexers, and an output ordering block. During testing, the transmit multiplexing integrated circuit and the receive demultiplexing integrated circuit are coupled into a circuit tester. Then, a plurality of input lines of the transmit multiplexing integrated circuit are coupled to a plurality of output data lines of the circuit tester. A loop back output of the transmit multiplexing integrated circuit is then coupled to a loop back input of the receive demultiplexing integrated circuit. A plurality of output lines of the receive demultiplexing integrated circuit are coupled to a plurality of input data lines of the circuit tester.
    Type: Grant
    Filed: March 17, 2003
    Date of Patent: December 25, 2007
    Assignee: Broadcom Corporation
    Inventors: Ali Ghiasi, Bo Zhang
  • Patent number: 7307947
    Abstract: A ring network having a plurality of nodes connected by a working channel and a protection channel. When no failure exists, the working channel and the protection channel are link-aggregated into one virtual channel, and the transmission of the working traffic is carried out using both channels. When failure occurred to a line of the network, the link aggregation is suspended and a protection function in conjunction with the link aggregation is activated, in which a path avoiding the failure point is established by means of layer 1 protection process and thereafter data transmission is carried out by use of the path established by the layer 1 protection function. Therefore, data transmission in the no failure stated can be conduced using a bandwidth of twice as large as that of convention ring networks.
    Type: Grant
    Filed: May 29, 2002
    Date of Patent: December 11, 2007
    Assignee: NEC Corporation
    Inventor: Eriko Okuno
  • Patent number: 7308002
    Abstract: This specification discloses a packet type arbitrator in a wireless local area network (WLAN) and its arbitrating method. The arbitrator contains at least two packet type detectors and a packet type decider. The packet type detector is installed with a false alarm checking module and a timer according to the strength of the packet for delaying the decision from the packet type decider. Through the checking mechanism of the false alarm checking module and the timer, erroneous decision can be avoided when determining the packet type.
    Type: Grant
    Filed: November 24, 2003
    Date of Patent: December 11, 2007
    Assignee: Intergrated System Solution Corp.
    Inventors: Yen-Chin Liao, Kuang-Ping Ma, Chia-Yung Chiu, Eric Huang, Albert Chen
  • Patent number: 7304956
    Abstract: Apparatus and method for automatically testing hardware and software components of a system. A request type message is generated in the software component of the system. A request-type message, including a destination address and a source address, is made to traverse the transmit channel of the system. The destination address and source address are swapped, i.e., interchanged, and the message is wrapped into the receive channel where it is forwarded to the software component for further analysis. Modification is in the transmit channel to modify the message by swapping the source address and the destination address to preclude discarding of the message by the receive channel.
    Type: Grant
    Filed: April 8, 2002
    Date of Patent: December 4, 2007
    Assignee: International Business Machines Corporation
    Inventors: John Lloyd, Timothy James Smith
  • Patent number: 7304958
    Abstract: A method and apparatus for automated sectionalization of a DS1/DS3 data path based upon information received at a single location along the path. A test and monitor device is located at a point of demarcation between an LEC and an IEC. A Remote Module is located at a point of demarcation between the LEC and CPE. The test and monitor device is fully ANSI compatible. The information that is received is processed in a three step process in order to generate a “Sectionalizer Report”. In preparing the Sectionalizer Report, the information output from a filter is used to determine where particular Events originated.
    Type: Grant
    Filed: July 10, 2002
    Date of Patent: December 4, 2007
    Assignee: Acterna LLC
    Inventors: Derek J. Nelson, Paul R. Hartmann, Edward S. Tyburski
  • Publication number: 20070268828
    Abstract: The invention provides a method for dynamically changing the loop bandwidth of a closed loop control system. At least one loop bandwidth parameter controls the loop bandwidth of the closed loop control system. An error signal reflecting the convergence status of the output signal of the closed loop control system is first detected. The at least one loop bandwidth parameter is then dynamically adjusted according to the error signal to change the loop bandwidth of the closed loop control system. A feedback signal of the closed loop control system is then generated according to the loop bandwidth. Finally, an input signal of the closed loop control system is compensated with the feedback signal to generate the output signal.
    Type: Application
    Filed: May 18, 2006
    Publication date: November 22, 2007
    Applicant: VIA TECHNOLOGIES, INC.
    Inventor: Chi-Yuan Peng
  • Patent number: 7298705
    Abstract: A network component for processing a packet can include a buffer configured to receive a packet, a forwarding unit configured to forward the packet received at the first buffer to a loopback port, and a transmitting unit configured to transmit the packet out of the loopback port. In addition, the network component can include a loopback unit configured to loop back the packet into the loopback port, a first identification unit configured to identify an egress port, and a second transmitting unit configured to transmit the packet looped back from the loopback port out of the egress port.
    Type: Grant
    Filed: February 5, 2003
    Date of Patent: November 20, 2007
    Assignee: Broadcom Corporation
    Inventors: Laxman Shankar, Shekhar Ambe
  • Patent number: 7289434
    Abstract: In one embodiment, an intermediate node includes one or more active forwarding planes and one or more redundant forwarding planes. The intermediate node may also include one or more active control planes and one or more redundant control planes. A test packet is generated, in some cases by a redundant control plane, and transferred to a redundant forwarding plane. The operational state of the redundant forwarding plane is verified, at least in part, by using operational software and hardware contained in the redundant forwarding plane to forward the test packet from the redundant forwarding plane to a target line card. The target line card loops the test packet back to the redundant forwarding plane as part of the verification process. In some cases, the redundant control plane processes the looped-back test packet.
    Type: Grant
    Filed: December 5, 2002
    Date of Patent: October 30, 2007
    Assignee: Cisco Technology, Inc.
    Inventors: Guy C. Fedorkow, Gary S. Muntz, Timothy P. Donahue, Michael E. Wildt
  • Patent number: 7283476
    Abstract: A switch to switch protocol for network load balancing which negotiates among switches operable in accordance with the invention to assign a unique loop bit offset identifier value to each switch. Various other load balancing protocols associated with the switches then utilize the loop bit offset value as an identifier field when determining loops in the network of switches and costs associated with non-looped paths in the switches. A loop bit offset identifier requires less switch processing overhead than techniques which utilize an entire address value (i.e., MAC address value) for such protocols. Further, the loop bit offset identifier assigned by the present invention reduces the size of load balancing related packets. Specifically, cost computation related packets are reduced in size to the minimum 64 byte packet size through use of the loop bit offset identifier value of the present invention.
    Type: Grant
    Filed: October 1, 2002
    Date of Patent: October 16, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Ballard C. Bare
  • Publication number: 20070230360
    Abstract: A loop locating apparatus and method enabling simple and fast identification of a Layer 3 loop fault occurring in a network, wherein, when the possibility of a Layer 3 loop is detected, a loop locating command function unit makes a packet transmission/reception function unit send a series of inspection packets (Pis) with successively incremented TTLs and monitors the return packets (te) of the inspection packets (Pis) by a return number counting function unit and wherein a loop location decision function unit finds the routers returning packets (te) with remarkably larger return numbers than the others and identifies the routers with return numbers over a predetermined threshold as the location of occurrence of the loop.
    Type: Application
    Filed: August 8, 2006
    Publication date: October 4, 2007
    Inventors: Tetsuya Nishi, Tomonori Gotoh
  • Patent number: 7275195
    Abstract: A built-in self-test circuit for use in testing a serializer/deserializer circuit includes a programmable transmit register that transmits data to the serializer/deserializer circuit having programmably varying characteristics. The built-in self-test circuit includes the transmit register that transmits data to the serializer/deserializer for processing into processed data, a receive register that receives the processed data from the serializer/deserializer, and an error detector that detects errors in the processed data.
    Type: Grant
    Filed: October 3, 2003
    Date of Patent: September 25, 2007
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventor: Antonio Marroig Martinez
  • Patent number: 7274655
    Abstract: A method and system are provided for rehoming a digital subscriber line access multiplexer between a first data switch and a second data switch or ports on a single data switch. An extension permanent virtual circuit is established between the first data switch and the second data switch and a physical loop-back circuit is established at the second data switch for routing data from an output port of the second data switch to a temporary input port. A permanent virtual circuit between a data switch servicing a network service provider and the first data switch is removed, and a permanent virtual circuit between the data switch servicing the network service provider and the second data switch is established.
    Type: Grant
    Filed: May 31, 2002
    Date of Patent: September 25, 2007
    Assignee: AT&T BLS Intellectual Property, Inc.
    Inventors: Randy S. Young, Earl C. Meggison
  • Patent number: 7260066
    Abstract: A method for actively detecting link failures on a high availability backplane architecture. The backplane system includes redundant node boards operatively communicating with redundant switch fabric boards. Uplink ports of the node boards are logically grouped into trunk ports at one end of the communication link with the switch fabric boards. A probe packet is sent, and a probing timer is set whenever either a specified number of bad packets are received, or an idle timer expires. If a response to the probe packet is received before the probe timer expires then the link is deemed valid, otherwise the link is presumed to have failed. Preferably, either the node boards or the switch fabric boards are configured to properly handle a probe pack, which preferably has identical source and destination addresses.
    Type: Grant
    Filed: December 20, 2002
    Date of Patent: August 21, 2007
    Assignee: Conexant Systems, Inc.
    Inventors: Linghsiao Wang, Rong-Feng Chang, Eric Lin, James Ching-Shau Yik
  • Patent number: 7257087
    Abstract: An apparatus and method calculate a round-trip delay (RTD) between first and second endpoints within a network, where an intermediate point is selected between the first and second endpoints within the network. A network analyzer determines a first data transmission time from the intermediate point to the first endpoint and back to the intermediate point, determines a second data transmission time from the intermediate point to the second endpoint and back to the intermediate point, and adds the first and second data transmission times to determine therefrom the round trip delay between the first and second endpoints within the network.
    Type: Grant
    Filed: October 4, 2002
    Date of Patent: August 14, 2007
    Assignee: Agilent Technologies, Inc.
    Inventor: William Grant Grovenburg
  • Patent number: 7230926
    Abstract: Various embodiments and techniques are described to isolate a malfunction or faulty node in a network and to perform an action to address the malfunction.
    Type: Grant
    Filed: May 1, 2002
    Date of Patent: June 12, 2007
    Assignee: Intel Corporation
    Inventors: David Sutherland, Robert Muir
  • Patent number: 7218612
    Abstract: A network arrangement uses a poll select control protocol and a loop back arrangement at each node for equalizing transmission delay from each node to a central station. Delays at each node can be adjusted to start timing in response to a broadcast signal indicating an amount of delay to be applied from the start of a synchronization interval to the beginning of transmission of data collected at the nodes. The arrangement is particularly useful in the field of data acquisition and particularly in the area of seismic sensing.
    Type: Grant
    Filed: June 9, 2003
    Date of Patent: May 15, 2007
    Assignee: Cirrus Logic, Inc.
    Inventors: Joel Page, Edwin De Angel, Wai Laing Lee, Lei Wang, Hong Helena Zheng, Chung-Kai Chow
  • Patent number: 7212498
    Abstract: A method of measuring quality of service includes receiving, from a content server, a transmission of a first media stream and comparing that first media stream with a second media stream that corresponds to the first media stream prior to transmission thereof. This comparison provides a basis for determining a quality of service of the transmission.
    Type: Grant
    Filed: April 18, 2002
    Date of Patent: May 1, 2007
    Assignee: Intel Corporation
    Inventors: Phillip G. Austin, Vivaik Balasubrawmanian
  • Patent number: 7212492
    Abstract: A technique for providing a control and management protocol for an Ethernet network in an Ethernet layer is disclosed. In one embodiment, the technique is realized by transporting a plurality of inter-nodal messages via Ethernet packets based on a type parameter; identifying at least one management packet from the Ethernet packets; and identifying a management function associated with the at least one management packet based on a management parameter. In addition, the management function may involve notification of physical link failure; monitoring congestion; monitoring packet errors; communicating with an External Management System; measuring signal quality of link; detecting loss of signal; assessing signal quality of nodes by a loop back packet comparison; and communicating user information in the form of voice, data, and video between nodes.
    Type: Grant
    Filed: May 22, 2002
    Date of Patent: May 1, 2007
    Assignee: Nortel Networks Limited
    Inventors: How Kee Au, Kent E. Felske
  • Patent number: 7212496
    Abstract: A remote test unit (RTU) and method of operation are provided for utilizes the ability of an access matrix ability to route signals. The RTU can emulate a central Digital Subscriber Line Modem (DSLM-C) for testing customer premises equipment containing a remote Digital Subscriber Line Modem (DSLM-R). The RTU can also emulate a DSLM-R for testing central offices equipment including a digital subscriber line access multiplexer (DSLAM) containing a DSLM-C. The RTU can also emulate a concentrator connected to the DSLAM, a router connected to the concentrator, an Internet service provider (ISP) connected to the router, and a web site connected to the ISP over the Internet. The RTU can further test, using emulation, ISO/OSI layers defined in the ISO/OSI reference model which are connected to the DSLAM.
    Type: Grant
    Filed: December 18, 2001
    Date of Patent: May 1, 2007
    Assignee: Sunrise Telecom Incorporated
    Inventor: Raymond L Chong
  • Patent number: 7206288
    Abstract: Methods and apparatus are provided for determining characteristics associated with routes in fibre channel networks. Techniques are provided for inserting time stamp information into frames transmitted from a source to a destination and back to the source. Time stamp information allows a supervisor associated with a source to determine characteristics such as round trip times, latency between hops, and connectivity to a destination for specific routes.
    Type: Grant
    Filed: June 12, 2002
    Date of Patent: April 17, 2007
    Assignee: Cisco Technology, Inc.
    Inventors: Maurilio Cometto, Thomas James Edsall
  • Patent number: 7206849
    Abstract: A method and apparatus for communication between a mobile computer terminal and a host computer in a system in which it is necessary for the mobile computer terminal to send a message to the host computer at a particular time. The specific time at which the mobile computer terminal must send a message to the host computer is first determined. Then, a timer or clock is programmed to wake up the mobile computer terminal at the specific time. A sleep mode may be entered, which may be interrupted at the specific time to send the message. This will normally allow a mobile computer terminal to maintain its lease on an IP address despite being out of range of a wireless network.
    Type: Grant
    Filed: October 10, 2000
    Date of Patent: April 17, 2007
    Assignee: Symbol Technologies, Inc.
    Inventors: Alex M. Gernert, Daniel L. Scheve
  • Patent number: 7200170
    Abstract: A loopback circuit for testing low and high frequency operation of integrated circuit transmitter and receiver components. First and second resistors forming a first branch of the circuit are series-connected between first and second circuit ports. Third and fourth resistors forming a second branch of the circuit are series-connected between third and fourth circuit ports. A DC isolator is connected between the first and second branches. At lower frequencies, the two branches are DC-isolated, enabling ATE-measurement of the transmitter's output drive level independently of the receiver, continuity testing of ESD protection structures, etc. At higher frequencies, the transmitter's output signal is split into three portions, each of which is attenuated by a selected amount. One of the attenuated signal portions is applied to the receiver to test the receiver's sensitivity, independently of possible excess resiliency in the transmitter's output drive level.
    Type: Grant
    Filed: July 12, 2002
    Date of Patent: April 3, 2007
    Assignee: PMC-Sierra, Inc.
    Inventors: Lisa Ann Desandoli, Jurgen Hissen, Kenneth William Ferguson, Gershom Birk
  • Patent number: 7187653
    Abstract: Systems and methods for obtaining logical layer information in a frame relay and/or asynchronous transfer mode (ATM) network are described. In an exemplary embodiment, a physical layer test system, such as an integrated testing and analysis system, communicates with a broadband network management system, which in turn communicates with an element management system for a frame relay and/or ATM network.
    Type: Grant
    Filed: December 13, 2002
    Date of Patent: March 6, 2007
    Assignee: Bellsouth Intellectual Property Corporation
    Inventors: William Scott Taylor, David E. Massengill
  • Patent number: 7162207
    Abstract: A system, apparatuses, a method, and a computer program for producing signals for testing radio frequency communication devices are provided. The system comprises a non-real-time domain which includes a data generator for supplying a temporally discontinuous data stream which data stream includes signal waveform data and control data defining characteristics of a conversion from the signal waveform data into a radio frequency test signal. The temporally discontinuous data stream is fed into a transformer which transforms the temporally discontinuous data stream into a temporally continuous data stream, thus providing a transformation between the non-real-time domain and a real-time domain. The real-time domain includes a radio frequency unit which uses the temporally continuous signal data stream as input, and performs the conversion from the signal waveform data into the radio frequency test signal according to the control data.
    Type: Grant
    Filed: June 21, 2004
    Date of Patent: January 9, 2007
    Assignee: Elektrobit Oy
    Inventors: Mikko Kursula, Juhani Tapaninen
  • Patent number: 7145879
    Abstract: A method for testing a network load in which a transmission at an own apparatus side is not stopped based on a reception completion at a mating apparatus side, and a transmission at the own apparatus side is stopped based on the reception completion at the own apparatus side itself is provided. Thus, an inter-task communication for synchronizing the apparatuses with each other is not required, and it is possible to decrease a time required for the inter-task communication during a test cycle. Accordingly, since a test cycle is shortened, and transmission time and reception time of test data in the test cycle relatively prolonged, it is possible to increase data transfer per unit time and provide a large load to a network.
    Type: Grant
    Filed: November 17, 2000
    Date of Patent: December 5, 2006
    Assignee: Fujitsu Limited
    Inventor: Kazunori Kasai
  • Patent number: 7146410
    Abstract: Systems and methods for ensuring that control protocols can be used between Media Gateways 130, 140 and Media Gateway Controllers 110 that reside on separate IP networks 120, 150. Network Address Translation (NAT) is strategically implemented to inspect and translate control protocol messages exchanged between nodes on separate IP networks. One method is to add NAT intelligence to a firewall/router 160 giving it the ability to inspect and translate the IP addresses within control protocol messages. Another method is to have a firewall/router 160 forward control protocol messages to a separate NAT server 170 to inspect and translate the IP addresses within control protocol messages. The former implementation places a significant amount of real-time work on the firewall/router which can affect its performance in its core duties. The latter implementation does not affect performance but requires deploying additional hardware.
    Type: Grant
    Filed: June 7, 2000
    Date of Patent: December 5, 2006
    Assignee: Nortel Networks Limited
    Inventor: Arda Akman
  • Patent number: 7142504
    Abstract: A system and apparatus for transmitting transit data through a network with first and a second rings coupling two or more nodes. In one aspect, when the first ring is intact and the second ring has a fault between two nodes, transit data may be wrapped from a second, faulted ring to a first, intact ring at an upstream node adjacent to a fault, and transit data may be maintained on the first, intact ring between the upstream node and a downstream node adjacent to the fault. In another aspect, when the system has a fault between any two nodes, the system may preserve host data.
    Type: Grant
    Filed: April 25, 2001
    Date of Patent: November 28, 2006
    Assignee: Cisco Technology, Inc.
    Inventor: Necdet Uzun
  • Patent number: 7133367
    Abstract: The present invention relates to a method and apparatus for testing components in ATM networks utilizing loop-back based ATM layer testing. The method and apparatus utilize interfaces and identifier codes to send and loop-back test cells along portions of virtual channels to test the virtual channels.
    Type: Grant
    Filed: March 1, 2005
    Date of Patent: November 7, 2006
    Assignee: ADC DSL Systems, Inc.
    Inventors: Randall L. Powers, Robert S. Kroninger, Melvin R. Phillips, Dieter H. Nattkemper
  • Patent number: 7133368
    Abstract: A peer-to-peer (P2P) probing/network quality of service (QoS) analysis system utilizes a UDP-based probing tool for determining latency, bandwidth, and packet loss ratio between peers in a network. The probing tool enables network QoS probing between peers that connect through a network address translator. The list of peers to probe is provided by a connection server based on prior probe results and an estimate of the network condition. The list includes those peers which are predicted to have the best QoS with the requesting peer. Once the list is obtained, the requesting peer probes the actual QoS to each peer on the list, and returns these results to the connection server. P2P probing in parallel using a modified packet-pair scheme is utilized. If anomalous results are obtained, a hop-by-hop probing scheme is utilized to determine the QoS of each link. In such a scheme, differential destination measurement is utilized.
    Type: Grant
    Filed: February 1, 2002
    Date of Patent: November 7, 2006
    Assignee: Microsoft Corporation
    Inventors: Qian Zhang, Wenwu Zhu, XinYan Zhang, YongQiang Xiong
  • Patent number: 7130276
    Abstract: A network switch includes multiple interface cards and a backplane that interconnects the interface cards. The interface cards receive network traffic and perform time and line switching on the data. The network traffic can include a combination of time division multiplexed (TDM) data and network data (e.g., ATM cells, IP packets). In one embodiment, the channels that carry network traffic to the interface cards are pre-configured as either TDM channels or network channels. The channels are processed as appropriate for their respective types by the interface cards. Because both TDM and network traffic can be processed by a single interface card, the number of cards within the network switch can be reduced.
    Type: Grant
    Filed: May 31, 2001
    Date of Patent: October 31, 2006
    Assignee: Turin Networks
    Inventors: David Chen, Frank Marrone, Mats Lund
  • Patent number: 7116638
    Abstract: Methods for identifying a mis-optioned data communications circuit are provided. A test point is configured providing access to a data communications circuit for operation of a first data communications speed. A test is performed on a communications device remotely located on the data communications circuit that is incompatible with data communications at a second data speed. If the test is successful, the communications device is re-optioned for operation at the second communications speed. The test may comprise a non-latching loop back test and the communications device may comprise a network interface unit or a channel surface unit/data service unit.
    Type: Grant
    Filed: May 20, 2002
    Date of Patent: October 3, 2006
    Assignee: BellSouth Intellectual Property Corporation
    Inventors: Willis Dean Clonts, Donald Fredrick Gedenk, Jr.
  • Patent number: 7110364
    Abstract: An optical link adjacency discovery protocol is provided. The protocol includes a simple format that includes an identifier field of a local node and facility and an identifier field of an echo node and facility. An announce message, including a source field having an identifier of the local node written therein, is transmitted from the local node that terminates the created link to the far end node that terminates the other end of the optical link. The far end node receiving the announce message then generates an echo message including a source field and an echo field, the source field having an identifier of the second node and resources thereof associated with the link. The echo field of the echo message includes an identifier of the local node and resources thereof associated with the link. An optical network for implementing the optical link adjacency discovery protocol is also provided.
    Type: Grant
    Filed: April 19, 2001
    Date of Patent: September 19, 2006
    Assignee: Fujitsu Limited
    Inventors: Tung Quang Le, James Alvah Spallin, Mark Frank Vanderburg
  • Patent number: 7111208
    Abstract: A method and system are disclosed for providing standalone built-in self-testing of a transceiver chip. The transceiver chip includes packet generators for generating test packets and packet checkers for comparing received packets with expected packets. The transceiver chip may be configured for testing through at least two wraparound test paths—a first test path that includes an elastic FIFO of a transmit path of the transceiver chip, and a second test path that includes an elastic FIFO of a receive path of the transceiver chip. During testing, the test packets are generated by packet generators within the transceiver chip and routed through the at least two wraparound test paths to packet checkers within the same transceiver chip. The packet checkers compare the returned packets to the expected packets. If the returned packets are inconsistent with the expected packets, the transceiver chip is defective.
    Type: Grant
    Filed: November 5, 2002
    Date of Patent: September 19, 2006
    Assignee: Broadcom Corporation
    Inventors: Tuan M. Hoang, Hongtao Jiang
  • Patent number: 7103029
    Abstract: Disclosed is a transmitter gain stabilization apparatus which uses feedback control to stably control the gain of a radio base-station transmitter in a CDMA mobile communication system. The apparatus includes a reference-power generating unit for generating average power of a baseband signal as reference power, a detector for detecting transmission power, and a gain adjustment unit for adjusting the gain of a radio unit in the base station in such a manner that the detected power will coincide with the reference power.
    Type: Grant
    Filed: November 7, 2000
    Date of Patent: September 5, 2006
    Assignee: Fujitsu Limited
    Inventor: Ryoichi Minowa
  • Patent number: 7099278
    Abstract: Method and circuitry for performing a line loop back test includes a receiver, a deserializer, and a low speed parallel loop back data multiplexer selects either the low speed parallel data from the deserializer when in loop back mode or low speed parallel input data when in normal mode. The deserializer produces a low speed clock output signal that is fed to a low speed loop back reference clock multiplexer and also to a low speed loop back clock multiplexer. Both the loop back reference clock multiplexer and the loop back clock multiplexer select the low speed clock output signal from the deserializer when in line loop back mode. A clock multiplying unit converts the output of the low speed loop back reference clock multiplexer into a high speed clock signal. The serializer generates the high speed serial transmitter data in synchronization with the high speed clock signal received from a clock multiplying unit.
    Type: Grant
    Filed: August 10, 2001
    Date of Patent: August 29, 2006
    Assignee: Broadcom Corporation
    Inventor: Afshin D. Momtaz
  • Patent number: 7092362
    Abstract: An extension repeater which interfaces between a digital service network and a local network span combines extensive diagnostic and operational functions in a single, space-efficient device. The functions include simultaneous loopback capability in both the direction of the digital service network and the local network span, signal regeneration capability in both directions, non-intrusive monitoring connections for each side of the repeater, and visual indicators of the loopback states as well as the framing type of the data received from the digital service network and the local network span. Furthermore, the extension repeater is physically sized and shaped to fit in standard wall-mount telephone equipment shelves in order to provide economical and simplified installation of the repeater at locations outside of a telephone network central switching office.
    Type: Grant
    Filed: August 1, 2000
    Date of Patent: August 15, 2006
    Assignee: Verizon Services Corp.
    Inventors: William N. Demakakos, Forrest P. Neal, III
  • Patent number: 7093172
    Abstract: A test packet generator (225a) within a physical layer device (230) may generate test packets to be communicated over a closed communication path established within the physical layer device (230). The test packets may include a pseudo-random bit sequence. A receiver within the physical layer device (230) may receive at least a portion of the generated test packet. A test packet checker (225b) within the physical layer device may compare at least a portion of the received test packets with at least a portion of the generated test packets in order to determine the bit error rate for the physical layer device. A window counter (225c) within the physical layer device (230) may count at least a portion of a number of bits received within the generated test packets and a number of bits that are in error in at least a portion of the number of bits received.
    Type: Grant
    Filed: November 8, 2002
    Date of Patent: August 15, 2006
    Assignee: Broadcom Corporation
    Inventors: Nong Fan, Tuan Hoang, Hongtao Jiang
  • Patent number: 7088682
    Abstract: An end system (“first end system”) concluding that a bi-directional virtual circuit is operational if the other end system (at the other end of the virtual circuit) has determined that the virtual circuit is operable based on the loopback cells. In other words, the first end system may not send loopback cells, and instead rely on the determination of the other end system. As a result, the total number of loopback cells may be reduced on a network backbone.
    Type: Grant
    Filed: August 9, 2001
    Date of Patent: August 8, 2006
    Assignee: Cisco Technology, Inc.
    Inventors: Balaji Lakshmikanth Bangolae, Sudhakar Shenoy, Shiju Joseph
  • Patent number: 7085255
    Abstract: In a TDD wireless communication system between transmitters and associated receivers, automatic gain control of a receiver is only applied during the corresponding time slot within the TDD signal time frame architecture. Successive received signal strengths are measured and gain levels are stored as estimates for an initial gain level in future time slots of the TDD signal. Estimating techniques, such as averaging or trending of received signal strength over successive time slots, and averaging or trending of gain level settings, provide improved estimation of future initial gain levels.
    Type: Grant
    Filed: June 1, 2001
    Date of Patent: August 1, 2006
    Assignee: InterDigital Technology Corporation
    Inventors: Alexander Jacques, Leonid Kazakevich, Avi Silverberg
  • Patent number: 7085238
    Abstract: A fault-testing node for a connectionless data link has at least two opposing communication ports; a soft switch for controlling port-to-port data flow through the device; and an instance of software for modifying packet header information. The node enables loop-back testing by one or more port-to-port data flow paths being switched through activation of the soft switch to loop incoming packets back to the sender of the packets through the device and wherein the instance of software reverses the order of source and destination addresses of data units to insure acceptance of looped data units at the sender station.
    Type: Grant
    Filed: December 11, 2003
    Date of Patent: August 1, 2006
    Assignee: Spirent Communications of Rockville, Inc.
    Inventor: Tom McBeath
  • Patent number: 7082299
    Abstract: A method for determining the performance of decoding in a telecommunication system having a decoder and a testing apparatus for supplying test data to the decoder includes generating test data having signalling data in a signalling frame format, mapping the test data into two consecutive frames and transmitting the test data from the testing apparatus to the decoder for decoding. The signalling data is decoded from the received two test data frames and transmitted back to the testing apparatus encoded in one frame. The performance of decoding is determined by comparing the transmitted signalling data and the received signalling data in the test apparatus.
    Type: Grant
    Filed: March 15, 2002
    Date of Patent: July 25, 2006
    Assignee: Nokia Corporation
    Inventors: Berthier Lemieux, Lene Bache
  • Patent number: 7079482
    Abstract: A method of configuring a SONET network element to support a test head test session comprises dedicating an otherwise assignable output port of a SONET network element as a test access port, receiving a request to connect a connection switched by a switch fabric of the SONET network element to the test access port, determining whether the request is associated with a test head; and, if the request is associated with the test head, provisioning the switch fabric to connect the connection to the test access port.
    Type: Grant
    Filed: September 21, 2001
    Date of Patent: July 18, 2006
    Assignee: Fujitsu Limited
    Inventors: Francois G. Moore, Carl D. Reeves, William D. Sandor
  • Patent number: 7065268
    Abstract: Systems and methods for link discovery and verification technique that minimize the need for line termination resources that generate and interpret packets. Of two nodes verifying a link to one another, only one node need have any line termination capability. The node lacking line termination capability simply loops back packets generated by the other node thus verifying the link. Thus, an optical cross-connect can verify links to a wide variety of node types by employing a single line termination unit capable of terminating any suitable packet type. Alternatively, a router can verify connectivity to an optical cross-connect even when the optical cross-connect lacks any line termination capability at all. This saves greatly on implementation costs for optical networks.
    Type: Grant
    Filed: October 27, 2004
    Date of Patent: June 20, 2006
    Assignee: Cisco Technology, Inc.
    Inventors: Danny Prairie, Daniel C. Tappan, Richard Bradford
  • Patent number: 7061870
    Abstract: Method and system of transmitting a loopback cell of a connection established between a source ATM device and a destination ATM device of an ATM network, with the loopback cell being returned to one of the switching nodes located on the route used by the connection, and entering the switching node by a port of an adapter and going out of the switching node by the same port of the same adapter instead of another connected adapter used by normal cells of the connection.
    Type: Grant
    Filed: January 22, 2001
    Date of Patent: June 13, 2006
    Assignee: International Business Machines Corporation
    Inventor: Daniel Orsatti
  • Patent number: 7061872
    Abstract: A repeater for HDSL transmission is presented. The repeater replaces the regenerator commonly used in HDSL by utilizing the activation/deactivation process in the HDSL specification. The repeater is adjusted to detect an activation/deactivation sequence, whereby a flip-flop in the repeater is alternated. A first state of the flip-flop allows transmission passing through the repeater to the terminating point, e.g. a network terminal, and a second state loops transmission back to the originating point, e.g. a line terminal. The looping may then be utilized for maintenance and error detection and recovery. By use of one of the free bit in the overhead channel in the HDSL transmission as an origin bit, wherein “1” is set in the upstream direction, and “0” is set in the downstream direction, it is possible to detect at the line terminal whether there is a loop in the repeater.
    Type: Grant
    Filed: November 6, 2001
    Date of Patent: June 13, 2006
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Reidar Schumann-Olsen, Steinar Lie