Abstract: Certain aspects of the present disclosure provide techniques for configuring sidelink slots without symbols for automatic gain control. One aspect provides a method for wireless communication by a user equipment, including receiving a first cyclic prefix of a first symbol within a slot at the user equipment. The method further includes configuring a first automatic gain control setting based on a received power in the first cyclic prefix of the first symbol, and receiving a data portion of the first symbol using the first automatic gain control setting.

Abstract: A mixed signal receiver includes a first sample and hold (S/H) circuit having a first S/H input terminal to receive an analog input signal and a first S/H output terminal directly coupled to a first common node; a first data slicer having a first slicer input terminal coupled to the first common node; and a first data-driven charge coupling digital-to-analog converter (DAC) including: (i) a DAC input terminal to receive a first digital signal from a first digital output of the first data slicer, (ii) a DAC output terminal directly coupled to the first common node, (iii) a plurality of capacitor modules configured to be pre-charged during a sample phase, and (iv) logic components, wherein when the logic components toggle a voltage on the plurality of capacitor modules, charge is capacitively coupled to or from the first common node during an immediately subsequent hold phase.

Abstract: Individual bits of a K bit unary data word, wherein K is greater than one, are applied to K polyphase finite impulse response filter circuits. Each polyphase finite impulse response filter circuit receives a different bit and operates with a single bit precision to generate from each received bit a filtered output data word. A gain adjustment is applied by a gain stage circuit to each filtered output data word to generate a corresponding gain adjusted output data word. The gain adjusted output data words from the gain stage circuits are summed to generate an output data word. The unary data word may be output from a source such as a data encoder or a quantizer.

Abstract: Embodiments of the present disclosure provide a method, a device, and a storage medium for hybrid automatic gain control in a communication system. The method includes amplifying an input signal to generate an amplified signal which is converted into a plurality of output signals; obtaining a moving average amplitude of a plurality of output signals of a current input signal; and calculating a signal amplitude difference according to the moving average amplitude and a desired output signal amplitude level; calculating a signal amplitude ratio according to a plurality of output signals of two previous output signal blocks and AGC gains corresponding to the plurality of output signals of the two previous output signal blocks; obtaining a step size according to the signal amplitude difference and the signal amplitude ratio; and calculating an AGC gain of the current input signal according to the step size and a corresponding previous AGC gain.

Abstract: To configure proper time intervals to meet various communication requirements in radio communication systems, and perform various types of processing in the time interval, a user terminal is provided with a transmitting/receiving section that receives numerology information on numerology, and a control section that controls transmission of an uplink signal and/or reception of a downlink signal, according to a basic time unit determined based on configuration information including the numerology information.

Abstract: The systems and methods discussed herein related to digital to analog conversion. A digital to analog conversion a compensation circuit and a digital to analog conversion circuit. The compensation circuit includes a filter configured to provide roll off compensation in a baseband frequency using real coefficients. The compensation circuit is configured to convert the first digital signal to a second digital signal so that the second digital signal can be filtered by the filter using the real coefficients.

Abstract: An electronic device may include wireless circuitry having one or more radios and one or more antennas. The wireless circuitry may operate in the presence of radio-frequency interference coming from various sources, which can cause a loss of sensitivity or desensitization of the wireless circuitry. To detect and mitigate desensitization of the wireless circuitry, one or more processors may receive wireless circuitry performance metric data, discriminate between wideband interference and narrowband interference based on the wireless circuitry performance metric data, and use different representative noise floor values for wideband interference or narrowband interference to characterize the desensitization of the wireless circuitry.

Abstract: A method and apparatus for detecting a valid voice signal and a non-transitory computer readable storage medium are provided. A first audio signal including at least one audio frame signal is obtained. Multiple wavelet decomposition signals respectively corresponding to the at least one audio frame signal are obtained. A wavelet signal sequence is obtained by combining the multiple wavelet decomposition signals. A maximum value and a minimum value among audio intensity values of all sample points are obtained, and a first audio intensity threshold is determined according to the maximum value and the minimum value. Sample points each having an audio intensity value greater than the first audio intensity threshold in the wavelet signal sequence are obtained, and a signal of sample points in the first audio signal corresponding to the sample points each having an audio intensity value greater than the first audio intensity threshold is determined as the valid voice signal.

Abstract: A method of controlling a signal power of a received signal received by a wireless communication device, the method including: measuring the signal power of the received signal at a plurality of time points in response to a gain control signal; calculating a variance of the signal power of the received signal at least some time points of the plurality of time points; and controlling the signal power of the received signal based on a gain level determined according to the variance of the signal power of the received signal.

Abstract: Systems, devices, and methods related to time-interleaved polyphase linearization for a receive signal chain are provided. An example receive signal chain includes an input node to receive a radio frequency (RF) signal. The receive signal chain further includes a plurality of polyphase mixer circuitries including first mixers and first local oscillators to generate a plurality of phase-shifted downconverted signals based on the received RF signal. The receive signal chain further includes a first multiplexer to select one of the plurality of phase-shifted downconverted signals during each time slot of a plurality of time slots. The receive signal chain further includes signal conditioning circuitry comprising at least one nonlinear component. The signal conditioning circuitry conditions, during each time slot, a respective selected one of the plurality of phase-shifted downconverted signals to generate a conditioned signal.

Abstract: A radio-frequency signal preconditioning method includes: receiving, at a radio-frequency signal preconditioning apparatus from an antenna, a radio-frequency signal; selectively providing, at the radio-frequency signal preconditioning apparatus, any of a plurality of gains to the radio-frequency signal to produce an output signal, the plurality of gains spanning a first range; and providing, from the radio-frequency signal preconditioning apparatus, the output signal to a conversion circuit configured to convert the output signal from an analog signal at a radio frequency to a digital signal at a baseband frequency, the conversion circuit having a dynamic range spanning a second range that is smaller than the first range.

Abstract: A sense amplifier circuit includes: a charge module configured to charge a set signal node and a reset signal node according to a clock signal; and a sense module configured to sense and amplify a differential input signal according to the clock signal; where, the sense module includes a first amplification circuit, a second amplification circuit, and a cross hopping transfer circuit cross-connected between the first amplification circuit and the second amplification circuit. The cross hopping transfer circuit is configured to transfer a valid signal of a newly started amplification circuit to another amplification circuit if sensing is completed and the differential input signal hops, such that a set signal/reset signal remains unchanged. A flip-flop includes the sense amplifier circuit.

Abstract: Methods, systems, and devices for including power reporting for network power modification are described. That is, a user equipment (UE) and a base station may exchange signaling supporting an MPR update at the UE. In some examples, the UE may transmit, to the base station, a request for resources for performing channel measurements in accordance with a power reduction update associated with the UE. In response, the UE may receive, from the base station, an indication of a set of resources. In some examples, the UE may perform one or more channel measurements using the set of resources based on receiving the indication of the set of resources. In such examples, the UE may transmit, to the base station, a report indicating one or more power parameters associated with the power reduction update based on the one or more channel measurements.

Abstract: Methods, systems, and devices for wireless communication are described, including techniques for utilizing implicit or explicit signaling to indicate a cancellation of demodulation reference signal (DMRS) bundling. A first user equipment (UE) may perform DMRS bundling across physical sidelink channels transmitted to a second UE to enable the second UE to perform joint channel estimation. In some examples, based on a detected change, either at the first UE or the second UE, the first UE may signal to the second UE that the DMRS bundling is canceled. In some examples, the detected change may be a resource allocation change, a physical channel configuration change, a change in a quasi-colocation (QCL) relationship at the first UE, or a change in a transmission configuration indicator (TCI) state at the first UE. Additionally or alternatively, the first UE or the second UE may request the cancellation based on detected changes.

Abstract: System and device configurations, and processes are provided for determining position based on low Earth orbit (LEO) satellite signals. Frameworks described herein can include performing Doppler frequency measurement for received quadrature phase shift keying (QPSK) signals. The framework may include channel tracking operations to determine Doppler shift measurements, a navigation filter operation to determine clock drift based on each Doppler shift measurement from each channel tracking loop, and determining position of a device based on LEO satellite signal sources. Frameworks described herein are also provided for carrier phase differential (CD)—low Earth orbit (LEO) (CD-LEO) measurements that may utilize a base and a rover without requiring prior knowledge of rover position. Embodiments can also cancel effects of ionospheric and tropospheric delays on the carrier phase and CD-LEO measurements.

Abstract: In one embodiment, a communication system includes network devices, each comprising a network interface to receive at least one data stream, a given network device being configured to recover a remote clock from the at least one data stream received by the given network device, a frequency synthesizer to generate a clock signal and output the clock signal to each of the network devices, wherein the given network device is configured to find a clock frequency differential between the clock signal and the recovered remote clock, and provide a control signal to the frequency synthesizer responsively to the clock frequency differential, the control signal causes the frequency synthesizer to adjust the clock signal so as to iteratively reduce an absolute value of the clock frequency differential between the clock signal and the recovered remote clock.

Abstract: Technology for a repeater is disclosed. The repeater can include a first-direction signal path configured to amplify and filter a signal in a first-direction band using a first bandpass filter. The repeater can include a second-direction signal path configured to amplify and filter a signal in a second-direction band using a second bandpass filter. The second-direction band can be spectrally adjacent to the first-direction band. The first bandpass filter and the second bandpass filter can provide filtering to isolate the first-direction band from the spectrally adjacent second-direction band.

Abstract: An aspect includes a filtering method including operating a first filter to filter a first input signal to generate a first output signal; operating a second filter to filter a second input signal to generate a second output signal; and merging at least a portion of the second filter with the first filter to filter a third input signal to generate a third output signal. Another aspect includes a filtering method including operating switching devices to configure a filter with a first set of pole(s); filtering a first input signal to generate a first output signal with the filter configured with the first set of pole(s); operating the switching devices to configure the filter with a second set of poles; and filtering a second input signal to generate a second output signal with the filter configured with the second set of poles.

Abstract: Methods, systems, and devices for wireless communications are described. A communications device may transmit, to a second communications, a request to update a phase shifter configuration. The first communications device may receive, from the second communications device and in response to the request, a response accepting the request to update the phase shifter configuration. The first communications device may then transmit, to the second communications device, an uplink transmission in accordance with the updated phase shifter configuration based on receiving the response. The first communications device may include a first user equipment (UE) and the second communications device may include a second UE or a base station.

Abstract: Signal processing to compensate for gain control output spikes caused by steps in a digital step attenuator. A method includes receiving a changing power input signal at a receiver. The method includes determining that a change in power of the input signal will cause a step attenuator to change its attenuation in a step of a predetermined amount. The method further includes based on determining that the change in power of the input signal will cause a digital step attenuator to change its attenuation in a step of a predetermined amount, causing a variable attenuator to change its attenuation by an amount related to the predetermined amount at a time coinciding with a time when the step attenuator changes its attenuation by the predetermined amount. The method further includes outputting a gain-controlled output signal resulting from applying the step attenuator and the variable attenuator to the changing power input signal.

Abstract: An asymmetric signal path approach is used to extract differential signals out of the photodetector (e.g., a photodiode) for amplification by a differential transimpedance amplifier (TIA). This asymmetric-path differential TIA configuration has less low-frequency Inter Symbol Interference (ISI) (also known as Baseline Wander), less high-frequency noise amplification, and higher bandwidth capabilities. There is no power penalty with this design in comparison to a single-ended TIA, can extend the range of the link for a given system power consumption, and can decrease transmitter power for a given range.

Abstract: A method of operating a radio receiver device comprises receiving a plurality of signals with a plurality of corresponding frequencies; applying respective gains to each of the plurality of signals; and storing the gain applied to each signal and its corresponding frequency. The method comprises subsequently receiving a further signal with a further frequency; and applying a further gain to the further signal. The further gain is determined using at least one of the stored gains according to a difference between the further frequency and at least one of the plurality of corresponding frequencies.

Abstract: The present disclosure relates to a pre-5th-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4th-Generation (4G) communication system such as Long Term Evolution (LTE). The present disclosure provides a method for transmitting a sidelink signal. The method comprises: determining a Physical Sidelink Control CHannel (PSCCH) transmission mode allowed in a PSCCH transmission resource pool and a Physical Sidelink Shared CHannel (PSSCH) transmission mode allowed in a PSSCH transmission resource pool, respectively; determining a resource for transmitting a PSCCH and a resource for transmitting a PSSCH from the PSCCH transmission resource pool and the PSSCH transmission resource pool respectively; and transmitting the PSCCH according to the determined PSCCH transmission mode and the resource for transmitting the PSCCH and transmitting the PSSCH according to the determined PSSCH transmission mode and the resource for transmitting the PSSCH.

Abstract: A high-speed transimpedance amplifier with bandwidth extension feature over full temperature range and bandwidth extension method belong to the field of integrated circuit. The present invention solves the problem existed in boosting core amplifier bandwidth technology over full temperature range. The present invention includes a preamplifier TIA, a phase splitting stage PS, a pre-driver stage Pre-Drive, an output buffer BUFF and an offset cancelation circuit OC. The preamplifier TIA adopts the gate-drain voltage cancelation technology to expand the bandwidth, so that its ?3 dB bandwidth is greater than twice the closed-loop bandwidth of the first-order TIA. The pre-driver stage Pre-Drive is used to drive the output buffer BUFF. By adjusting the source-level negative feedback capacitance value of the pre-driver stage Pre-Drive circuit to generate a high-frequency gain that varies with temperature, the preamplifier TIA bandwidth differences under different temperature conditions are compensated.

Abstract: System and methods for accuracy improvement of an LVDT are provided. Aspects include determining a first voltage from the first PGA and a second voltage from the second PGA, wherein the first voltage is determined from a PGA coupled to a first secondary winding, and wherein the second voltage is determined from a second PGA coupled to a second secondary winding, iteratively performing: analyzing the first voltage to determine a gain correction is needed for a first gain for the first PGA, the gain correction comprising change to the first gain, and analyzing the second voltage to determine a gain correction is needed for a second gain for the second PGA, the gain correction comprising change to the second gain, based on determining a gain correction is not needed for the first gain and the second gain, calculating a position based on the first voltage and the second voltage.

Abstract: Methods and apparatus to perform an automated gain control protocol with an amplifier based on historical data corresponding to contextual data are disclosed. An example apparatus includes a controller to select an automatic gain control (AGC) parameter for an AGC protocol based on historical data corresponding to contextual data, the contextual data including at least one of a time during which the AGC protocol is performed, a panelist identified by a meter, demographics of an audience identified by the meter, a location of the meter, a station identified by the meter, a media type identified by the meter, or a sound pressure level identified by the meter; and a processor to perform the AGC protocol based on the selected AGC parameter.

Abstract: A mixed signal receiver includes a first sample and hold (S/H) circuit having a first S/H input terminal to receive an analog input signal and a first S/H output terminal directly coupled to a first common node; a first data slicer having a first slicer input terminal coupled to the first common node; and a first data-driven charge coupling digital-to-analog converter (DAC) including: (i) a DAC input terminal to receive a first digital signal from a first digital output of the first data slicer, (ii) a DAC output terminal directly coupled to the first common node, (iii) a plurality of capacitor modules configured to be pre-charged during a sample phase, and (iv) logic components, wherein when the logic components toggle a voltage on the plurality of capacitor modules, charge is capacitively coupled to or from the first common node during an immediately subsequent hold phase.

Abstract: Transmitters and methods of transmitting a polar-modulated signal include a driver to output a polar-modulated signal according to a phase-modulation signal and an amplitude-modulation signal. A voltage regulator is connected to the driver, with the amplitude-modulation signal controlling an input of the voltage regulator and with the amplitude-modulation signal further being combined with an output of the voltage regulator to control an amplitude of the output of the driver to compensate for bandwidth cutoff noise in the voltage regulator.

Abstract: A baseband processing unit includes a baseband processor configured to receive a plurality of component carriers of a radio access technology wireless service, and a delta-sigma digitization interface configured to digitize at least one carrier signal of the plurality of component carriers into a digitized bit stream, for transport over a transport medium, by (i) oversampling the at least one carrier signal, (ii) quantizing the oversampled carrier signal into the digitized bit stream using two or fewer quantization bits.

Abstract: A digital down converter (DDC) that improves efficiency by taking advantage of the periodicity of the coarse mixing process and the memory inherent in the convolution operation performed by decimation filters. In embodiments, the DDC filters and decimates a received signal to generate subfilter outputs and coarse mixes the subfilter outputs for each frequency band of interest. Accordingly, the DDC eliminates the need for separate decimation filters for each of the in-phase (I-phase) and quadrature (Q-phase) signals of each frequency band. In some embodiments, for each frequency band, the DDC combines the subfilter outputs into partial sums for each of the I- and Q-phases. In some of those embodiments, the coarse mixing operation is performed by multiplying the partial sums by real multiplicands and performing a simple post-rotation operation. In those embodiments, the DDC significantly reduces the number of multiplication operations required to perform the coarse mixing process.

Abstract: The present invention is directed to communication systems and electrical circuits. According to an embodiment, the present invention provides a termination circuit that includes an inductor network. The inductor network is coupled to a termination resistor and a capacitor network, which includes a first capacitor and a second capacitor. The termination resistor, the first capacitor, and the second capacitor are adjustable, and they affect attenuation of the termination circuit. There are other embodiments as well.

Abstract: A circuit for direct current (DC) offset estimation comprises a quantile value circuit and a signal processor. The quantile value circuit determines a plurality of quantile values of an input signal and includes a plurality of quantile filters. Each quantile filter includes a comparator, a level shifter, a monotonic transfer function component, and a latched integrator. The comparator compares the input signal and a quantile value. The level shifter shifts the output of the comparator. The monotonic transfer function component determines the magnitude of the shifted signal and provide a transfer function signal. The latched integrator suppresses transient characteristics of the transfer function signal and provide the quantile value. The signal processor is configured to calculate a weighted average of the quantile values to yield a DC offset estimate.

Abstract: In a signal detection apparatus, a quadrature detection circuit subjects a reception signal to quadrature detection. An intensity detection circuit detects a signal intensity by referring to an absolute value of an amplitude of a signal subjected to quadrature detection. A zero cross detection circuit detects the number of times of zero crosses of the signal in a predetermined period of time that is based on a modulation index of the reception signal. A signal determination circuit that determines that the signal is the reception signal when the signal intensity is equal to or higher than a threshold value and the number of times of zero crosses is within a predetermined range.

Abstract: A Bluetooth receiver includes a primary circuit path, which can create a first digital IF modulated signal to obtain a Bluetooth load signal at a current Bluetooth frequency point, and an auxiliary circuit path, in parallel with the primary circuit path, which can create a second digital IF modulated signal in a Bluetooth frequency range across multiple Bluetooth frequency points. A signal analysis module of the auxiliary circuit path may evaluate interference levels of the second digital IF modulated signal at the Bluetooth frequency points, by analyzing a Fourier Transformation (FT) spectrum of the second digital IF modulated signal, and to choose a number of working Bluetooth frequency points corresponding to relative low signal strengths in the FT spectrum. This way may efficiently and quickly choose qualified working Bluetooth frequency points for Adaptive Frequency Hopping (AFH) in a single current time slot, without consuming any additional time slots for detection.

Abstract: A system includes a sampler, a receiver phase-locked loop circuit configured to provide one or more input clock signals, and a phase interpolation circuit coupled to the receiver phase-locked loop circuit and the sampler. The phase interpolation circuit further includes a first phase interpolator configured to generate a first recovered clock signal based on the one or more input clock signals and a first code, and a second phase interpolator configured to generate a second recovered clock signal based on the one or more input clock signals and a second code, wherein the second code has an interpolation code offset from the first code, wherein the interpolation code offset corresponds to a phase shift in the second recovered clock signal relative to the first recovered clock signal, wherein the outputs of the first phase interpolator and second phase interpolator are configured to be merged.

Abstract: It is provided a joint receiver and receiving method for navigation signals located at adjacent frequencies. The joint receiving method includes: receiving a first navigation signal and a second navigation signal which are located at adjacent frequencies (S1); and calculating a frequency estimation of a virtual wideband navigation signal constructed based on the first navigation signal and the second navigation signal (S2), wherein the virtual wideband navigation signal is an asymmetric BOC-like navigation signal having a virtual carrier and a virtual sub-carrier. With the joint receiver and joint receiving method, not only power gain but also bandwidth gain can be obtained, and the ranging precision can be significantly improved.

Abstract: Exemplary multipath digital microphones described herein can comprise exemplary embodiments of automatic gain control and multipath digital audio signal digital signal processing chains, which allow low power and die size to be achieved as described herein, while still providing a high DR digital microphone systems. Further non-limiting embodiments can facilitate switching between multipath digital audio signal digital signal processing chains while minimizing audible artifacts associated with either the change in the gain automatic gain control amplifiers switching between multipath digital audio signal digital signal processing chains.

Abstract: Methods and systems are described for generating a time-varying information signal at an output of a variable gain amplifier (VGA), sampling, using a sampler having a vertical decision threshold associated with a target signal amplitude, the time-varying information signal asynchronously to generate a sequence of decisions from varying sampling instants in sequential signaling intervals, the sequence of decisions comprising (i) positive decisions indicating the time-varying information signal is above the target signal amplitude and (ii) negative decisions indicating the time-varying information signal is below the target signal amplitude, accumulating a ratio of positive decisions to negative decisions, and generating a gain feedback control signal to adjust a gain setting of the VGA responsive to a mismatch of the accumulated ratio with respect to a target ratio.

Abstract: In some embodiments, a pitch filter for filtering a preliminary audio signal generated from an audio bitstream is disclosed. The pitch filter has an operating mode selected from one of either: (i) an active mode where the preliminary audio signal is filtered using filtering information to obtain a filtered audio signal, and (ii) an inactive mode where the pitch filter is disabled. The preliminary audio signal is generated in an audio encoder or audio decoder having a coding mode selected from at least two distinct coding modes, and the pitch filter is capable of being selectively operated in either the active mode or the inactive mode while operating in the coding mode based on control information.

Abstract: A signal strength indicator circuit, configured to detect a power of an output signal outputted by a power amplifier, includes a voltage gain circuit, a current gain circuit, a multiplier, and a buffer stage. The voltage gain circuit provides a first gain to the output signal to generate a first value of an indicating voltage when a voltage of the output signal is not greater than a threshold, and provides a second gain to generate a second value of the indicating voltage when the voltage of the output signal is greater than the threshold. The first gain is greater than the second gain. The current gain circuit generates an indicating current according to an input signal corresponding to the output signal. The multiplier multiplies the indicating voltage and the indicating current to generate an indicating power. The buffer stage converts the indicating power to the indicating signal.

Abstract: A communication quality estimating device estimates an error rate of a signal with FEC capable of correcting K errors. The device obtains a frequency measurement value that indicates a frequency at which a codeword including m errors is received. The device determines a transition probability and a continuation probability included in each of a plurality of formulae, such that a frequency calculation value that is calculated using the plurality of formulae and indicates a frequency at which a codeword including m errors is received is brought close to the frequency measurement value. The device calculates a frequency at which a codeword including more than K errors is received, by using the plurality of formulae each with the determined transition probability and the determined continuation probability. The device estimates after-FEC error rate based on a result of the calculation.

Abstract: In one aspect, a device may include at least one processor and storage accessible to the at least one processor. The storage may include instructions executable by the at least one processor to identify at least one characteristic associated with audio as sensed at a first location, with the audio being produced at a second location that is different from the first location. The instructions may also be executable to, based on the at least one identified characteristic, adjust a first volume level of a first component of the audio in a first frequency and/or first frequency band but not a second volume level of a second component of the audio in a second frequency and/or second frequency band of the audio.

Abstract: The present invention relates to a method and apparatus for reducing power consumption in a receiver of a time slotted communication system. An RF front end has power applied after the start of a preamble or after the start of a header, or upon the start of a packet payload based on connection status, signal level, and interference level. Where the signal level is constant, the communication system is in a connected state, and the interference level is low, the system bypasses packet header destination address matching, or optionally, uses only the least significant bits of the header destination address for matching purposes.

Abstract: Circuits and methods for using in parallel amplification and signal combining are described herein. A circuit uses a digitally controlled multistage cascade combiner, a digital phase and drive signal amplifier controller and a digital combiner controller circuit with N parallel signals with constant amplitudes belonging to an alphabet with M discrete values and discrete phases feeding it. The signals resulting from N power amplifiers (PAs) have also constant amplitudes belonging to an alphabet with N discrete values and discrete phases prior to being fed to the multistage combiner. A digital combiner controller circuit generates digital control information to activate, or deactivate, the outputs of the PAs, where a set of digital control signals generated in digital combiner controller are used to control sets of switches, where the signals can be activated at the combiner's inputs, according to their power and phase values.

Abstract: A method for receiving a modulated signal, includes the steps of receiving a signal modulated by a pulse position modulation (PPM) or a pulse width modulation (PWM) or a pulse amplitude modulation (PAM) or an on-off keying (OOK) amplitude modulation, corresponding to the transmission of a sequence of one or more consecutive digital symbols, squaring the received signal, projecting the square of the received signal onto multiple components of an analogue signal basis in order to obtain an analogue vector of dimension equal to the number of projection components, the components of the analogue signal basis being non-constant functions, digitizing the analogue vector into a digital vector, jointly demodulating the components of the digital vector by way of a maximum likelihood algorithm in order to estimate the transmitted sequence of one or more consecutive digital symbols.

Abstract: Methods, systems, and devices for wireless communications are described. The method, systems, and devices may include techniques for establishing a first connection with a first cell operating in accordance with a first radio access technology (RAT), and performing a beam sweep procedure for one or more candidate beams for adding or handover to a second cell operating in accordance with millimeter wave (mmW) RAT. The beam sweep procedure may be performed based on previous beam measurements stored in a measurement database. The techniques may further include selecting a beam from the one or more candidate beams for adding or handover to the second cell based on the beam sweep procedure, and adding or handing over to the second cell by establishing a second connection with the second cell using the selected beam.

Abstract: A method and apparatus for use in a mobile device telemetry system is disclosed. The method and apparatus relate to aspects in a mobile device protocol health monitoring system. The method and apparatus provide a system to monitor and assess protocol health, log protocol health data and communicate the logs of protocol health data to a remote system. The system may also take corrective actions based upon specific indications of protocol health. The method and apparatus also provides protocol health indications and corrective actions based upon monitoring the message transmission rate. The method and apparatus also provides protocol health indications and corrective actions based upon monitoring for a line disconnect.

Abstract: A method of operating a radio receiver device comprises receiving a plurality of signals with a plurality of corresponding frequencies; applying respective gains to each of the plurality of signals; and storing the gain applied to each signal and its corresponding frequency. The method comprises subsequently receiving a further signal with a further frequency; and applying a further gain to the further signal. The further gain is determined using at least one of the stored gains according to a difference between the further frequency and at least one of the plurality of corresponding frequencies.

Abstract: An RF receiver circuit configuration and design is limited by conditions and frequencies to simultaneously provide steady state low-noise signal amplification, frequency down-conversion, and image signal rejection. The RF receiver circuit may be implemented as one of a CMOS single chip device or as part of an integrated system of CMOS components.

Abstract: A first sampling circuit takes phase offset first samples of a received serial data stream in response to a first edge of a sampling clock and a first comparator circuit determines whether the plurality of phase offset first samples have a same logic state. A second sampling circuit takes phase offset second samples of the received serial data stream in response to a second edge of the sampling clock, opposite the first edge, and a second comparator circuit determines whether the phase offset second samples have a same logic state. One of the first samples or one of the second samples is then selected in response to the determinations made by the first and second comparator circuits. A serial to parallel converter circuit generates an output word including the selected one of the first and second samples.