By Filtering (e.g., Digital) Patents (Class 375/350)
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Patent number: 8804807Abstract: A method for removing distortions in a transmitted signal transmitted by a high power amplifier in a satellite communications system. The method characterizes the high power amplifier to define a series of Volterra coefficients and uses those coefficients in an equalizer in a receiver in the communications system to remove the distortions. The equalizer is a non-linear soft interference cancellation and minimum mean square error equalizer that employs three processing operations including parallel soft interference cancellation, minimum mean square error filtering and a priori log-likelihood ratio calculations.Type: GrantFiled: February 4, 2013Date of Patent: August 12, 2014Assignee: Northrup Grumman Systems CorporationInventors: Daniel N. Liu, Michael P. Fitz
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Patent number: 8803730Abstract: A system, method, and apparatus for radar pulse detection using a digital radar receiver are disclosed herein. In electronic warfare (EW), radars operate in an environment with highly dense electronic waveforms. As a result, the radars may receive thousands or millions of radar pulses every second. To detect and sort out radar pulses emitted from different radars is a challenging problem in electronic warfare. The present disclosure teaches a radar pulse detection system that utilizes digital channelization and joint-channel detection techniques to detect and separate radar pulses that are sent from different radar emitters. The main features of the present disclosure are: 1.) a digital channelization technique to separate radar pulses from their mixtures; 2.) a multi-channel detection technique to detect radar pulses; and 3.) an innovative technique to separate overlapped radar pulses.Type: GrantFiled: July 21, 2011Date of Patent: August 12, 2014Assignee: The Boeing CompanyInventor: Qin Jiang
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Patent number: 8803716Abstract: A chip with a built-in self-test (BIST) component capable of testing the linearity of an ADC is described herein. The BIST component uses hardware registers to facilitate a sliding histogram technique to save space on the chip. A subset of detected digital codes are analyzed, and DNL and INL calculations are performed by a controller to determine whether any of the digital codes in the subset exceed maximum or minimum DNL and INL thresholds. New digital codes being detected by the ADC are added to the subset as lower-value digital codes are pushed out of the subset, maintaining the same number of digital codes being analyzed as the subset moves from lower codes detected during lower voltages to higher codes detected at higher voltages. A synchronizer and pointer ensure that the subset moves through the digital codes at the same rate as the analog input ramp source.Type: GrantFiled: April 10, 2013Date of Patent: August 12, 2014Assignee: STMicroelectronics International N.V.Inventors: Ravindranath Ramalingaiah Munnan, Raghu Ravindran, Ravi Shekhar
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Patent number: 8804886Abstract: A receiver for processing a received signal encoded with a codeword and mapped to two layers includes a plurality of equalizers for equalizing the received signal, a plurality of demodulators for demodulating a respective equalized signal, a decoder for decoding the demodulated signal by extracting soft bits from the demodulated signal, a modulator for modulating the decoded signal by generating soft symbols based on the extracted soft bits, a demapper for demapping the modulated signal to soft symbols corresponding to each of the two layers and a plurality of inter-layer interference cancellers for cancelling interference utilizing the demapped soft symbols wherein the demapped soft symbols are utilized also by the equalizers to reduce inter-symbol interference.Type: GrantFiled: April 20, 2011Date of Patent: August 12, 2014Assignee: Telefonaktiebolaget L M Ericsson (Publ)Inventor: Yi-Pin Eric Wang
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Publication number: 20140219405Abstract: Values representative of modulation signal components are extracted from a modulated signal. The modulated signal contains a modulation signal. A periodic time segment sequence is defined having at least four ordered time segments. Multiple sets of signal values are acquired from the modulated signal. For each signal value, a difference in the modulated signal during each of two of the ordered time segments is acquired, as the signal value. The two ordered time segments differ in their order within the sequence by half of the number of ordered time segments in the sequence. Each set is acquired over multiple repetitions of the periodic time segment sequence. Each set is acquired during different ordered time segments than each other set. Each signal value is representative of a modulation signal component.Type: ApplicationFiled: April 14, 2014Publication date: August 7, 2014Inventor: David K. Nienaber
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Patent number: 8798219Abstract: A high-speed serial data transceiver includes multiple receivers and transmitters for receiving and transmitting multiple analog, serial data signals at multi-gigabit-per-second data rates. Each receiver includes a timing recovery system for tracking a phase and a frequency of the serial data signal associated with the receiver. The timing recovery system includes a phase interpolator responsive to phase control signals and a set of reference signals having different predetermined phases. The phase interpolator derives a sampling signal, having an interpolated phase, to sample the serial data signal. The timing recovery system in each receiver independently phase-aligns and frequency synchronizes the sampling signal to the serial data signal associated with the receiver. A receiver can include multiple paths for sampling a received, serial data signal in accordance with multiple time-staggered sampling signals, each having an interpolated phase.Type: GrantFiled: February 15, 2013Date of Patent: August 5, 2014Assignee: Broadcom CorporationInventors: Aaron W. Buchwald, Michael Le, Josephus van Engelen, Xicheng Jiang, Hui Wang, Howard A. Baumer, Avanindra Madisetti
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Patent number: 8798216Abstract: A circuit for down-converting an RF signal to a baseband signal includes a trans-admittance amplifier adapted to receive the RF signal and generate in response a pair of differential current signals. The circuit further includes a trans-impedance amplifier having at least four mixers and at least four linear amplifiers. The four mixers frequency down-convert the pair of differential current signals to generate four pairs of differential baseband current signals, wherein each pair of the differential baseband current signals has a different phase and is associated with each of the linear amplifiers. Additionally, the circuit includes a summing block that generates an in-phase signal using a first weighted sum of the four different baseband current signals and a quadrature signal using a second weighted sum of the four different baseband current signals. The circuit further includes an analog-to-digital converter for converting the in-phase and quadrature signals to respective digital representations.Type: GrantFiled: January 5, 2011Date of Patent: August 5, 2014Assignee: MaxLinear, Inc.Inventors: Raja Pullela, Yu Su, Wenjian Chen
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Patent number: 8798125Abstract: The present invention includes a method of determining a phase estimate for an input signal having pilot symbols. The method includes receiving a plurality of pilot symbols, and then multiplying two or more pilot symbol slots by corresponding correlator coefficients to correct a phase estimate of the input signal.Type: GrantFiled: August 5, 2013Date of Patent: August 5, 2014Assignee: Broadcom CorporationInventors: Tommy Yu, Amy Gayle Hundhausen
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Publication number: 20140211890Abstract: Wireless communication is ubiquitous today and deployments are growing rapidly leading to increased interference, increasing conflicts, etc. As a result monitoring the wireless environment is increasingly important for regulators, service providers, Government agencies, enterprises etc. Such monitoring should be flexible in terms of the networks being monitored within the wireless environment but should also provide real-time monitoring to detect unauthorized transmitters, provide dynamic network management, etc. Accordingly, based upon embodiments of the invention, a broadband, real-time signal analyzer (RTSA) circuit that allows for the deployment of RTSA devices in a distributed environment wherein determination of policy breaches, network performance, regulatory compliance, etc. are locally determined and exploited directly in network management or communicated to the central server and network administrators for subsequent action.Type: ApplicationFiled: March 18, 2014Publication date: July 31, 2014Applicant: ThinkRF CorporationInventors: Nikhil Adnani, Gilbert Brunette, Tim Hember
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Publication number: 20140211892Abstract: The present invention relates to a receiving node, and to a related method of adjusting a frequency domain channel estimate in a receiving node of a wireless communication system using Orthogonal Frequency Division Multiplexing. The method comprises estimating (210) a phase rotation of the frequency domain channel estimate, and compensating (220) for the estimated phase rotation in the frequency domain channel estimate. It also comprises transforming (230) the compensated frequency domain channel estimate into a time domain channel estimate, filtering (240) the time domain channel estimate to suppress noise, transforming (250) the filtered time domain channel estimate back into a noise suppressed frequency domain channel estimate, and adding (260) the estimated phase rotation in the noise suppressed frequency domain channel estimate to achieve an adjusted and improved frequency domain channel estimate.Type: ApplicationFiled: October 25, 2010Publication date: July 31, 2014Applicant: TELEFONAKTIEBOLAGET L M ERICSSON (PUBL)Inventors: Zhiheng Guo, Ruiqi Zhang, Hai Wang
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Publication number: 20140211889Abstract: A system according to one embodiment includes a demodulator configured to receive an orthogonal frequency division multiplexed (OFDM) modulated signal comprising a current symbol and a sequence of previous symbols, each of the symbols comprising one or more pilot sub-carriers and one or more data sub-carriers; a phase angle computation circuit coupled to the demodulator, the phase angle computation circuit configured to compute a first mean, the first mean computed from the phase angle of one or more of the pilot sub-carriers of a predetermined number of the previous symbols; a predictive filter circuit coupled to the phase angle computation circuit, the predictive filter circuit configured to compute a second mean, the second mean estimating the phase angle of one or more sub-carriers of the current symbol, the estimation based on the first mean; and a phase noise cancelling circuit coupled to the predictive filter circuit, the phase noise cancelling circuit configured to correct the phase of one or more subType: ApplicationFiled: December 20, 2011Publication date: July 31, 2014Inventors: Bernard Arambepola, Thushara Hewavithana, Parveen K. Shukla, Sahan S. Gamage
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Patent number: 8792600Abstract: An arrangement (30) and a method for digitally filtering a time-discrete digital signal, wherein the signal is transformed to the frequency domain using discrete Fourier transformation (31), the signal is filtered in the frequency domain (33), wherein a filter response can be adapted in real time as required to respond to changes in the interference environment, and the filtered signal is transformed back to the time domain using inverse discrete Fourier transformation (32) to create an output signal, and wherein bin frequencies of said signal in the frequency domain are translated by a real amount and the sampling rate of the output signal is changed by a real factor.Type: GrantFiled: December 17, 2009Date of Patent: July 29, 2014Assignee: NXP B.V.Inventors: Robert Fifield, Brian John Minnis
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Patent number: 8792543Abstract: An impulse noise mitigation circuit (INMC) may set a cut-off frequency of each of two high pass filters to bound a frequency bandwidth of a desired signal, wherein a first of the two filters allows frequencies higher than the frequency bandwidth of the desired signal, and a second of the two filters allows frequencies lower than the frequency bandwidth of the desired signal. The INMC may compute and store a mean magnitude separately for a first signal response of the first filter and a second signal response of the second filter. The INMC may select the first filter for impulse noise mitigation when the mean magnitude of the second filter is greater than the mean magnitude of the first filter. The INMC may select the second filter for impulse noise mitigation when the mean magnitude of the first filter is greater than the second filter.Type: GrantFiled: July 15, 2013Date of Patent: July 29, 2014Assignee: MaxLinear, Inc.Inventors: Andy Lo, Sugbong Kang
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Patent number: 8787507Abstract: A novel receiver architecture optimizes receiver performance in the presence of interference. In various embodiments, power estimation circuits are used with variable selectivity to determine the exact nature of the interference and to optimize the performance correspondingly. The variable selectivity is achieved using stages of filtering with progressively narrower bandwidths. Also, the actual method of optimizing the receiver performance is novel compared to the prior art in that the gain settings and the baseband filter order (stages to be used) will be optimized based on the nature of the interference as determined by the power detector measurements. For a device such as a cellular phone that operates in a dynamic and changing environment where interference is variable, embodiments advantageously provide the capability to modify the receiver's operational state depending on the interference.Type: GrantFiled: July 25, 2011Date of Patent: July 22, 2014Assignee: Spreadtrum Communications USAInventors: David Haub, Zhigang Xu, Jarrett Malone
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Patent number: 8787510Abstract: A method, a mobile system, and a user device for determining a delay spread are disclosed. A memory 306 may store a compound test value based on a multiburst history. The multiburst history may be a set of power delay profile decisions. A processor 304 may create a short power delay profile channel estimate and a long power delay profile channel estimate. The processor 304 may select a chosen power delay profile channel estimate based on the compound test value.Type: GrantFiled: December 30, 2009Date of Patent: July 22, 2014Assignee: Motorola Mobility LLCInventors: Sandeep Krishnamurthy, Colin Frank, Kenneth Stewart
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Patent number: 8787509Abstract: A method for suppressing interference in a wireless communication comprises receiving a burst of symbols, filtering the burst of symbols using an interference suppression filter with a first plurality of weights, decoding the filtered burst of symbols to generate data corresponding to the burst of symbols, encoding the data to generate a re-encoded burst of symbols, calculating a second plurality of weights for the interference suppression filter based upon the re-encoded burst of symbols, filtering the re-encoded burst of symbols using the interference suppression filter with the second plurality of weights, and decoding the filtered re-encoded burst of symbols.Type: GrantFiled: June 4, 2009Date of Patent: July 22, 2014Assignee: QUALCOMM IncorporatedInventors: Divaydeep Sikri, Farrakh Abrishamkar
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Patent number: 8787511Abstract: A system including a filter and a downconverter. The filter is configured to receive, from a node, (i) a first signal and (ii) a second signal, and filter the second signal. The filter includes a first input impedance. The filter comprises a first plurality of switches and a first circuit. The first plurality of switches is configured to communicate with the node. The first plurality of switches is clocked at a first frequency. The first frequency is based on a frequency of the first signal. The first circuit is configured to communicate with an output of the plurality of switches. The first circuit includes a second input impedance. The second input impedance is different than the first input impedance. The downconverter is configured to (i) receive the first signal and (ii) downconvert the first signal. The filter and the downconverter are connected in parallel to the node.Type: GrantFiled: October 22, 2013Date of Patent: July 22, 2014Assignee: Marvell World Trade Ltd.Inventors: Brian Brunn, Gregory Uehara, Sehat Sutardja
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Patent number: 8787512Abstract: An apparatus includes Radio Frequency (RF) circuitry and baseband circuitry. The RF circuitry is configured to receive strobe messages that are based on a system clock over a digital interface, and to communicate synchronously with the system clock based on the received strobe messages in accordance with a Radio Access Technology (RAT) that is selected from among multiple different RATs. The baseband circuitry is configured to generate the strobe messages, to delay the strobe messages by a delay that depends on the selected RAT, and to send the delayed strobe messages to the RF circuitry over the digital interface.Type: GrantFiled: September 15, 2013Date of Patent: July 22, 2014Assignee: Marvell International Ltd.Inventors: Daniel Ben-Ari, Avner Epstein
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Patent number: 8787439Abstract: In described embodiments, a Decision Feed Forward Equalizer (DFFE) comprises a hybrid architecture combining features of a Feed Forward Equalizer (FFE) and a Decision Feedback Equalizer (DFE). An exemplary DFFE offers relatively improved noise and crosstalk immunity than an FFE implementation alone, and relatively lower burst error propagation than a DFE implementation alone. The exemplary DFFE is a relatively simple implementation due few or no critical feedback paths, as compared to a DFE implementation alone. The exemplary DFFE allows for a parallel implementation of its DFE elements without an exponential increase in the hardware for higher numbers of taps. The exemplary DFFE allows for cascading, allowing for progressive improvement in BER, at relatively low implementation cost as a solution to achieve multi-tap DFE performance.Type: GrantFiled: March 13, 2012Date of Patent: July 22, 2014Assignee: LSI CorporationInventors: Chaitanya Palusa, Tomasz Prokop, Adam B. Healey, Ye Liu
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Patent number: 8787436Abstract: A communication device is disclosed including: an analog-to-digital converter (ADC) for converting an analog input signal into a digital input signal; an equalizer module coupled with the ADC for processing the digital input signal to generate an equalized signal; a data slicer coupled with the equalizer module for generating an output signal based on the equalized signal; and a control unit coupled with the equalizer module and the data slicer; wherein the control unit or the equalizer module preserves at least one signal equalizing parameter of the equalizer module before the equalizer module enters power saving mode, and the equalizer module loads the at least one signal equalizing parameter to operate when the communication device receives a predetermined control signal.Type: GrantFiled: December 23, 2011Date of Patent: July 22, 2014Assignee: Realtek Semiconductor Corp.Inventors: Liang-Wei Huang, Fang-Ru Wang, Ting-Fa Yu, Chien-Sheng Lee
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Patent number: 8787142Abstract: It is disclosed a method including accommodating, in frequency domain, a first bandwidth of a first carrier signal with respect to a second bandwidth of a second carrier signal such that the first bandwidth adjoins to or overlaps the second bandwidth, the first bandwidth being greater than the second bandwidth. In a further aspect, prior to the transmission, the interference of the modulated second carrier signal is subtracted from each of the plurality of subcarrier signals of the first carrier signal.Type: GrantFiled: September 15, 2009Date of Patent: July 22, 2014Assignee: Nokia Siemens Networks OyInventors: Oliver Cyranka, Martin Goldberg, Helmut Heinz, Rupert Herzog, Thomas Hindelang, Sabine Roessel, Wolfgang Zirwas
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Publication number: 20140198886Abstract: A receiver communicating according to a wireless communication protocol standard for filtering a signal received at a single antenna. The receiver includes filter modules, receiver modules, and a summer. The filter modules receive from antennas multipath components of the signal as transmitted to the receiver. The signal includes bits of data. Each of the filter modules: receives corresponding ones of the multipath components of the signal as received at a respective one of the antennas; and according to the wireless communication protocol standard, filters the signal as received at the respective one of the antennas to generate a filtered signal. The receiver modules respectively receive the filtered signals. Each of the receiver modules combines the multipath components in the respective filtered signal to generate an output signal. Each of the output signals includes a respective version of the bits of data. The summer sums the output signals.Type: ApplicationFiled: March 18, 2014Publication date: July 17, 2014Applicant: MARVELL WORLD TRADE LTD.Inventors: ZHIYU YANG, HONGYUAN ZHANG
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Publication number: 20140198887Abstract: A system that incorporates teachings of the subject disclosure may include, for example, a method for analyzing a wide frequency band with respect to signal power levels in specified narrow frequency bands, detecting narrow band signal power levels received in the specified narrow frequency bands, determining an average composite wideband power level from the narrow band signal power levels, determining an adaptive threshold from the average composite wideband power level, detecting narrow band interference according to the adaptive threshold, and configuring a filter to substantially suppress the detected narrow band interference. Other embodiments are disclosed.Type: ApplicationFiled: March 18, 2014Publication date: July 17, 2014Applicant: ISCO International, LLCInventors: Charles E. Jagger, Mark N. Willetts, Micolino Tobia
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Patent number: 8781043Abstract: Techniques for recovering a desired transmission in the presence of interfering transmissions are described. For successive equalization and cancellation (SEC), equalization is performed on a received signal to obtain an equalized signal for a first set of code channels. The first set may include all code channels for one sector, a subset of all code channels for one sector, multiple code channels for multiple sectors, etc. Data detection is then performed on the equalized signal to obtain a detected signal for the first set of code channels. A signal for the first set of code channels is reconstructed based on the detected signal. The reconstructed signal for the first set of code channels is then canceled from the received signal. Equalization, data detection, reconstruction, and cancellation are performed for at least one additional set of code channels in similar manner.Type: GrantFiled: November 15, 2006Date of Patent: July 15, 2014Assignee: QUALCOMM IncorporatedInventors: Byonghyo Shim, Inyup Kang, Farrokh Abrishamkar, Sharad Sambhwani
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Patent number: 8781044Abstract: A system that incorporates teachings of the subject disclosure may include, for example, a method for selecting a spectral region in a radio frequency spectrum for initiating a communication session having an uplink and a downlink, correlating a signal strength of portions of the spectral region to generate a correlation factor, detecting radio frequency interference in the spectral region according to the correlation factor, and generating tuning coefficient data to substantially suppress the radio frequency interference in the spectral region during the communication session. Other embodiments are disclosed.Type: GrantFiled: September 14, 2012Date of Patent: July 15, 2014Assignee: ISCO International LLCInventors: Amr Abdelmonem, Sean S. Cordone
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Patent number: 8781030Abstract: A system for removing interference comprising a receive decimation filter that accepts a composite received baseband signal and generates filtered sampled data at a decimation rate, a transmit decimation filter that accepts a digitally converted replica of an interfering signal and generates filtered sampled data at a decimation rate, an integer sample delay control (ISDC) that provides multiple sample delay control for the replica and stores an estimated delay value, an adaptive filter that provides fractional sample delay control for the replica of the interfering signal and optimizes cancellation of the interfering signal, a digital phase-locked loop (DPLL) programmed with a known frequency offset of the interfering signal that tracks a phase and frequency of the replica of the interfering signal, an automatic gain control (AGC) that maintains near full scale operation of adaptive filtering and the DPLL, and a slicer, mixer, and delay unit forming an error estimator.Type: GrantFiled: November 27, 2012Date of Patent: July 15, 2014Assignee: Comtech EF Data Corp.Inventors: Lianfeng Peng, Lazaro F. Cajegas, III
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Patent number: 8781054Abstract: A semiconductor device includes a clock-and-data recovery circuit including a phase tracking loop that generates a phase difference signal indicating a phase difference between a reception clock generated from a transmission clock and an input signal and makes the reception clock track the input signal, a frequency tracking loop that performs control to make a frequency of the reception clock track a frequency of the input signal, the clock-and-data recovery circuit being configured to extract a data signal and a synchronization clock from the input signal and to control a phase and a frequency of the reception clock, a frequency error adjuster that increases or decreases a value indicated by a frequency adjustment signal according to a frequency difference signal generated based on the phase difference signal, and an oscillator that increases or decreases a frequency of the transmission clock based on the frequency adjustment signal.Type: GrantFiled: July 22, 2011Date of Patent: July 15, 2014Assignee: Renesas Electronics CorporationInventor: Morishige Aoyama
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Patent number: 8781430Abstract: Exemplary embodiments of the invention disclose receiver baseband filtering. In an exemplary embodiment, the filter device may comprise a continuous-time filter and a discrete-time filter operably coupled to the continuous time-filter. The discrete-time filter may include a passive infinite impulse response filter operably coupled between the continuous-time filter and an amplifier. The discrete-time filter may also include an active infinite impulse response filter operably coupled between an output of the amplifier and an input of the amplifier. The discrete-time filter may be configured to combine an output of the active infinite impulse response filter and an output of the passive infinite impulse response filter to form a composite signal. Furthermore, the amplifier may be configured to receive and amplify the composite signal.Type: GrantFiled: June 29, 2009Date of Patent: July 15, 2014Assignee: QUALCOMM IncorporatedInventor: Russell J. Fagg
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Patent number: 8779847Abstract: System and methods are provided for signal processing. For example, an input signal is received at a finite impulse response filter circuit including a plurality of stages, where each stage of the plurality of stages is associated with a sample value of the input signal and a stage weight. An output signal is generated using the finite impulse response filter circuit, the output signal being equal to a weighted sum of the sample values of the input signal. An error signal is generated to indicate a difference between the output signal and a target. A constraint is applied to one or more of the stage weights. The stage weights are changed within the constraint to reduce a magnitude of the error signal.Type: GrantFiled: June 18, 2012Date of Patent: July 15, 2014Assignee: Marvell International Ltd.Inventors: Yu-Yao Chang, Jun Gao, Gregory Burd
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Patent number: 8774322Abstract: The present disclosure provides a system, apparatus and method to reduce phase noise associated with a received data signal, while optimizing system performance. An optimal length of a digital filter, employed in a carrier phase recovery process, is determined such that phase noise is reduced in the received data signal. Reduction of the phase noise present in the received data signal leads to improved receiver performance. The optimal length of the digital filter may be continuously performed, resulting in optimal performance of the receiver.Type: GrantFiled: October 11, 2010Date of Patent: July 8, 2014Assignee: Infinera CorporationInventor: Gilad Goldfarb
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Patent number: 8774290Abstract: A transmitter apparatus includes a reference signal transmitting unit that transmits a both of a first reference signal and a second reference signal differing from the first reference signal to a first receiver apparatus performing non-cooperative communication and to a second receiver apparatus performing cooperative communication, respectively. In addition, the transmitter apparatus includes a notifying unit that instructs the first receiver apparatus to measure the first reference signal and that instructs the second receiver apparatus to measure the second reference signal.Type: GrantFiled: May 31, 2010Date of Patent: July 8, 2014Assignee: Sharp Kabushiki KaishaInventors: Toshizo Nogami, Kazuyuki Shimezawa, Shohei Yamada, Wahoh Oh
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Patent number: 8774335Abstract: A system that incorporates teachings of the subject disclosure may include, for example, a method for scanning a radio frequency spectrum for an available frequency band, selecting an available frequency band in the radio frequency spectrum even if the available frequency band is affected by radio frequency interference, measuring a signal strength in portions of the available frequency band, correlating the signal strength of each portion to generate a correlation factor, detecting radio frequency interference in the available frequency band according to the correlation factor, and generating tuning coefficient data to cause the filter apparatus to substantially suppress the radio frequency interference in the available frequency band. Other embodiments are disclosed.Type: GrantFiled: September 14, 2012Date of Patent: July 8, 2014Assignee: ISCO International LLCInventors: Amr Abdelmonem, Sean S. Cordone
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Extracting clock information from a serial communications bus for use in RF communications circuitry
Patent number: 8774735Abstract: The present disclosure relates to RF front-end (RFFE) circuitry that includes multiple RFFE circuits, each of which may be provided by a separate integrated circuit (IC), front-end module, or both. As such, the RFFE circuits may be connected to one another using an RFFE serial communications bus. Further, one or more of the RFFE circuits may need an accurate clock source for analog-to-digital conversion (ADC), digital-to-analog conversion (DAC), calibration, sensor measurements, or the like. Instead of including an integral clock source circuit or receiving a separate external clock signal, an RFFE circuit may extract clock information from the RFFE serial communications bus to provide one or more clock signals. The clock information may be associated with one or more serial communications commands via the RFFE serial communications bus, may be associated with alternate functionality of the RFFE serial communications bus, or both.Type: GrantFiled: July 9, 2013Date of Patent: July 8, 2014Assignee: RF Micro Devices, Inc.Inventors: Dharma Reddy Kadam, Christopher Truong Ngo, Nadim Khlat -
Patent number: 8767812Abstract: Various systems and methods are described for performing fractionally spaced time domain equalization (TEQ). One embodiment is a method implemented in a communication system for training a fractionally spaced time domain equalizer (TEQ). The method comprises performing an initialization phase, averaging a received signal in the system to reduce effects of noise in a channel, determining a channel estimate, and aligning an ideal reference signal with the received signal. The method further comprises updating a target response filter according to a non-integer multiple of a base sampling rate, determining an adaptation error based on useful information both inside and outside a Nyquist band of the TEQ, and updating the TEQ according to the adaptation error.Type: GrantFiled: April 7, 2011Date of Patent: July 1, 2014Assignee: Ikanos Communications, Inc.Inventors: Lin Lin Li, Amitkumar Mahadevan
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Patent number: 8767849Abstract: A wireless receiver is constructed to equalize a time-domain received signal, detect a plurality of symbols of the equalized time-domain received signal, and perform interference cancellation on the time-domain received signal. The interference cancellation can be performed using a partial result produced by an IDFT, and may use only neighboring symbols in a detected plurality of symbols. The resulting wireless receiver can be constructed to operate efficiently under a plurality of wireless standards.Type: GrantFiled: February 24, 2012Date of Patent: July 1, 2014Assignee: Futurewei Technologies, Inc.Inventors: Bei Yin, Kiarash Amiri, Joseph R. Cavallaro, Yuanbin Guo
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Patent number: 8767895Abstract: A target link signal may be received at a receiving device with the target link signal being received in a received signal also including an interfering link signal. A quality of the interfering link signal in the received signal may be estimated at the receiving device to provide an estimated interfering link signal quality. One of a plurality of interference cancellation techniques may be selected responsive to the estimated interfering link signal quality, and an interference cancellation signal may be generated using the selected one of the plurality of interference cancellation techniques. Information of the interference cancellation signal may be incorporated in the received signal. Responsive to incorporating information of the interference cancellation signal in the received signal, the received signal may be demodulated to provide a demodulated target link signal, and the demodulated target link signal may be decoded to provide a target link bit stream.Type: GrantFiled: June 21, 2011Date of Patent: July 1, 2014Assignee: Telefonaktiebolaget L M Ericsson (publ)Inventor: Andres Reial
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Patent number: 8767880Abstract: A method includes receiving a signal including first data precoded on the basis of a first codebook entry of a codebook, wherein the codebook includes at least one further codebook entry, averaging a set of matrices to obtain a mean matrix wherein each matrix of the set of matrices is determined on the basis of a respective other codebook entry of the at least one further codebook entry and determining a covariance matrix on the basis of the mean matrix.Type: GrantFiled: July 27, 2012Date of Patent: July 1, 2014Assignee: Intel Mobile Communications GmbHInventors: Rajarajan Balraj, Tobias Scholand, Biljana Badic
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Patent number: 8767858Abstract: Provided is a communication system using a space division multi-user multiple input multiple output (SD-MIMO) communication method. A transmission apparatus may transmit, to each of terminals included within a coverage, common control information commonly transmitted to the terminals and individual control information individually transmitted to each of the terminals. The transmission apparatus does not precode the common control information and transmits the non-precoded common control information. The transmission apparatus precodes the individual control information and transmits the precoded individual control information.Type: GrantFiled: November 30, 2010Date of Patent: July 1, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Ui Kun Kwon, Tae Rim Park, Young Soo Kim, Eung Sun Kim
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Patent number: 8761328Abstract: An update algorithm for equalizer coefficients in a communications system using phase correction symbols. Instead of using a traditional all symbols slicer update algorithm, the equalizer is updated during phase correction symbols for optimal performance in low signal-to-noise ratio conditions. In lower signal-to-noise ratio conditions, the equalizer uses a phase correction circuit to compensate for distortion caused by a communication channel when a demodulated data stream contains an unknown phase offsets resulting from a fast dynamic distortion. More specifically, the phase correction circuit uses a phase correction signal to correct for the unknown phase offsets in a demodulated data stream in lower signal-to-noise ratio conditions. The equalizer then corrects for distortion caused by the communication channel based upon the phase corrected demodulated data stream.Type: GrantFiled: January 25, 2012Date of Patent: June 24, 2014Assignee: Broadcom CorporationInventors: Tommy Yu, Amy Gayle Hundhausen
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Patent number: 8761785Abstract: When enabled with common reference signal interference cancelation, a user equipment (UE) may still compute a channel state feedback value with consideration of any canceled interfering neighboring signals. When the neighboring cells are determined to be transmitting data during the time for which the channel state feedback value is being computed, the UE is able to derive the channel state feedback value considering those canceled interfering signals. The UE determines whether each neighboring cell is transmitting during the designated time either by obtaining signals that indicate the transmission schedule of the neighboring cells or by detecting the transmission schedule, such as based on the power class of the neighboring cells. If the UE determines that the neighboring cells are transmitting data during this time period, the UE will compute the channel state feedback value including consideration of the canceled interfering signals.Type: GrantFiled: June 10, 2013Date of Patent: June 24, 2014Assignee: QUALCOMM IncorporatedInventors: Aleksandar Damnjanovic, Taesang Yoo
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Patent number: 8762820Abstract: Aspects are directed to communicating data over power distribution lines carrying alternating current, using a communication protocol for communicating data between endpoint devices and an upstream data-collecting device. From first symbols having a plurality of bits, at least two second symbols are generated, the second symbols respectively including different subsets of the bits in the first symbol. Each first symbol is split into second symbols having a predefined bit size for an encoding operation that operates on entire symbols having the predefined bit size (e.g., smaller than the bit size of the first symbols). The second symbols are encoded and combined according to the communication protocol. The encoded symbols are communicated over the power distribution lines based on timing indicated at least in part by the alternating current.Type: GrantFiled: December 22, 2011Date of Patent: June 24, 2014Assignee: Landis+Gyr Technologies, LLCInventors: Damian Bonicatto, Chad Wolter
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Patent number: 8761327Abstract: Systems and methods are described including receiving a clock signal, using rational clock divider (RCD) logic to generate a lower frequency clock signal in response to the received clock signal, and using the second clock signal to drive software timer logic and generate media timestamps.Type: GrantFiled: June 14, 2011Date of Patent: June 24, 2014Assignee: Intel CorporationInventor: Pat Brouillette
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Patent number: 8761304Abstract: An apparatus for processing a digital transmission signal for a transmitter includes a transmission Finite Impulse Response (FIR) filter to perform shaping on initial setting data to convert the initial setting data into a signal having a predetermined passband, a comparator to compare the signal with data including degradation information provided as feedback by a receiver corresponding to the transmitter, to generate a control signal, and a band flatness correction filter to adjust a coefficient of the band flatness correction filter in response to the control signal, and to correct an in-band flatness.Type: GrantFiled: September 15, 2010Date of Patent: June 24, 2014Assignee: Electronics and Telecommunications Research InstituteInventors: Min Soo Kang, Woo Jin Byun, Kwang Seon Kim, Bong-Su Kim, Myung Sun Song
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Patent number: 8761710Abstract: A portable computing device includes an FEM, a SAW-less receiver, a SAW-less transmitter, and a baseband processing unit. The FEM isolates one or more outbound RF signals from one or more inbound RF signals. The SAW-less receiver converts the one or more inbound RF signals into one or more inbound intermediate frequency (IF) signals by frequency translating a baseband filter response to an IF filter response and/or an RF filter response. The SAW-less receiver filters the inbound RF signal(s) in accordance with the RF filter response and/or filters the inbound IF signal(s) in accordance with the IF filter response. The SAW-less receiver then converts the inbound IF signal(s) into inbound symbol stream(s). The SAW-less transmitter converts outbound symbol stream(s) into the outbound RF signal(s). The baseband processing unit converts outbound data into the outbound symbol stream(s) and convert the inbound symbol stream(s) into inbound data.Type: GrantFiled: March 30, 2011Date of Patent: June 24, 2014Assignee: Broadcom CorporationInventors: Ahmadreza (Reza) Rofougaran, Hooman Darabi
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Publication number: 20140169431Abstract: An apparatus may include a processor circuit, and a dynamic filter adjustment component for execution on the processor. The dynamic filter adjustment component may identify in a wideband communications signal a set of one or more interferer frequencies for one or more respective interferer channels of a set of communications channels to be filtered, select a kernel filter comprising a low pass filter having a channel width corresponding to a channel of the one or more interferer channels, and generate a co-channel interference (CCI) filter to stop the one or more interferer channels by inverting the kernel filter. Other embodiments are described and claimed.Type: ApplicationFiled: December 18, 2012Publication date: June 19, 2014Inventors: Bernard Arambepola, Thushara Hewavithana
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Publication number: 20140169512Abstract: A direct conversion receiver includes: a high linearity mixer device including a sampler unit charge-sampling an input current according to a sampling frequency, and a buffer unit receiving an output signal from the sampler unit while having a low input impedance, amplifying the received signal, and outputting a current signal; and a filter device decimating an output signal from the mixer device and FIR-filtering the decimated signal.Type: ApplicationFiled: February 18, 2014Publication date: June 19, 2014Applicant: Electronics and Telecommunications Research InstituteInventors: Jung Woo PARK, Young Jae LEE, Hyun Kyu Yu, Byung Hun MIN, Seong Do KIM, Hoai Nam NGUYEN, Sang Gug LEE
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Patent number: 8755426Abstract: For digital data transmitted using a vector signaling encoding, a rank-order equalizer cancels various channel noise such as inter-symbol interference. Further, rank-order units may be cascaded to achieve improved equalization over successive sample vector signals in a rank-order equalizer. Multiple rank-order equalizers further operate in parallel in a feed forward mode or in series in a feedback mode to provide a continuous vector signaling stream equalization.Type: GrantFiled: March 15, 2012Date of Patent: June 17, 2014Assignee: Kandou Labs, S.A.Inventors: Harm Cronie, Klaas Hofstra, Amin Shokrollahi
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Patent number: 8755760Abstract: A radio receiver including a sampling unit, a provider, an arithmetic operation unit, an estimator, and a converter. The sampling unit samples a baseband signal transmitted from the radio transmitter, at a fractional multiple of a symbol rate, and generates fractional-multiple-sampling data. The provider provides reference data in which the known symbol sequence arranged in a frame by the radio transmitter is interpolated at a rate of the fractional multiple. The arithmetic operation unit performs an arithmetic operation for evaluation data in which the degree of consistency in waveform between the fractional-multiple-sampling data and the reference data is evaluated. The estimator estimates a reference timing from a shift amount at which the evaluation data shows the maximum degree of consistency in waveform. The converter converts the fractional-multiple-sampling data by using the reference timing as a reference thereby recovering the data having the symbol rate.Type: GrantFiled: September 13, 2012Date of Patent: June 17, 2014Assignee: International Business Machines CorporationInventors: Yasunao Katayama, Daiju Nakano
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Patent number: 8750366Abstract: An equalization device (500) includes a sample hold unit (501) that samples and holds an input signal, a multiplication unit (503) that multiplies the output signal of the sample hold unit (501) by a coefficient, a sample hold unit (502) that samples and holds the input signal at a timing delayed from the sample hold timing of the sample hold unit (501) by one symbol length, a multiplication unit (504) that multiplies the output signal of the sample hold unit (502) by a coefficient, and an addition unit (505) that adds the output signal of the multiplication unit (503) and the output signal of the multiplication unit (504) to output a sum signal.Type: GrantFiled: September 1, 2010Date of Patent: June 10, 2014Assignee: NEC CorporationInventor: Hideyuki Hasegawa
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Patent number: 8750428Abstract: The method is based on a signal interval (DB) which comprises a first part (ET) (which is modulated using a first modulation method (GFSK)) of the signal interval and a second part (which is modulated using a second modulation method (DMPSK)) of the signal interval. The channel parameters (c(i)) relating to the second part (which is modulated using the second modulation method) of the signal interval are determined using a received data signal (a(i); p(i)) from the first part (ET) of the signal interval (DB).Type: GrantFiled: April 10, 2006Date of Patent: June 10, 2014Assignee: Intel Mobile Communications GmbHInventors: Markus Hammes, André Neubauer, Michael Speth