Abstract: A watchdog timer includes an instruction decoder, a delay circuit and a counter. The instruction decoder decodes a watchdog timer initialization instruction regularly executed to generate an instruction pulse for initializing the count of the counter. The delay circuit delays the rising edge of the instruction pulse, and supplies the delayed instruction pulse to the counter as a signal for initializing the count. The delay circuit prevents the pulse signal from being supplied to the counter when the operation frequency of the microcomputer is high or when the supply voltage to the microcomputer is low, so that the count of the counter overflows, and the overflow signal causes the microcomputer to be reset. This makes it possible to reset the microcomputer before it runs away, thereby solving a problem of a conventional watchdog timer in that the microcomputer can produce, if it runs away, an unexpected signal from its port before it is reset, and hence can impair the security of the system.

Abstract: A counting apparatus is disclosed, having a resettable counter, for counting the number of times a mold closes. The counting apparatus includes a body that is mountable to a mold block section, an electronic counting mechanism connected to the body, and a reset mechanism connected to the body that resets the counting mechanism to zero or some other settable number. Additionally, the counting mechanism includes a sensor, a triggering mechanism, and a counter display. The sensor detects when the mold has been closed and then communicates such with the triggering mechanism. The triggering mechanism then triggers the counter display to increase or decrease by the number of units associated with the closing of the mold.

Abstract: Certain events occurring throughout a microprocessor chip are monitored by a counter system (1) containing a number of digital electronic counters (3, 5, 7 & 9) consolidated at a single location on the processor chip. Those events are communicated to the counter system via electrical leads extending to those functional units in the processor responsible for signaling an event occurrence. Under program control, each counter can be selectively connected (11, 13, 15 & 17) to a selected one of the various functional event producing units. By means of selection logic (19, 21, 23 & 25) separate events originating from multiple functional units may be logically combined, whereby the event counted is a Boolean logic combination of multiple underlying events.

Abstract: An apparatus and method for recording actual time used by a service which makes requests for data. The apparatus includes a first timer for recording time during which the service is in operation and a second timer rendered operable when the service requests data. The second timer is operable to disable the first timer to suspend the recording of the time when the second timer acquires a value exceeding a pre-defined value, representing the time during which the service is waiting for data in response to a request for data and the second timer re-enables the first timer when the data is received.

Abstract: Non-power-of-two Gray-code counters, including modulos 10, 12, 14, and 22 are disclosed, along with a sequencing method they employ. Each counter includes a register for storing an N-bit, e.g., 4-bit, Gray-code count. The count is converted to binary code by a Gray-to-binary-code counter. The resulting binary count is incremented by an N-bit incrementer that skips certain binary values by toggling least-significant bits in unison when indicated by certain most-significant binary bits. The result is converted to Gray-code by a binary-to-Gray-code translator. The translated result is stored in the register as the next count. An algorithm is disclosed for designing such a Gray-code counter for any even modulo. The modulo is expressed as a sum of positive and negative terms, each term being a power of two. The exponents of the terms determine the counter design.

Abstract: A frequency counter 1 includes a binary counter section 11 having a binary counter 20 for counting up frequency data, and a EEPROM counter section 12 having an EEPROM 40 containing frequency data. In a frequency count processing, frequency data of the EEPROM 40 are loaded into the binary counter 20. The binary counter 20 executes count up by a specified frequency on the loaded frequency data. The counted up frequency data are written into the EEPROM 40 to update the frequency data of the EEPROM 40. In one frequency count process, rewriting of the EEPROM 40 is completed once, which means that the number of time the EEPROM 40 is rewritten is reduced.

Abstract: A device for repeated registration of the number of thermal cycles to which a part for medical usage has been subjected has a temperature-sensitive element and/or a pressure-sensitive element arranged in conjunction with the part. This element reversibly changes its physical shape with temperature and/or pressure, variations in pressure being invariably associated with changes in temperature. A registration unit registers this change in shape when it exceeds a specific threshold value, as an indication of the part undergoing, or having undergone, a thermal cycle.

Abstract: A counting apparatus having excellent fail-safe characteristics can be used in a rotation-stopped detection apparatus. As a first feature, timing of a high-frequency signal P2 is carried out by a counter 1 after completion of a counting of pulse signals P1. When the frequency of the timing output for the high-frequency signal is a predetermined value, a judgment signal, indicating that the counting is normal, is generated by a frequency discriminating circuit 30. As a second feature, a counter 100 is preset using a preset signal. Then, after verifying by an output from a self hold circuit 102 that the counter 100 has been reset, a counting output is generated from a self hold circuit 104. As a third feature, the counting apparatus is used as timer circuits 203, 300, 400, and the generation frequency of a rotation detection pulse signal IP based on a sensor signal, is obtained to thereby detect a rotation-stopped condition of a rotating body.

Abstract: A counting device, comprising: an input 105, 107 for receiving an input signal having at least three distinct input states; memory means 810 for storing a count; and means 620 responsive to a predetermined sequence of input states of said input signal to vary said count, wherein said predetermined sequence includes the at least three input states.

Abstract: A self-adjusting apparatus including a clock generator built within an IC generates an adjusted internal oscillating clock signal by referring to an external target signal while the IC is running in a normal mode, and a method for adjusting the internal oscillating clock signal of an IC by using the apparatus. While an IC is operating in a normal mode, which is a more power-consuming mode, the apparatus adjusts the internal oscillating clock signal of the IC by referring to the frequency of an external clock signal generated by an external clock generator. When the IC is forced to run in a power-down mode, which consumes less power, the self-adjusting apparatus is still able to provide a precise internal oscillating clock signal required for operating the electronic circuit without the presence of an external clock signal.

Abstract: The present invention provides a system for determining the deployed length of a flexible tension element such as cable which is wrapped in a pack and fed through a funnel. The element may be sensed using different types of sensors such as optical, acoustical or magnetic sensors. A sensor is mounted in a funnel flush with the inside funnel surface. As wraps of the flexible tension element are deployed, or pulled off from the pack, individual wraps of the flexible tension element pass across the face of a detector as the flexible tension element is displaced in a generally circular pattern around the inside of the funnel. Signal processing circuitry produces a signal indicating the presence of the flexible tension element within a predetermined distance of the sensor.

Abstract: The invention herein provides a supervisory circuit which is adapted to monitor an input signal and produce as an output signal, a parametric signal corresponding to the input signal. The circuit includes an input for receiving the input signal, and a stochastic processor coupled to the input for receiving the input signal and processing it to derive a signal that represents a parametric measure of the input signal. An output connected to said stochastic processor provides the parametric output signal as an output for supervisory purposes.

Abstract: Apparatus and method for testing an optical encoder used to determine position of a moveable member. The optical encoder supplies a first binary signal indicative of a position of the moveable member and a second binary signal indicative of the position. The first binary signal and the second binary signal are in quadrature relationship. The apparatus has a first delay device connected to receive the first binary signal. The first delay device produces a first delayed binary signal. The apparatus also includes a first logic gate connected to receive the first binary signal and the first delayed binary signal. The first logic gate produces a first edge detection pulse signal. The apparatus further includes a second delay device connected to receive the second binary signal. The second delay device produces a second delayed binary signal. The apparatus further includes a second logic gate connected to receive the second binary signal and the second delayed binary signal.

Abstract: A reset device is disclosed which is part of a micro-controller formed on an integrated circuit. The reset device has a counter which outputs a count enable signal after counting a predetermined number of counts. In response to an input reset signal, an input device of the reset device provides a start signal to the counter for initiating count-down thereof. An output device outputs an output reset signal in response to the start signal and the count enable signal. The start signal is inhibited by a control signal, which is provided from a control device in response to an external reset signal received at an input pin of the micro-controller. The input device includes an AND gate which receives the input reset signal, an inverted delayed version of the input reset signal, and the disable signal. The reset device further includes an OR gate which receives the start signal and the count enable signal to provide an input signal to the output device for generation of the output reset signal.

Abstract: The pulse counter counts high speed pulses and detects an absolute phase difference among a plurality of electric motors. Pulse outputs 5 and 6 from pulse generators 3 and 4 are inputted into integrating counters 15 and 16 through pulse converters 9 and 11 and rotation direction detectors 10 and 12. Integrating counters 15 and 16 count up/dow the pulses in response to the rotation direction. Integrating counters 15 and 16 are cleared with a zero phase pulse output 7, outputted per revolution from the pulse generators 3 and 4. Multipliers 19 and 20 multiply outputs from the integrating counters 15 and 16 by a ratio set by a coefficient unit, and output a signal corresponding to the rotation angle of each electric motor. Adder/subtractor 21 estimates a deviation between the outputs of the multipliers 19 and 20 such that the phase difference between the pulse generators 3 and 4 is estimated.

Abstract: The present invention provides a method of processing signals of encoders and an apparatus employing the same by each of which increase and decrease of a counter value can be made to match an angle of a rotational angle of two-phase incremental encoders all the time.

Abstract: A wheel mounted data logger has an odometer for mounting at a hub of a wheel of a vehicle and response to turning of the wheel, an hourmeter for mounting on a structure of the vehicle and response to running of an engine of the vehicle, and microcontroller for mounting on the vehicle and receiving, recording and transmitting the responses of the odometer and hourmeter. The odometer, hourmeter and microcontroller are mounted on the vehicle as a unit preferably by adhesive.

Abstract: When a cylinder is urged to displace a piston rod, and a pulse signal is inputted into a counter from an encoder, then the number of pulses of the pulse signal is counted by a counting section. A time-measuring section starts measurement for the elapsed time upon the start of operation of the cylinder. When the pulse signal is inputted, the elapsed time is reset. When the displacement of the piston rod is stopped, the pulse signal is not inputted. The elapsed time is increased to make coincidence with a predetermined preset time to output, to a control unit, a preset time elapse signal indicating this fact. At this time, the preset count value is compared with the count value of the pulse signal counted by the counting section. If the both are coincident with each other, a coincidence signal indicating this fact is outputted to the control unit. Accordingly, it is possible for the control unit to detect the stop of the cylinder and detect the displacement position of the piston rod at this time.

Abstract: Measuring device, particularly for fuel pumps in service stations, comprising a pulser equipped with a microprocessor unit and an electronic head equipped with a microprocessor unit, in which device the pulser and the electronic head are connected and mutually communicate information and data correlated to the supply; the information and the data are encrypted by means of an algorithm loaded in said microprocessor units and are sent to the electronic head from the pulser together with the measurement values of each supply, in order to allow the verification and the validation of the transmitted data.

Abstract: An apparatus and method for recording actual time used by a service which makes requests for data. The apparatus includes a first timer for recording time during which the service is in operation and a second timer rendered operable when the service requests data. The second timer is operable to disable the first timer to suspend the recording of the time when the second timer acquires a value exceeding a pre-defined value, representing the time during which the service is waiting for data in response to a request for data and the second timer re-enables the first timer when the data is received.

Abstract: A method and apparatus for monitoring an event is disclosed. In one embodiment, a ratio counter is provided which includes a first counter having a first count and a second counter having a second count. The method increments the first count of the first counter on an occurrence of an event by a first device and shifts the ratio counter to the right by a predetermined number of bits when the first count reaches a maximum count. The method further takes a ratio between the first count and the second count where the ratio indicates the relative occurrence of the event by the first device and a second device. In another embodiment, the method decrements the second count of the second counter when the first count reaches a maximum count. In yet another embodiment, the method decrements the first count of the first counter and the second count of the second counter when the first count reaches a maximum count.

Abstract: A circuit for counting events occurring between two different clock domains includes a gray code counter having at least two stages. The gray code counter is incremented by the event to be counted. Dual rank synchronizer circuit and delay flip/flops are coupled to the counter. The circuit includes a comparison logic circuit fed by outputs from the dual rank synchronizers and the delay flip/flops to produce an output signal having a binary value corresponding to a number of events that occurred between transitions of the second clock.

Abstract: An image forming apparatus supervisory system is provided. The image forming apparatus supervisory system includes an image forming apparatus and a control device. The image forming apparatus has an input unit for inputting an identification code and a transmission unit for transmitting the identification code. The control device is connected to the image forming apparatus, and has a reception unit for receiving the identification code and a transmission unit for transmitting to the image forming apparatus a signal for informing the image forming apparatus of a permitted number of time an image can be formed in response to receipt of the identification code. Upon receipt of the signal from the control device, the image forming apparatus permits forming an image the permitted number of times.

Abstract: There is disclosed a loop counter reload circuit loads an initial count value into a counter and a shadow register. A count value output from the counter is changed by a predetermined displacement resulting in a changed count value. The count value from the shadow register is loaded into the counter if the changed count value has reached a predetermined reference value, and otherwise the changed count value is loaded into the counter.

Abstract: A first device provides a repetitive count of time. A second device indicates in each successive count of time by the first device during the processing apparatus operation whether the processing apparatus has processed data for at least a first particular percentage of time in each such successive time count. A third device indicates in each successive count of time by the first device during the processing apparatus operation whether the processing apparatus has processed data for at least a second particular percentage of time in each such successive time count where the second particular time percentage is less than the first particular time percentage. A power supply provides power to the processing apparatus during the time that the apparatus is processing data.

Abstract: A method and apparatus for collating, correlating and redistributing information about the use of proprietary products including copyrighted works and licensed software products, at various computer sites. The system consolidates information (originally captured by other systems) by time period, such as day, week or month, about which proprietary products are installed at each computer site, as well as to what particulars of use are relevant. This may include the number of invocations of various software products, the number of logons, the number of concurrent users, as well as other usage metrics. The information is sorted by vendor or copyright owner, so that the information about all of the proprietary products licensed from a particular vendor can be periodically sent to that vendor, automatically, or in response to prompting by vendors or from within the central computer system.

Abstract: Integrated counter-based instrumentation for generating a frequency distribution representation such as a histogram. An integrated circuit device includes an event counter to count a number of a predetermined type of events detected in each of a plurality of measurement periods during a first sub-experiment period. A frequency counter coupled to the event counter is to be incremented at the end of each measurement period if the number counted by the event counter meets a first test. A count stored in the frequency counter is provided to a frequency distribution data store at the end of the first sub-experiment period.

Abstract: A multiplexing decoder/counter circuit for monitoring quadrature position encoders. The system includes an edge detector, a position counter, a position latch, a capture latch, and compare management means. Addressable memory blocks are used throughout the design. Information from external differential receivers is directed into a single quadrature decoder circuit using a switch with an effective 16 to 1 selection. An axis scanning state machine addresses multiple memory block based functions simultaneously. Scanning is performed in a circuitous manner in conjunction with the switch. The total circular loop frequency for the sequence is chosen to be equal to or greater than the maximum encoder frequency required. At each visitation of any particular memory address, the state of the circuit is reestablished from the last visit by the scanning state machine. Any change in quadrature signals is noted, and any up or down count is accumulated to the position counter.

Abstract: A signal disconnection detection circuit has a first comparing unit for producing a signal disconnection recognition signal only when a level of the first input signal is smaller than a first threshold value; a second comparing unit for producing an incomming signal only when a level of a second input signal is larger than a second threshold value; and a counter that receives the outputs of the first and second comparing unit and starts counting up when the first comparing unit produces the signal disconnection recognition signal, determining the possibility of the signal disconnection. The counter resets the counted value and stops its operation, determining that a reception signal is not disconnected, when the second comparing unit produces the reception signal. The counter produces the signal disconnection detection signal, determining that the signal is actually disconnected, when the second comparing unit produces no incomming signal before completion of the counting up.

Abstract: A system for electronically measuring the distance that a wheel has traveled can be used on a tractor-trailer combination vehicle to independently monitor mileages for the tractor and the trailer. An axle on the tractor and an axle on the trailer each has a hub odometer system which can electronically measure and store mileages for its respective axle. The system is mounted on a wheel and includes a signal generating device and a semiconductor unit. The signal generating device generates an electrical signal proportional to the number of wheel revolutions and the semiconductor unit receives, counts, and stores the electrical signals. The electrical signals are relayed to an output device. The system can also be used on other types of vehicle.

Abstract: An apparatus for monitoring a reference clock signal having a clock pulse train comprises a detecting block for counting pluses of a count clock signal to produce a count value and generate a count failure signal when the count value reaches a predetermined value, wherein the frequency of the count clock signal is larger than that of the reference clock signal; and a controlling block for generating a clear signal at every clock pulse of the reference clock signal to cleat the detecting block when the clear signal is inputted thereto.

Abstract: A circuit such as a host adapter includes a timer capable of detecting time-outs for multiple pending commands. The timer includes a single free-running counter, a first storage for start counts, a second storage for time-out values, a subtractor, and a comparator. The start counts are counts from the counter that are saved when issuing an associated command. The time-out values indicate the lengths of different types of time-out periods. To check whether a command timed out, a start count associated with the command is selected from the first storage, and the subtractor determines a difference between a current count in the counter and the selected start count. The difference is then compared to a time-out value that is selected from the second storage according to the type of time-out. The command timed out if the difference is greater than the selected time-out value.

Abstract: A device for counting the number of usage cycles of a sensor, for intracorporeal electrophysiological measurement and/or therapy, has a counting unit, connected to the sensor, containing a specific identification code for the sensor, and a detection unit which detects the sensor's connection/disconnection to/from external measurement and therapy equipment. The detection unit causes a sensing unit to read a sensor identification code in the counting unit whenever the sensor is connected so as to determine, from information about sensor usage stored in a main computer, whether conditions for a new usage cycle have been met and, if so, increments the counter's contents by one usage cycle.

Abstract: A cycle time method and apparatus is provided to obtain cost, efficiency, bottleneck and value creation information in a manufacturing facility. The manufacturing facility includes a plurality of production lines with each production line including a plurality of process steps. A work cell which includes a plurality of workers is responsible for each process step. Each work cell has an associated local processing apparatus for inputting process step quantity and time information. The local processing apparatus is coupled to a central processing apparatus via local area network. The central processing apparatus then identifies and calculates bottleneck costing information regarding the process steps, as well as the manufacturing facility bottleneck. Bottleneck cost information for products are then calculated based upon the manufacturing facility bottleneck or factory bottleneck. The bottleneck costing information is then transferred to a printer or projection display nearby a work cell.

Abstract: A safety-related control system (SRCS) designed to safeguard personnel operating hazardous production equipment. The SRCS integrates the safety-related part of a machine into one homogenous system for the purpose of increasing safety. In so doing, the SRCS monitors the machine, the operator, and itself for safe operation. The SRCS utilizes a non-material barrier to sense the intrusion of a person's body into a hazardous area of a machine. The SRCS uses machine feedback and/or operator interface to determine whether a hazardous condition is present. If such condition is present, the hazard is rendered harmless by the time the intruding body member can reach the potential danger area. The system includes separable means for stopping motion of the moving parts of the equipment, starting movement of the movable parts, and detecting faults in sections of the system.

Abstract: A large number of frequent events may be accurately counted by employing a shift register. The values of several bit positions within the shift register are logically combined to generate an input to the shift register. The input is shifted in to alter the register contents whenever an event to be counted occurs. The bit positions for generating the input are selected to produce the longest sequence of nonrepeating patterns possible. The event counter may be implemented in a small area, allowing a large number of event counters to be implemented in an array like structure within a single device and to operate as extremely high frequencies.

Abstract: In a display method and a display unit, information which is required or often used by an operator is processed visually conspicuously by enlarged display or colored display in accordance with historical data such as the past running conditions of the plant, the number of times of operations by an operator, the frequency of operations, and so on, and the processed information is displayed on the display unit. The use of historical data permits an operator to readily recognize which equipment is in most need of attention due to repeated problems in the past.

Abstract: According to the present invention, the invention relates to a semiconductor device having an activity monitor circuit formed thereon for monitoring the switching activity of signals generated by other circuits on the device during burn-in testing. In one embodiment, the activity monitor circuit includes means for detecting a present state of a signal; means for comparing the present state with a previous state of the signal; means for determining whether the state of the signal has switched a requisite number of times in a predetermined time period; and means for displaying the results of the determination.

Abstract: A method and apparatus for detection of missing pulses from a repetitive pulse train including signal detection circuits for capturing the rising and/or falling edges of an input signal, time-stamping the captured edges, calculating the maximum and minimum instantaneous frequency over a specified time period, and displaying such frequency values. Instantaneous frequency values between any two adjacent edges are calculated based upon the time-stamps of the edges. The instantaneous frequency values in a specified time period are then sorted to find the minimum and maximum frequency values for that time period. These instantaneous frequency values are displayed in the form of a histogram evidencing the occurrence or lack of occurrence of missing pulses from the input signal.

Abstract: A device for management is attached to a copier, and the device for management is connected to a host computer at a management center via a telephone line. In a database of the host computer are provided a field for calculating an MCBJ since resetting or in a predetermined period, and a field for calculating a total MCBJ of copiers of a same model. Based on comparison between results obtained in these two fields, a warning is issued. Moreover, an MCBJ of a copier in a predetermined period is retained in the database for three consecutive such periods, so that a trend of the MCBJ of the copier is traced. A rising tendency of the MCBJ is judged from a combination of two trend-indicating values, one comparing an MCBJ two periods before with a current MCBJ and the other comparing the MCBJ two periods before with an MCBJ one period before. If the rising tendency exceeds a predetermined factor, a warning is issued.

Abstract: In a timer device, the counter thereof counts the number of the pulses of a pulse signal input from an external apparatus up to a count initial value to output a count ending signal at the time of the end of the counting, and the control signal generator thereof generates a signal for controlling the external apparatus on the count ending signal output from the counter, and further the count operation controller thereof controls the count operation of the counter on a state change signal indicating the change of the state of the external apparatus. Thereby, the timer device can execute extensive processing by means of few counters.

Abstract: A method and apparatus for reading a timer with an asynchronous circuit. A computer system is provided having a system clock and an asynchronous timer clock. The computer system includes a counter clocking from the timer clock and a latch coupled to output of the counter. First logic, synchronized to the timer clock, is coupled to control the latch responsive to a control signal from the computer system. Second logic synchronized to the system clock and coupled to the first logic is configured to provide an indication to the computer system of when the system can read the latched data and be assured of its validity. The computer system will thereby be prevented from reading the timer before it has stabilized.

Abstract: An intelligent circuit breaker or switching device system comprises three separate microprocessor-based units, including a condition monitoring unit (CMU) 40, a breaker control unit (BCU) 50, and a synchronous control unit (SCU) 60. The CMU 40 provides detailed diagnostic information by monitoring key quantities associated with circuit breaker or switching device reliability. On-line analysis performed by the CMU provides information facilitating the performance of maintenance as needed and the identification of impending failures. The BCU 50 is a programmable system having self-diagnostic and remote communications. The BCU replaces the conventional electromechanical control circuits typically employed to control a circuit breaker or switching device. The SCU 60 provides synchronous switching control for both closing and opening the circuit interrupters. The control processes carried out by the SCU reduce system switching transients and interrupter wear.

Abstract: An intelligent circuit breaker or switching device system comprises three separate microprocessor-based units, including a condition monitoring unit (CMU) 40, a breaker control unit (BCU) 50, and a synchronous control unit (SCU) 60. The CMU 40 provides detailed diagnostic information by monitoring key quantities associated with circuit breaker or switching device reliability. On-line analysis performed by the CMU provides information facilitating the performance of maintenance as needed and the identification of impending failures. The BCU 50 is a programmable system having self-diagnostic and remote communications. The BCU replaces the conventional electromechanical control circuits typically employed to control a circuit breaker or switching device. The SCU 60 provides synchronous switching control for both closing and opening the circuit interrupters. The control processes carried out by the SCU reduce system switching transients and interrupter wear.

Abstract: A watchdog circuit accepts an output signal from a monitored circuit such as a microprocessor to determine whether the monitored circuit is operating appropriately or has incurred an error. The monitored circuit must periodically assert the output signal to prevent the watchdog circuit, which imposes both upper and lower frequency bounds on the assertion of this signal, from "timing out" and setting a watchdog error alarm. The watchdog circuit may be combined with other circuits, such as power on reset, battery back-up switching, etc., within a microprocessor supervisory circuit.

Abstract: In a system for collectively controlling a plurality of image forming apparatuses connected to a control station by a communication line, each apparatus counts the occurrences that any one of the outputs of sensors exceeds a particular second limit value before reaching a first limit value representative of the operation limit of the apparatus, stores the date of counting or similar time information or the cumulative number of copies at the time of counting, and sends the count and the time information or the cumulative number of copies to the control station. The system is capable of estimating troubles to occur in the individual apparatuses by low-cost simple statistical processing.

Abstract: There is provided a device for checking the lifetime of household electronic or electric appliances. This device checks actual energization time and enhances the lifetime by improving the likelihood of service at optimal intervals. The device includes a sensor for outputting signals indicating that the electronic or electric appliance is energized, a memory storing energization time, a signal input unit for inputting inquiry signals from a user wishing to check the lifetime of the electronic or electric appliance, a display, a microprocessor for determining accumulated energization as a function of signals from the sensor, storing an updated energization time back into the memory, and selectively controlling the display to display the energization time.

Abstract: A signal disconnection detection apparatus includes a first counter, a first comparator, and a detector. The first counter is reset by a pulse signal received every predetermined period of a clock signal, and counts a clock signal transmitted together with data. The first comparator compares a count value of the first counter with a set value larger than the number of clock signals included in one period of the pulse signal, and stops an operation of the first counter when the count value of the first counter exceeds the set value. The detector detects that the count value of the first counter does not continuously change within a predetermined period of time to output a signal disconnection detection signal of at least one of the clock signal and the pulse signal.

Abstract: Method and apparatus for a utility for monitoring, tracking and scheduling the performance of periodic activities in a manufacturing environment is disclosed. In a preferred embodiment, the monitor utility of present invention is a VAX-based menu-driven program that is used to schedule and track periodic activities. erformed on tools and machines, or "entities." In one aspect of the invention, a user may create a family of entities to be monitored and may schedule various monitor items to be performed in connection with each entity, which items may be "triggered" by the occurrence of a designated event a designated number of times or by the elapse of a designated period of time. In another aspect of the invention, the utility may be used easily to generate and display and/or print reports in various formats showing the status of monitor items for a particular family and/or entity.

Abstract: A circuit for detecting pulses in an electric input signal, which pulses are superposed on a specific reference level (U.sub.ref), has an input terminal for receiving the electric input signal, at least a first and a second comparator device, switching means (S.sub.1), an output terminal and control signal generator means. The control signal generator means supply a control signal to the switching means (S1) to control the position of the switching means. The input terminal (1) is coupled to a first input of the comparator devices, whose outputs are coupled to a terminal (c and a respectively) of the switching means (S.sub.1). The output terminal (b) of the switching means is coupled to the output terminal. The first comparator device transfers only pulses whose relative amplitude in relation to the reference level exceeds a first value (U.sub.D1). The second comparator device transfers only pulses whose relative amplitude in relation to the reference level exceeds a second value (U.sub.D2).