Abstract: A high-speed counter capable of counting the number of randomly incoming pulses is constructed by serially connecting a plurality of toggle flip-flop circuits, each of which is activated by input pulses and constructed from an rf-SQUID and the quantum flux parametron, whereby a high-speed computer or a high-speed measurement apparatus can be realised by the use of the high-speed counter.
Type:
Grant
Filed:
March 11, 1992
Date of Patent:
May 3, 1994
Assignees:
Research Development Corporation of Japan, Yutaka Harada
Abstract: A hybrid superconducting-semiconducting field effect transistor-like circuit element comprised of a superconducting field effect transistor and a closely associated cryogenic semiconductor inverter for providing signal gain is described. The hybrid circuit functions as a nearly ideal pass gate in cryogenic applications.
Abstract: A Josephson transmission line device comprising a Josephson transmission line consisting of a pair of superconducting layers and a junction layer disposed between the superconducting layers to constitute a Josephson junction; a fluxon stopping position constituted by at least one resistor element in at least a part of the Josephson transmission line; a fluxon driving current source connected to the resistor element; a fluxon generating current source connected to the Josephson transmission line for generating fluxons therein; and an output circuit for extracting the fluxons generated in the Josephson transmission line as output signals. Fluxons generated in the Josephson transmission line can be made to stop at and depart from the stopping positions by selective application of fluxon driving current.
Type:
Grant
Filed:
May 4, 1987
Date of Patent:
June 7, 1988
Assignees:
Agency of Industrial Science & Technology, Ministry of International Trade & Industry
Abstract: A frequency divider is provided by coupling the gate current paths of a pair of Josephson junction gate circuits in parallel with the control current path of a third Josephson junction gate circuit being connected in series with the gate current path of one of the first pair of Josephson junctions. The gate current path of the third Josephson junction is connected in series with the control current path of the other of the first pair of Josephson junctions, and an input signal to be frequency divided is connected in common to the connection point of the control current path of the first Josephson junction and gate current path of the third Josephson junction. Current flowing through the control current path of the first Josephson junction will be at one-half the frequency of the input current. A plurality of frequency dividers may be cascaded to perform 1/2.sup.N frequency division.