Variable Time Delay Modulation Patents (Class 380/35)
  • Patent number: 4937867
    Abstract: A method for scrambling speech such as in a mobile land based communication system is disclosed. Essentially, variable length time samples of digitized speech are stored and time inversion scrambled. The scrambled speech is converted back to analog form and transmitted to a receiver which reciprocates the process to reproduce the desired speech signals. Scrambling and descrambling of the speech signal is synchronized to provide corresponding sample time inversions and accurate reproduction of the speech input signal. The level of security afforded by the scrambling method may be varied by varying the length of the sampling period or by mixing forward and reverse time samples under control of an algorithm.
    Type: Grant
    Filed: May 1, 1989
    Date of Patent: June 26, 1990
    Assignee: Teletec Corporation
    Inventors: Kaspar A. Kasparian, John D. Ide
  • Patent number: 4916736
    Abstract: Time sequential information signals, such as color video signals having a line timing reference and an active video portion, are encrypted by time shifting the active video signal portion towards and away from the line timing reference signal in psuedo-random fashion prior to broadcasting or recording on tape or disk and transmittal to the user. The signals are decrypted by an inverse time shifting technique. By limiting the amount of time shifting between lines, potential signal degradation for color video signals is minimized, and drop out compensation processing is minimally affected, so that the color resolution and picture quality are substantially unaffected.
    Type: Grant
    Filed: June 7, 1988
    Date of Patent: April 10, 1990
    Assignee: Macrovision Corporation
    Inventor: John O. Ryan
  • Patent number: 4742546
    Abstract: A privacy communication system in which signals transmitted from a transmitter are subjected to time base compression and expansion while the received signal is subjected to time base expansion and compression in synchronism with the expansion and compression occurring at the transmitter. The clock frequency of the clock in the transmitting and receiving ends are changed in the synchronism according to a predetermined algorithem.
    Type: Grant
    Filed: September 14, 1983
    Date of Patent: May 3, 1988
    Inventor: Satoshi Nishimura
  • Patent number: 4730340
    Abstract: An hybrid array correlator is configured of a cascaded array of individually identical correlator cells, through which a preselectable reference symbol sequence, identifiable with a symbol to be acquired, is successively clocked, from cell to cell and then recirculated back to the beginning or first cell of the array. The physical span of the correlator covers one complete symbol time, with each cell imparting a one-half chip delay to the reference spreading sequence as it is clocked through the correlator. Yet, because of the recirculation of the reference spreading sequence from the last cell back to the first cell, the electrical span of the correlator is effectively infinite or time invariant. An incoming unknown symbol sequence capable of being acquired is applied in parallel to all the cells of the correlator array.
    Type: Grant
    Filed: October 31, 1980
    Date of Patent: March 8, 1988
    Assignee: Harris Corp.
    Inventor: William R. Frazier, Jr.
  • Patent number: 4688251
    Abstract: A subsystem of a wave packet communication system uses the same sets of receivers and correlators to detect both the sync pulses and the messages carried by different wave packets. The system does this by taking the sync pulses from each packet and generating a corresponding preamble on the basis of a modular arithmetic algorithm based on prime numbers such that different messages from different transmitters can be received by the same subsystem simultaneously.
    Type: Grant
    Filed: January 21, 1986
    Date of Patent: August 18, 1987
    Assignee: The Singer Company
    Inventors: Irwin M. Citron, Philip Kaszerman
  • Patent number: 4649549
    Abstract: A system and method are disclosed for synchronizning the linear PN sequences contained in a received spread spectrum signal, characterized by the provision of a resident PN generator that is responsive to the chip rate clock for producing a replica of the PN sequence with arbitrary phase, a running matrix inverse of the matrix (R) formed by n successive observations of the register of the resident generator, and a matrix vector product device for multiplying the running inverse by a column vector of noisy chips, thereby to obtain a plurality of estimates of the phase vector. These estimates are smoothed and averaged to produce the smoothed phase vector (c.sub.j) that is applied to one input of a dot product device that operates in conjunction with the contents of the shift register of the resident generator to produce the properly phased PN sequence, which sequence is then supplied to despreading means for combining the noisy chips with the properly phased PN sequence.
    Type: Grant
    Filed: July 18, 1984
    Date of Patent: March 10, 1987
    Assignee: Sophisticated Signals and Circuits
    Inventors: Peter H. Halpern, Peter E. Mallory, Paul E. Haug, William M. Koos, Jr.