Abstract: A method of processing a digital signal wherein multiple signal values are simultaneously operated upon in a single register. The register is not segmented in hardware, but is segmented by operation of a controlling computer software program. The controlling computer software arranges the digital signal in a computer memory in such a manner as to permit the register to be loaded with a plurality of digital samples, each having a precision less than the total precision available in the register. The method may include steps to partially compensate for errors introduced by carries from one segment of the register to another segment of the register, when necessary.

Abstract: An image processing system includes control section which various control signals are input into and output from, at least one image data input/output section which image data are input into and output from in response to a control signal from the control section, an image memory which temporarily stores the image data input from the image data input/output section and at least one image processing section which reads out the image data from the image memory in response to a control signal from the control section and processes the image data. A data bus controller is connected to the image memory by way of a single data bus and to the image data input/output sections and the image processing sections by way of respective data buses.

Abstract: A moving image with a plurality of continuous frames is processed by using a plurality of image processing units (5-1 through 5-n), which operate simultaneously. A frame identification designator (4) attaches an identification number cyclically to each frame of the input image signal. A frame identification selector (6) in each image processing unit inputs an image frame selectively based upon the identification number, and transfers the selected frame to a corresponding image processing module. The image processing units (5-1 through 5-n) typically carry out either the same processing on respective image frames, or a plurality of processing to a single frame. An additional processor network (8) may be coupled with the image processing units for high-level processing including recognition and/or understanding of an image.

Abstract: An image processing method and the apparatus thereof for approximating an object shape and reconstructing the corresponding image by subjecting a radial range image to approximating with polygons and reconstructing an image from these polygons execute the following processes. At block B210, reading a radial range image data is executed. At block B220, a plural of different resolution radial range images are generated based upon the read radial range image. At block B230, normal vectors, according to each resolution of a radial range image, are calculated. At block B240, an edge-map having a plural of edges is generated in such a manner that a plural of edges are generated depending upon the resulting normal vectors and the radial range images of different resolutions. At block B250, the edge-maps of all kinds of resolutions are ORed to form a synthesized map. The synthesized map is subjected to correcting crossing and isolated edges. At block B260, each polygon is divided into a plural of triangles.

Abstract: An image processor comprising a plurality of processor elements each having a product sum calculating function. Input switching means are incorporated for selection of image data so that the desired data in an arbitrary processing step of any one processor element can be transferred to an arbitrary processing step of the other processor element. Each processor element includes a data writing line memory, a multiplier for multiplying the output data of the line memory, a register file for storing the multiplied output therein, and an accumulator for calculating the output of the register file. Pipeline processing of the data can be executed in such constitution, and due to the provision of the input switching means in the preceding stage of each processing circuit, the image data can be transferred between the processor elements to consequently realize enhanced general ability for the image processing.

Abstract: Methods and apparatuses for processing pixel images using conventional non-parallel processors. At least two values corresponding to at least two different pixels of the image are loaded into a register of a conventional non-parallel processor. An operation is then performed on the register, whereby the operation is applied to the multiple values in the register in parallel. In preferred embodiments of the present invention, vector dequantization is implemented on either 32-bit or 16-bit conventional non-parallel processors by (1) loading two (or more) pixel values corresponding to a previous image into a first register, (2) loading two pixel differences corresponding to a current image into a second register, and (3) generating two pixel values corresponding to the current image by generating the sum of the values in the first and second registers.

Abstract: An image processing system has an input portion to which pixel data is inputted, a convolution processing portion processing each set of pixels in a predetermined convolution area so as to output a processed data for every predetermined convolution area. A computational portion calculates a parameter necessary for image processing according to the processed data from the convolution processing portion. A converting portion includes a selecting means, to which the output of the computational portion is inputted, a high speed memory to which the output of the selecting means is inputted and a light computational portion for performing light computation to which the output of the high speed memory is inputted and the output of which is inputted to the selecting means.

Abstract: An image processing hardware element that may be used to implement any number of data manipulation methods. The hardware element may be dedicated to the selected manipulation method such that maximum performance may be attained. The hardware element may be programmed to implement a particular manipulation method by simply down loading new values into the hardware element.

Abstract: A plurality of image recognizing systems which are distributed and arranged and a centralized control apparatus are mutually connected via transmission lines. Each of the image recognizing apparatuses executes a predetermined image process to the image which is input from the ITV camera and transmits the processed image to the centralized control apparatus. The centralized control apparatus forms tuning parameters which are necessary for the instrumentation control by each image recognizing system from the transmitted processed image and transmits the tuning parameters to each image recognizing system. After the tuning parameters are received, each image recognizing system executes the measuring process. Therefore, for a plurality of image recognizing systems which are distributed at remote locations, the instrumentation control of each image recognizing system can be executed by the centralized control apparatus from one position.

Abstract: A method for improving CGSI imaging system throughput by selectively decimating rows and/or columns of object image data prior to warp transformation in order to more closely approach a 1:1 compression ratio. The best results are produced on compressed object image data prior to decompression.

Abstract: Self-correcting video compression procedures and devices for encoding and decoding and reduction of artifacts of digitized video images and thereby increasing the compression ratio and the efficiency of image storage and transmission by using a best fit surface encoding technique. Encoder accurately processes differential image encoding by computing copy of decoder frame and employing feedback methods.