Abstract: A current limiting control circuit for a d.c. motor, wherein compensation is provided for the inherent voltage drop across the armature of the d.c. motor with a first dedicated amplifier, while a second dedicated amplifier provides current limit control. In providing a separate and dedicated amplifier for the current limiting function, the limitations inherent in the current/resistance compensation circuit, such as lag in response time, are avoided.

Abstract: A fail-safe circuit is disclosed for use with an intermittently operated d.c. motor connected by means of a circuit breaker to a power supply, wherein a control circuit provides control pulses intermittently to the motor. The fail-safe circuit includes a capacitor which is charged when the drive pulses are being applied to said motor, and is discharged when the drive pulses are not being applied to said motor. A reference voltage is generated and compared with the voltage stored on said capacitor. When the voltage on the capacitor exceeds the reference voltage, the circuit breaker is caused to interrupt the power supply to the motor.