Abstract: A composition includes a boron-containing hydrogen silsesquioxane polymer having a structure that includes: silicon-oxygen-silicon units, and oxygen-boron-oxygen linkages in which the boron is trivalent, wherein two silicon-oxygen-silicon units are covalently bound by an oxygen-boron-oxygen linkage therebetween.

Abstract: The present invention is a method for fabricating an electrode pair precursor which comprises the steps of creating on one surface of a substrate one or more indents of a depth less than approximately 10 nm and a width less than approximately 1 ?m; depositing a layer of material on the top of this structured substrate to forming a first electrode precursor; depositing another layer the first electrode precursor to form a second electrode precursor; and finally forming a third layer on top of the second electrode precursor.

Abstract: A method for manufacturing a z-directed component for insertion into a mounting hole in a printed circuit board according to one example embodiment includes adding a substrate material to a mold defining the shape of a layer of the z-directed component. A top surface of the substrate material in the mold is leveled. The substrate material in the mold is treated and the layer of the z-directed component is formed. A conductive material is applied to at least one surface of the formed layer. The z-directed component is formed that includes a stack of component layers that includes the formed layer.

Abstract: A planarization composition is disclosed herein that comprises: a) a structural constituent; and b) a solvent system, wherein the solvent system is compatible with the structural constituent and lowers the lowers at least one of the intermolecular forces or surface forces components of the planarization composition. A film that includes this planarization composition is also disclosed. In addition, another planarization composition is disclosed herein that comprises: a) a cresol-based polymer compound; and b) a solvent system comprising at least one alcohol and at least one ether acetate-based solvent. A film that includes this planarization composition is also disclosed. A layered component is also disclosed herein that comprises: a) a substrate having a surface topography; and b) a planarization composition or a film such as those described herein, wherein the composition is coupled to the substrate.

Abstract: In the present invention, an insulating material is applied onto a substrate in a coating treatment unit to form a coating insulating film. The substrate is heated in the heating processing unit, whereby the coating insulating film is hardened partway. A brush is then pressed against the front surface of the coating insulating film in a planarization unit and moved along the front surface of the coating insulating film, thereby planarizing the coating insulating film. The substrate is then heated to completely harden the coating insulating film. According to the present invention, the coating film can be planarized without using the CMP technology.

Abstract: The instant invention is a process for planarizing a microelectronic substrate with a cross-linked polymer dielectric layer, comprising the steps of: (a) heating such a substrate coated with a layer comprising an uncured cross-linkable polymer and a glass transition suppression modifier to a temperature greater than the glass transition temperature of the layer, the temperature being less than the curing temperature of the uncured cross-linkable polymer to form a substrate coated with a heat flowed layer; and (b) heating the substrate coated with the heat flowed layer to a curing temperature of the uncured cross-linkable polymer of the heated layer to cure the uncured cross-linkable polymer to form a planarized substrate wherein the percent planarization at 100 micrometers is greater than fifty percent. The instant invention is a microelectronic device made using the above-described process.

Abstract: In a multilayer wiring board comprising a core board, and a wiring layer and an electrically insulating layer that are stacked on one surface of said core board, a thermal expansion coefficient of said core board in XY directions falls within a range of 2 to 20 ppm, a core member for said core board is a core member selected from silicon, ceramics, glass, a glass-epoxy composite, and metal, said core board is provided with a plurality of through holes that are made conductive between the front and the back by a conductive material, and a capacitor is provided on one surface of said core board, wherein said capacitor comprises an upper electrode being the conductive material in said through hole, and a lower electrode disposed so as to confront said upper electrode via a dielectric layer.

Abstract: An improved method of providing a carbon dispersion coating on surfaces of a substrate in a direct metallization process, wherein the substrate comprises conductive and non-conductive portions. The method comprises the steps of contacting the substrate with the carbon dispersion to coat the substrate with the carbon-containing dispersion and at least one of moving a non-absorbent roller over at least a portion of a substantially planar surface of the substrate to remove excess carbon dispersion from the substantially planar surface of the substrate and passing the substrate through a vacuum extraction chamber to extract excess carbon dispersion remaining on surfaces of the substrate. The method provides cleaner copper surfaces to minimize the microetch requirement and also prevents the carbon dispersion from undesirably redepositing on surfaces of the substrate.

Abstract: An organic layer, such as a porous low-K dielectric in an IC, contains pores open at its surface. To close the pores, the organic layer is contacted by a supercritical fluid that is a solvent for the layer. After a small amount of the surface and the wall of the open pores is solvated, a phase transition of the solvated organic material is effected at the surface to cover it with a dense, smooth, non-porous film that seals the open pores.

Abstract: In the present invention, an insulating material is applied onto a substrate in a coating treatment unit to form a coating insulating film. The substrate is heated in the heating processing unit, whereby the coating insulating film is hardened partway. A brush is then pressed against the front surface of the coating insulating film in a planarization unit and moved along the front surface of the coating insulating film, thereby planarizing the coating insulating film. The substrate is then heated to completely harden the coating insulating film. According to the present invention, the coating film can be planarized without using the CMP technology.

Abstract: Porous thermoset dielectric materials having low dielectric constants useful in electronic component manufacture are provided along with methods of preparing the porous thermoset dielectric materials. Also provided are methods of forming integrated circuits containing such porous thermoset dielectric material.

Abstract: A circuit pattern fabrication method of a printed circuit board includes: a first step of forming a resin layer at a surface of an insulation material; a second step of selectively removing the resin layer; a third step of forming a metal plated layer at the surface of the resin layer-removed portion of the insulation material to form circuit patterns and a connection pad; and a fourth step of forming a gold plated layer on the connection pad. By doing that, a fine circuit pattern can be easily formed.

Abstract: The instant invention is a process for planarizing a microelectronic substrate with a cross-linked polymer dielectric layer, comprising the steps of: (a) heating such a substrate coated with a layer comprising an uncured cross-linkable polymer and a glass transition suppression modifier to a temperature greater than the glass transition temperature of the layer, the temperature being less than the curing temperature of the uncured cross-linkable polymer to form a substrate coated with a heat flowed layer; and (b) heating the substrate coated with the heat flowed layer to a curing temperature of the uncured cross-linkable polymer of the heated layer to cure the uncured cross-linkable polymer to form a planarized substrate wherein the percent planarization at 100 micrometers is greater than fifty percent. The instant invention is a microelectronic device made using the above-described process.