Manufacture Of Electrical Device Controlled Printhead Patents (Class 438/21)
  • Patent number: 10418785
    Abstract: An ultraviolet (UV) radiation emitting device includes an epitaxial heterostructure comprising an AlGaInN active region. The AlGaInN active region includes one or more quantum well structures with Al content greater than about 50% and having a non-c-plane crystallographic growth orientation. The AlGaInN active region is configured to generate UV radiation in response to excitation by an electron beam generated by an electron beam pump source.
    Type: Grant
    Filed: November 19, 2018
    Date of Patent: September 17, 2019
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Thomas Wunderer, Noble M. Johnson
  • Patent number: 10365510
    Abstract: The present invention provides a method for manufacturing an organic functional layer in a display panel by adhering an organic material pattern corresponding to the transfer protrusions from an organic material layer by using the transfer protrusion on a transfer head, then, the organic material pattern which is adhered by the transfer head is disposed on a receiving substrate, so as to form a patterned organic functional layer on the receiving substrate. The present invention provides a patterned organic functional layer in a display panel by a micro transfer print technology, which is capable of effectively reducing the material consumption of the organic functional layer and the production method is simple, which is capable of effectively reducing the online production cycle.
    Type: Grant
    Filed: June 20, 2017
    Date of Patent: July 30, 2019
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: Lixuan Chen
  • Patent number: 10326054
    Abstract: In an example, the present invention provides a light-emitting device configured to emit electromagnetic radiation in a range of 210 to 360 nanometers. The device has a substrate member comprising a surface region. The device has a thickness of AlGaN material formed overlying the surface region and an aluminum concentration characterizing the AlGaN material having a range of 0 to 100%. The device has a boron doping concentration characterizing the AlGaN material having a range between 1e15 to 1e20 atoms/centimeter3.
    Type: Grant
    Filed: January 22, 2018
    Date of Patent: June 18, 2019
    Assignee: RayVio Corporation
    Inventors: Yitao Liao, Douglas A. Collins, Wei Zhang
  • Patent number: 10135227
    Abstract: An ultraviolet (UV) radiation emitting device includes an epitaxial heterostructure comprising an AlGaInN active region. The AlGaInN active region includes one or more quantum well structures with Al content greater than about 50% and having a non-c-plane crystallographic growth orientation. The AlGaInN active region is configured to generate UV radiation in response to excitation by an electron beam generated by an electron beam pump source.
    Type: Grant
    Filed: May 19, 2017
    Date of Patent: November 20, 2018
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Thomas Wunderer, Noble M. Johnson
  • Patent number: 10128404
    Abstract: A superlattice and method for forming that superlattice are disclosed. In particular, an engineered layered single crystal structure forming a superlattice is disclosed. The superlattice provides p-type or n-type conductivity, and comprises alternating host layers and impurity layers, wherein: the host layers consist essentially of a semiconductor material; and the impurity layers consist of a donor or acceptor material.
    Type: Grant
    Filed: May 12, 2017
    Date of Patent: November 13, 2018
    Assignee: Silanna UV Technologies Pte Ltd
    Inventor: Petar Atanackovic
  • Patent number: 9935240
    Abstract: A near-infrared light emitting device can include semiconductor nanocrystals that emit at wavelengths beyond 1 ?m. The semiconductor nanocrystals can include a core and an overcoating on a surface of the core.
    Type: Grant
    Filed: December 10, 2013
    Date of Patent: April 3, 2018
    Assignee: Massachusetts Institute of Technology
    Inventors: Geoffrey J. S. Supran, Katherine W. Song, Gyuweon Hwang, Raoul Emile Correa, Yasuhiro Shirasaki, Moungi G. Bawendi, Vladimir Bulovic, Jennifer Scherer
  • Patent number: 9899571
    Abstract: Disclosed is a semiconductor light emitting device. The semiconductor light emitting device includes a plurality of compound semiconductor layers including a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer; a pad on the plurality of compound semiconductor layers; an electrode layer under the plurality of compound semiconductor layers; and a supporting member disposed under the plurality of compound semiconductor layers and corresponding to the pad.
    Type: Grant
    Filed: July 3, 2014
    Date of Patent: February 20, 2018
    Assignee: LG INNOTEK CO., LTD.
    Inventor: Hwan Hee Jeong
  • Patent number: 9853187
    Abstract: Disclosed is a light emitting diode using light of a short wavelength band. The light emitting diode includes a first conductivity type semiconductor layer having a front side and a back side, a second conductivity type semiconductor layer having a front side and a back side, an active layer formed between the back side of the first conductivity type semiconductor layer and the front side of the second conductivity type semiconductor layer, a first electrode electrically connected to the first conductivity type semiconductor layer, a second conductivity type reflective layer formed on the back side of the second conductivity type semiconductor layer, and a reflective part formed on the second conductivity type reflective layer to reflect light of a short wavelength band and light of a blue wavelength band and electrically connected to the second conductivity type semiconductor layer. The second conductivity type reflective layer includes DBR unit layers.
    Type: Grant
    Filed: November 18, 2016
    Date of Patent: December 26, 2017
    Assignee: Lumens Co., Ltd.
    Inventor: Dae Won Kim
  • Patent number: 9833996
    Abstract: Disclosed is a method for preparing a nozzle surface provided with a coating having anti-wetting and anti-fouling property. The method is based, for example, on the self-healing property of the coating used in the method. Also disclosed is a nozzle surface having such coating and a print head having the nozzle surface.
    Type: Grant
    Filed: November 29, 2016
    Date of Patent: December 5, 2017
    Assignee: OCÉ-TECHNOLOGIES B.V.
    Inventors: Zhanhua Wang, Johannes T. Zuilhof, Marcus J. Van den Berg
  • Patent number: 9679821
    Abstract: Provided are methods of generating and revising overlay correction data, a method of performing a photolithography process using the overlay correction data, and a method of performing a photolithography process while revising the overlay correction data.
    Type: Grant
    Filed: January 20, 2016
    Date of Patent: June 13, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woojin Jung, Sang-Ho Yun, Un Jeon, Byeongsoo Kim, Cheolhong Kim, Taehong Min, Joonsoo Park
  • Patent number: 9627580
    Abstract: A method of growing an AlGaN semiconductor material utilizes an excess of Ga above the stoichiometric amount typically used. The excess Ga results in the formation of band structure potential fluctuations that improve the efficiency of radiative recombination and increase light generation of optoelectronic devices, in particular ultraviolet light emitting diodes, made using the method. Several improvements in UV LED design and performance are also provided for use together with the excess Ga growth method. Devices made with the method can be used for water purification, surface sterilization, communications, and data storage and retrieval.
    Type: Grant
    Filed: October 5, 2012
    Date of Patent: April 18, 2017
    Assignee: Trustees of Boston University
    Inventors: Yitao Liao, Theodore D. Moustakas
  • Patent number: 9616666
    Abstract: Provided is a method of manufacturing an element substrate, including: forming first and second resists on a predetermined surface of a substrate so that part of the predetermined surface is exposed; etching the substrate with the first and second resists being used as a mask to form a first recess in the substrate; removing the second resist to expose a portion of the substrate that is different from the first recess; etching the substrate with the first resist being used as a mask to deepen the first recess and to form a second recess communicating with the first recess in the substrate; and covering openings of the first and second recesses with an orifice forming member to form a pressure chamber by the first recess and an orifice forming member and to form a flow reducing portion by the second recess and the orifice forming member.
    Type: Grant
    Filed: August 7, 2015
    Date of Patent: April 11, 2017
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Toshifumi Yoshioka, Toru Nakakubo, Shinichiro Watanabe
  • Patent number: 9552984
    Abstract: There are provided a processing method of a substrate in which in forming a trench on the substrate by etching, a side wall surrounding the trench is surely protected, and a manufacturing method of a liquid ejection head. The methods include: repeating sequentially a plurality of cycles of a trench forming step of forming the trench on a printing element substrate, a first protection layer forming step of forming a passivation layer, and a first protection layer removing step of removing a portion at which the trench is excavated in the passivation layer. A second protection layer forming step and a second protection layer removing step are performed between the trench forming step through the first protection layer removing step repeated in a plurality of cycles and the trench forming step through the first protection layer removing step repeated next.
    Type: Grant
    Filed: December 9, 2015
    Date of Patent: January 24, 2017
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Atsushi Hiramoto, Atsunori Terasaki, Ryoji Kanri
  • Patent number: 9472627
    Abstract: A III-V compound semiconductor heterostructure grown on a substrate is described. The heterostructure includes a first semiconductor layer, wherein the first layer semiconductor layer is a compound semiconductor layer with (III) (V), wherein (III) represents one or more group-III elements and (V) represents one or more group-V elements, an intermediate layer on the first semiconductor layer, wherein the intermediate layer is a compound semiconductor layer with (III)x>1(V)2-x, and wherein the intermediate layer has a thickness of 10 monolayers or below, and a second semiconductor layer, wherein the first layer semiconductor layer is a compound semiconductor layer with (III)1(V)1.
    Type: Grant
    Filed: October 17, 2013
    Date of Patent: October 18, 2016
    Assignee: Brolis Semiconductors Ltd.
    Inventors: Kristijonas Vizbaras, Augustinas Vizbaras
  • Patent number: 9412629
    Abstract: An apparatus and method bond a first wafer to a second wafer. The apparatus includes a first pressure application device configured to apply pressure at a central region of the first wafer in a direction toward the second wafer to initiate a bonding process between the first wafer and the second wafer. The apparatus also includes one or more second pressure application devices configured to apply pressure between the central region and an outer edge of the first wafer to complete the bonding process. The one or more second pressure application devices apply pressure on the first wafer after the first pressure application device has initiated the bonding process and while the first pressure application device continues to apply pressure at the central region. A controller controls the first pressure application device and the one or more second pressure application devices.
    Type: Grant
    Filed: October 24, 2012
    Date of Patent: August 9, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Son V. Nguyen, Vamsi K. Paruchuri, Deepika Priyadarshini, Tuan A. Vo
  • Patent number: 9371225
    Abstract: A substrate processing method for forming a through-hole in a substrate by reactive ion etching includes preparing a substrate that has a first surface and a second surface and on the first surface side of which a first layer and a second layer are disposed, the second surface being on the opposite side to the first surface, the second layer covering the first layer; and performing reactive ion etching on the substrate from the second surface to form a through-hole extending through the substrate from the first surface to the second surface, the reactive ion etching being performed to reach the first layer. The etching rate of the second layer for the reactive ion etching is lower than that of the first layer.
    Type: Grant
    Filed: July 14, 2014
    Date of Patent: June 21, 2016
    Assignee: Canon Kabushiki Kaisha
    Inventors: Seiko Minami, Toshiyasu Sakai
  • Patent number: 9362389
    Abstract: A nitride-based field effect transistor (FET) comprises a compositionally graded and polarization induced doped p-layer underlying at least one gate contact and a compositionally graded and doped n-channel underlying a source contact. The n-channel is converted from the p-layer to the n-channel by ion implantation, a buffer underlies the doped p-layer and the n-channel, and a drain underlies the buffer.
    Type: Grant
    Filed: August 27, 2014
    Date of Patent: June 7, 2016
    Assignee: University of Notre Dame du Lac
    Inventors: Huili (Grace) Xing, Debdeep Jena, Kazuki Nomoto, Bo Song, Mingda Zhu, Zongyang Hu
  • Patent number: 9338837
    Abstract: According to one embodiment, there is provided a lighting device which includes a substrate; a light emitting element which is provided on the substrate; and a resistive element which is provided on the substrate, and is connected to the light emitting element in series. A voltage rate of the resistive element when a value of a first voltage which is reduced to half is applied to a first circuit to which the light emitting element and the resistive element are connected in series becomes equal to or smaller than 25% of a voltage rate of the resistive element when the first voltage is applied to the first circuit.
    Type: Grant
    Filed: March 13, 2014
    Date of Patent: May 10, 2016
    Assignee: Toshiba Lighting & Technology Corporation
    Inventor: Kiyokazu Hino
  • Patent number: 9324615
    Abstract: A method of producing a semiconductor body includes providing a semiconductor wafer having at least two chip regions and at least one separating region arranged between the chip regions, wherein the semiconductor wafer includes a layer sequence, an outermost layer of which has, at least within the separating region a transmissive layer transmissive to electromagnetic radiation, carrying out at least one of: removing the transmissive layer within the separating region, applying an absorbent layer within the separating region, increasing the absorption coefficient of the transmissive layer within the separating region, and separating the chip regions along the separating regions by a laser.
    Type: Grant
    Filed: April 4, 2012
    Date of Patent: April 26, 2016
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Korbinian Perzlmaier, Heribert Zull, Franz Eberhard, Thomas Veit, Mathias Kämpf, Jens Dennemarck
  • Patent number: 9259932
    Abstract: An assembly for selectively etching an inkjet printhead includes a substrate and printhead layers formed on the substrate. A bonding region can provide a location on the printhead layers for an electrical bond. An ink channeling region can be defined at least in part by the printhead layers. A mask layer can partially cover the printhead layers and include a first opening positioned over the bonding region and a second opening positioned over the ink channeling region. The assembly can also include a via at the first opening and a trench at the second opening having greater depth than the via.
    Type: Grant
    Filed: May 27, 2011
    Date of Patent: February 16, 2016
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Lawrence H. White, Robel Vina, Sara Jensen Homeijer, Terry Mcmahon
  • Patent number: 9252375
    Abstract: A display panel and method of manufacture are described. In an embodiment, a display substrate includes a pixel area and a non-pixel area. An array of subpixels and corresponding array of bottom electrodes are in the pixel area. An array of micro LED devices are bonded to the array of bottom electrodes. One or more top electrode layers are formed in electrical contact with the array of micro LED devices. In one embodiment a redundant pair of micro LED devices are bonded to the array of bottom electrodes. In one embodiment, the array of micro LED devices are imaged to detect irregularities.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: February 2, 2016
    Assignee: LuxVue Technology Corporation
    Inventors: Andreas Bibl, Kapil V. Sakariya, Charles R. Griggs, James Michael Perkins
  • Patent number: 9219246
    Abstract: The invention relates to an organic electronic device, particularly an OLED device (100), and to a method for its manufacturing. The device (100) comprises at least one functional unit (LU1, LU2, LU3) with an organic layer (120). On top of this functional unit (LU1, LU2, LU3), at least one inorganic encapsulation layer (140, 141) and at least one organic encapsulation layer (150, 151) are disposed in which at least one conductive line (161, 162) is embedded. In this way an OLED with a thin film encapsulation can be provided that can electrically be contacted at contact points (CL) on its back side.
    Type: Grant
    Filed: October 6, 2011
    Date of Patent: December 22, 2015
    Assignee: KONINKLIJKE PHILIPS N.V.
    Inventors: Sören Hartmann, Holger Schwab, Herbert Lifka, Herbert Friedrich Boerner
  • Patent number: 9142798
    Abstract: A package of an environmental sensitive electronic element including a first substrate, a second substrate, an environmental sensitive electronic element, a flexible structure layer and a filler layer is provided. The environmental sensitive electronic element is disposed on the first substrate and located between the first substrate and the second substrate. The environmental sensitive electronic element includes an anode layer, a hole injecting layer, a hole transporting layer, an organic light emitting layer, a cathode layer and an electron injection layer. The flexible structure layer is disposed on the environmental sensitive electronic element and includes a soft layer, a trapping layer and a protective layer. The material of the trapping layer is the same as the material of the electron injection layer. The filler layer is disposed between the first substrate and the second substrate and encapsulates the environmental sensitive electronic element and the flexible structure layer.
    Type: Grant
    Filed: January 19, 2012
    Date of Patent: September 22, 2015
    Assignee: Industrial Technology Research Institute
    Inventors: Kuang-Jung Chen, Jian-Lin Wu, Shu-Tang Yeh
  • Patent number: 9102145
    Abstract: A method for producing a liquid ejecting head of the present invention includes the steps of: forming an etching stop layer on a portion corresponding to a region in which an independent supply port is formed, on a first face of a substrate; conducting dry etching treatment for the substrate from a second face side until the etched portion reaches the etching stop layer; and removing the etching stop layer by isotropic etching to form the independent supply port, after having conducted the dry etching treatment, wherein the isotropic etching is conducted in such a state that a side etching stopper portion having etching resistance to the isotropic etching is formed in the side face perimeter of the etching stop layer.
    Type: Grant
    Filed: April 5, 2013
    Date of Patent: August 11, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Masahiko Kubota, Ryoji Kanri, Akihiko Okano, Atsushi Hiramoto, Masataka Sakurai, Yoshiyuki Fukumoto
  • Patent number: 9096063
    Abstract: A method of manufacturing a liquid ejection head includes the steps of (1) forming a recess in a second surface of a substrate to form a common supply port, (2) forming an etching mask, which specifies opening positions of independent supply ports, on a bottom surface of the common supply port, and (3) performing ion etching using plasma with the etching mask employed as a mask, thereby forming the independent supply ports. The etching mask has an opening pattern formed therein such that respective distances from an ejection energy generation element to openings of two independent supply ports adjacent to the ejection energy generation element on the first surface side of the substrate are equal to each other.
    Type: Grant
    Filed: January 22, 2013
    Date of Patent: August 4, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Masahiko Kubota, Ken Tsuchii, Masataka Sakurai, Yoshiyuki Nakagawa, Akiko Saito, Shinji Kishikawa, Ryoji Kanri, Atsunori Terasaki, Akihiko Okano, Atsushi Hiramoto
  • Patent number: 9093608
    Abstract: The process for the manufacture of a light-emitting diode comprises the following stages: the formation of a stack (1) of layers intended to emit light comprising first (2), second (3) and third (4) layers of aluminum gallium nitride, the said second layer (3), positioned between the first and third layers (2, 4), having an aluminum gallium nitride composition different from that of the first and third layers (2, 4); and the implementation of a demixing of the second layer (3) of aluminum gallium nitride carried out after formation of the said second layer.
    Type: Grant
    Filed: December 26, 2013
    Date of Patent: July 28, 2015
    Assignee: Commissariat a L'energie Atomique et aux Energies Alternatives
    Inventor: Bruno Daudin
  • Patent number: 9048100
    Abstract: A base at least one principal plane of which is a nitride is prepared for use in epitaxial growth. The base is placed on a susceptor in an epitaxial growth reactor and heated to a predetermined temperature (step A). The heating is started with inactive, nitrogen gas being supplied into the reactor. Then, active, NH3 gas is supplied. Then, a growth step (step B) of a first nitride semiconductor layer is started without an intervening step of thermally cleaning the principal nitride plane of the base. In step B, the first nitride semiconductor layer is epitaxially grown on a principal nitride plane of a base without supply of an Si source material. Then, a relatively thick, second nitride semiconductor layer is epitaxially grown on the first nitride semiconductor layer by supplying an n-type dopant source material (step C).
    Type: Grant
    Filed: November 20, 2008
    Date of Patent: June 2, 2015
    Assignee: Mitsubishi Chemical Corporation
    Inventors: Hideyoshi Horie, Kaori Kurihara
  • Patent number: 9038269
    Abstract: A nanoprinthead including an array of nanotip cantilevers, where each nanotip cantilever includes a nanotip at an end of a cantilever, and a method for forming the nanoprinthead. Each nanotip may be individually addressable through use of an array of piezoelectric actuators. Embodiments for forming a nanoprinthead including an array of nanotip cantilevers can include an etching process from a material such as a silicon wafer, or the formation of a metal or dielectric nanotip cantilever over a substrate. The nanoprinthead may operate to provide uses for technologies such as dip-pen nanolithography, nanomachining, and nanoscratching, among others.
    Type: Grant
    Filed: April 2, 2013
    Date of Patent: May 26, 2015
    Assignee: XEROX CORPORATION
    Inventors: Peter J. Nystrom, Andrew W. Hays, Bijoyraj Sahu
  • Patent number: 9029174
    Abstract: A structure includes a substrate, a template layer formed on the surface of the substrate and including an AlN layer, and a device structure portion formed by stacking AlGaN semiconductor layers on the template layer. For the structure, the AlN layer is irradiated from a side close to the substrate with a laser light with a wavelength by which the laser light passes through the substrate and the laser light is absorbed by the AlN layer, in a state in which the AlN layer receives compressive stress from the substrate. This allows the AlN layer to expand more than the surface of the substrate on at least an interface between the AlN layer and the substrate so as to increase the compressive stress, in order to remove the substrate from the AlN layer.
    Type: Grant
    Filed: February 25, 2011
    Date of Patent: May 12, 2015
    Assignees: Meijo University, Soko Kagaku Co., Ltd.
    Inventors: Motoaki Iwaya, Hiroshi Amano, Isamu Akasaki
  • Patent number: 9023670
    Abstract: The disclosure generally relates to a modular printhead configured for ease of access and quick replacement of the printhead. In one embodiment, the disclosure is directed to an integrated printhead which includes: a printhead die supporting a plurality of micropores thereon; a support structure for supporting the printhead die; a heater interposed between the printhead die and the support structure; and an electrical trace connecting the heater to a supply source. The support structure accommodates the electrical trace through a via formed within it so as to form a solid state printhead containing all of the connections within and providing easily replaceable printhead.
    Type: Grant
    Filed: November 5, 2013
    Date of Patent: May 5, 2015
    Assignee: Kateeva, Inc.
    Inventors: Dariusz Golda, Valerie Gassend, Hyeun-Su Kim
  • Patent number: 9023669
    Abstract: A processing method of a silicon substrate including forming a second opening in a bottom portion of a first opening using a patterning mask having a pattern opening by plasma reactive ion etching. The reactive ion etching is performed with a shield structure formed in or on the silicon substrate, the shield structure preventing inside of the first opening from being exposed to the plasma.
    Type: Grant
    Filed: July 20, 2011
    Date of Patent: May 5, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Atsushi Hiramoto, Masahiko Kubota, Ryoji Kanri, Akihiko Okano, Yoshiyuki Fukumoto, Atsunori Terasaki
  • Publication number: 20150111321
    Abstract: A method for processing a silicon substrate, comprising the steps of providing a silicon substrate having a first surface and a second surface, forming a non-penetrated hole extending from the first surface toward the second surface side in the silicon substrate, sticking a sealing tape comprising a support member and an adhesive layer on the first surface and filling at least part of the non-penetrated hole with the adhesive layer, performing reactive ion etching from the second surface toward the first surface side to allow the reactive ion etching to reach the adhesive layer filled in the non-penetrated hole and to expose the adhesive layer, and peeling the sealing tape from the silicon substrate to form a through hole in the silicon substrate.
    Type: Application
    Filed: October 20, 2014
    Publication date: April 23, 2015
    Inventors: Seiko Minami, Toshiyasu Sakai, Masataka Kato, Masaya Uyama, Hiroshi Higuchi, Yoshinao Ogata
  • Publication number: 20150109368
    Abstract: A liquid ejection head including a recording element substrate provided with a substrate and a flow-path-forming member forming a flow path in a principal surface of the substrate, a support member supporting the recording element substrate and an underfill material covering at least a joint portion at which the substrate and the support member are joined to each other, wherein the flow-path-forming member is formed in such a manner that an end portion thereof projects from at least one side surface of the substrate, the underfill material covers an external surface of the joint portion and covers the at least one side surface of the substrate in such a manner that the underfill material reaches the projecting end portion of the flow-path-forming member.
    Type: Application
    Filed: September 8, 2014
    Publication date: April 23, 2015
    Inventors: Satoshi IBE, Shingo Nagata
  • Patent number: 9012247
    Abstract: A method of manufacturing an ink jet printhead includes: providing a silicon substrate including active ejecting elements; providing a hydraulic structure layer; providing a silicon orifice plate having a plurality of nozzles for ejection of said ink; and assembling the silicon substrate with said hydraulic structure layer and said silicon orifice plate. Providing the silicon orifice plate comprises: providing a silicon wafer having a substantially planar extension delimited by a first and a second surfaces; performing a thinning step at the second surface so as to remove a central portion having a preset height; and forming in the silicon wafer a plurality of through holes, each defining a respective nozzle for ejection of the ink.
    Type: Grant
    Filed: June 7, 2011
    Date of Patent: April 21, 2015
    Assignee: SICPA Holding SA
    Inventors: Silvia Baldi, Danilo Bich, Lucia Giovanola, Anna Merialdo, Paolo Schina
  • Patent number: 8993357
    Abstract: A method for manufacturing a liquid discharge includes a process of forming a plurality of blind holes extending from a first surface of the silicon substrate toward a second surface which is a surface opposite to the first surface in the silicon substrate and a process of subjecting the silicon substrate in which the plurality of blind holes are formed to anisotropic etching from the first surface to form a liquid supply port in the silicon substrate, in which, in the process of forming the liquid supply port, the silicon in a region sandwiched by the plurality of blind holes when the silicon substrate is seen from the second surface side is left without being removed by the anisotropic etching to use the left silicon as a beam.
    Type: Grant
    Filed: March 5, 2014
    Date of Patent: March 31, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Keisuke Kishimoto, Taichi Yonemoto
  • Patent number: 8979247
    Abstract: A MEMS device is described that has a body with a component bonded to the body. The body has a main surface and a side surface adjacent to the main surface and smaller than the main surface. The body is formed of a material and the side surface is formed of the material and the body is in a crystalline structure different from the side surface. The body includes an outlet in the side surface and the component includes an aperture in fluid connection with the outlet.
    Type: Grant
    Filed: January 20, 2010
    Date of Patent: March 17, 2015
    Assignee: FUJIFILM Dimatix, Inc.
    Inventors: Paul A. Hoisington, Marc A. Torrey
  • Patent number: 8975097
    Abstract: A method of manufacturing a liquid discharge head includes: forming a first hole which penetrates through a wafer and becomes at least part of a liquid supply port and a second hole which does not penetrate through the wafer and becomes at least part of a cut-off portion from a front side of the wafer; arranging a dry film on the front side of the wafer; forming a flow passage forming member by heating and developing the dry film; and cutting off the liquid discharge head from the wafer by grinding the wafer from a back side so that the second hole penetrates through the wafer.
    Type: Grant
    Filed: May 27, 2014
    Date of Patent: March 10, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Masahisa Watanabe, Kenji Fujii, Keisuke Kishimoto, Ryotaro Murakami
  • Patent number: 8969105
    Abstract: Processes for forming an actuator having a curved piezoelectric membrane are disclosed. The processes utilize a profile-transferring substrate having a curved surface surrounded by a planar surface to form the curved piezoelectric membrane. The piezoelectric material used for the piezoelectric actuator is deposited on at least the curved surface of the profile-transferring substrate before the profile-transferring substrate is removed from the underside of the curved piezoelectric membrane. The resulting curved piezoelectric membrane includes grain structures that are columnar and aligned, and all or substantially all of the columnar grains are locally perpendicular to the curved surface of the piezoelectric membrane.
    Type: Grant
    Filed: July 22, 2011
    Date of Patent: March 3, 2015
    Assignee: FUJIFILM Corporation
    Inventors: Paul A. Hoisington, Jeffrey Birkmeyer, Andreas Bibl, Mats G. Ottosson, Gregory De Brabander, Zhenfang Chen, Mark Nepomnishy, Shinya Sugimoto
  • Patent number: 8963120
    Abstract: An optoelectronic semiconductor component includes a semiconductor layer sequence having at least one active layer, and a photonic crystal that couples radiation having a peak wavelength out of or into the semiconductor layer sequence, wherein the photonic crystal is at a distance from the active layer and formed by superimposition of at least two lattices having mutually different reciprocal lattice constants normalized to the peak wavelength.
    Type: Grant
    Filed: November 2, 2010
    Date of Patent: February 24, 2015
    Assignees: OSRAM Opto Semiconductors GmbH, The University Court of the University of St. Andrews
    Inventors: Krister Bergenek, Christopher Wiesmann, Thomas F. Krauss
  • Publication number: 20150042725
    Abstract: Provided are a manufacturing method of an inkjet print head, the inkjet print head and a drawing apparatus equipped with the inkjet print head. The manufacturing method includes: forming a separation assisting layer on a substrate; forming heating resistors, thin-film transistors and nozzles for ejecting liquid, on the separation assisting layer; separating the separation assisting layer from the substrate; forming a first heat-conductive layer on the opposite surface of the separation assisting layer from the nozzles; and forming an ink supply port for supplying ink to the nozzles from a first heat-conductive layer side of the inkjet print head.
    Type: Application
    Filed: August 7, 2014
    Publication date: February 12, 2015
    Inventors: SHIGERU MORI, SETSUO KANEKO, HIDEKI ASADA
  • Patent number: 8951815
    Abstract: A method for producing a liquid-discharge-head substrate includes a step of preparing a silicon substrate including, at a front-surface side of the silicon substrate, an energy generating element; a step of forming a first etchant introduction hole on the front-surface side of the silicon substrate; a step of supplying a first etchant into the first etchant introduction hole formed on the front-surface side of the silicon substrate, and supplying a second etchant to a back-surface side of the silicon substrate; a step of stopping the supply of the second etchant; and a step of, after the supply of the second etchant has been stopped, forming a liquid supply port extending through front and back surfaces of the silicon substrate by the supply of the first etchant.
    Type: Grant
    Filed: June 19, 2012
    Date of Patent: February 10, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Ryotaro Murakami, Shuji Koyama, Keisuke Kishimoto, Kenta Furusawa
  • Patent number: 8945957
    Abstract: The method of manufacturing a liquid ejection head includes: forming a first protective layer on one surface of the substrate; forming the wiring layer on another surface of the substrate; forming the insulating layer on the wiring layer, and then partially removing the insulating layer to partially expose the wiring layer; forming the electrode pad on an exposed portion of the wiring layer; forming a flow path member on the another surface of the substrate; forming a second protective layer on the one surface of the substrate after the formation of the flow path member; and partially removing at least one of the first protective layer and the second protective layer, and then forming the supply port leading from the one surface of the substrate to the another surface of the substrate.
    Type: Grant
    Filed: April 16, 2013
    Date of Patent: February 3, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiroto Komiyama, Satoshi Ibe, Jun Yamamuro, Kouji Hasegawa, Shiro Sujaku, Yoshinori Tagawa
  • Patent number: 8940559
    Abstract: In an embodiment, a method of fabricating an integrated orifice plate and cap structure includes forming an orifice bore on the front side of a product wafer, coating side walls of the orifice bore with a protective material, grinding the product wafer from its back side to a final thickness, forming a first hardmask for subsequent cavity formation, forming a second hardmask over the first hardmask for subsequent descender formation, forming a softmask over the second hardmask for subsequent convergent bore formation, etching a latent convergent bore using the softmask as an etch delineation feature, etching a descender using the second hardmask as an etch delineation feature, and anisotropic etching of convergent bore walls and cavities using the first hardmask as an etch delineation feature.
    Type: Grant
    Filed: November 4, 2011
    Date of Patent: January 27, 2015
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Daniel A Kearl, Rio Rivas
  • Patent number: 8927964
    Abstract: Apparatus and methods are provided. A first apparatus includes: a semiconductor film; and at least one semiconductor nanostructure, including a heterojunction, configured to modulate the conductivity of the semiconductor film by causing photo-generated carriers to transfer into the semiconductor film from the at least one semiconductor nanostructure. A second apparatus includes: a semimetal film; and at least one semiconductor nanostructure, including a heterojunction, configured to generate carrier pairs in the semimetal film via resonant energy transfer, and configured to generate an external electric field for separating the generated carrier pairs in the semimetal film.
    Type: Grant
    Filed: November 20, 2012
    Date of Patent: January 6, 2015
    Assignee: Nokia Corporation
    Inventors: Alan Colli, Tim J. Echtermeyer, Anna Eiden, Andrea C. Ferrari
  • Publication number: 20150004724
    Abstract: A method of manufacturing a liquid discharge head includes: forming a first hole which penetrates through a wafer and becomes at least part of a liquid supply port and a second hole which does not penetrate through the wafer and becomes at least part of a cut-off portion from a front side of the wafer; arranging a dry film on the front side of the wafer; forming a flow passage forming member by heating and developing the dry film; and cutting off the liquid discharge head from the wafer by grinding the wafer from a back side so that the second hole penetrates through the wafer.
    Type: Application
    Filed: May 27, 2014
    Publication date: January 1, 2015
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Masahisa Watanabe, Kenji Fujii, Keisuke Kishimoto, Ryotaro Murakami
  • Patent number: 8916395
    Abstract: A method of printing an electronic device includes providing a source of a mixture of semiconducting carbon nanotubes and metallic carbon nanotubes in a carrier liquid, a printhead, and a substrate. The mixture of semiconducting carbon nanotubes and metallic carbon nanotubes in the carrier liquid is separated using the printhead. One of the separated semiconducting carbon nanotubes and the separated metallic carbon nanotubes is caused to contact the substrate in predetermined pattern.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: December 23, 2014
    Assignee: Eastman Kodak Company
    Inventors: Shashishekar P. Adiga, Hrishikesh V. Panchawagh, Michael A. Marcus
  • Publication number: 20140363907
    Abstract: A process for producing a substrate for a liquid ejection head, including a step of forming a liquid supply port passing through a silicon substrate by dry etching, the step being a step of sequentially repeating the steps of (1) forming an etching protection film on the silicon substrate, (2) removing a bottom portion of the etching protection film, and (3) etching the silicon substrate, wherein a sheath formed in the step (2) is thicker than a sheath formed in the step (3).
    Type: Application
    Filed: May 21, 2014
    Publication date: December 11, 2014
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Toshiyasu Sakai, Masataka Kato, Kenji Kumamaru
  • Publication number: 20140354736
    Abstract: A method of making an inkjet print head may include forming, by sawing with a rotary saw blade, continuous slotted recesses in a first surface of a wafer. The continuous slotted recesses may be arranged in parallel, spaced apart relation, and each continuous slotted recess may extend continuously across the first surface. The method may further include forming discontinuous slotted recesses in a second surface of the wafer to be aligned and coupled in communication with the continuous slotted recesses to define alternating through-wafer channels and slotted recess portions. The method may further include selectively filling the residual slotted recess portions to define through-wafer ink channels.
    Type: Application
    Filed: May 31, 2013
    Publication date: December 4, 2014
    Applicant: STMICROELECTRONICS, INC.
    Inventor: Kenneth J. Stewart
  • Publication number: 20140356990
    Abstract: A method of making inkjet print heads may include forming a first wafer including a sacrificial substrate layer, and a first dielectric layer thereon having first openings therein defining inkjet orifices. The method may also include forming a second wafer having inkjet chambers defined thereon, and joining the first and second wafers together so that each inkjet orifice is aligned with a respective inkjet chamber. The method may further include removing the sacrificial substrate layer thereby defining the inkjet print heads.
    Type: Application
    Filed: May 31, 2013
    Publication date: December 4, 2014
    Applicant: STMICROELECTRONICS, INC.
    Inventors: Paul MIKULAN, Kenneth J. STEWART, Virginia L. HWANG
  • Publication number: 20140354735
    Abstract: A method of making inkjet print heads may include forming recesses in a first surface of a first wafer to define inkjet chambers. The method may also include forming openings extending from a second surface of the first wafer through to respective ones of the inkjet chambers to define inkjet orifices. The method may further include forming a second wafer including ink heaters, and joining the first and second wafers together so that the ink heaters are aligned within respective inkjet chambers to thereby define the inkjet print heads.
    Type: Application
    Filed: May 31, 2013
    Publication date: December 4, 2014
    Inventors: Murray J. Robinson, Kenneth J. Stewart