Fusion Or Solidification Of Semiconductor Region Patents (Class 438/352)
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Patent number: 9149891Abstract: A metal core electrode used to form weld deposits having improved slag forming properties with respect to reduced accumulation of slag in toes of the weld bead. The metal cored electrode includes a metal rod and a fill composition. The electrode includes a slag-modifying additive that contains metallic indium and/or one or more indium compounds.Type: GrantFiled: February 22, 2005Date of Patent: October 6, 2015Assignee: Lincoln Global, Inc.Inventor: Vaidyanath B. Rajan
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Patent number: 8222114Abstract: This invention disclosed a novel manufacturing approach of collector and buried layer of a bipolar transistor. One aspect of the invention is that an oxide-nitride-oxide (ONO) sandwich structure is employed instead of oxide-nitride dual layer structure before trench etching. Another aspect is, through the formation of silicon oxide spacer in trench sidewall and silicon oxide remaining in trench bottom in the deposition and etch back process, the new structure hard mask can effectively protect active region from impurity implanted in ion implantation process.Type: GrantFiled: December 28, 2010Date of Patent: July 17, 2012Assignee: Shanghai Hua Hong NEC Electronics Company, LimitedInventors: Tzuyin Chiu, TungYuan Chu, YungChieh Fan, Wensheng Qian, Fan Chen, Jiong Xu, Haifang Zhang
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Patent number: 7012319Abstract: A method for integrating a system on an isolation layer. A first isolation substrate including a first circuit deposition region and a first substrate-combining region, and a second isolation substrate including a second circuit deposition region and a second substrate-combining region are provided. Next, a first circuit and a second circuit are respectively formed on the first circuit deposition region and the second circuit deposition region. Next, substrate-connecting elements are formed to connect the first substrate-combining region to the second substrate-combining region. Finally, electrical connecting elements are formed to electrically connect the first circuit and the second circuit.Type: GrantFiled: January 2, 2004Date of Patent: March 14, 2006Assignee: Au Optronics Corp.Inventor: Wein-Town Sun
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Patent number: 6893933Abstract: Many integrated circuits include a type of transistor known as a bipolar junction transistor, which has an emitter contact formed of polysilicon. Unfortunately, polysilicon has a relatively high electrical resistance that poses an obstacle to improving switching speed and current gain of bipolar transistors. Current fabrication techniques involve high temperature procedures that melt desirable low-resistance substitutes, such as aluminum, during fabrication. Accordingly, one embodiment of the invention provides an emitter contact structure that includes a polysilicon-carbide layer and a low-resistance aluminum, gold, or silver member to reduce emitter resistance. Moreover, to overcome manufacturing difficulties, the inventors employ a metal-substitution technique, which entails formation of a polysilicon emitter, and then substitution or cross-diffusion of metal for the polysilicon.Type: GrantFiled: August 27, 2004Date of Patent: May 17, 2005Assignee: Micron Technology, Inc.Inventors: Kie Y. Ahn, Leonard Forbes
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Patent number: 6815303Abstract: Many integrated circuits include a type of transistor known as a bipolar junction transistor, which has an emitter contact formed of polysilicon. Unfortunately, polysilicon has a relatively high electrical resistance that poses an obstacle to improving switching speed and current gain of bipolar transistors. Current fabrication techniques involve high temperature procedures that melt desirable low-resistance substitutes, such as aluminum, during fabrication. Accordingly, one embodiment of the invention provides an emitter contact structure that includes a polysilicon-carbide layer and a low-resistance aluminum, gold, or silver member to reduce emitter resistance. Moreover, to overcome manufacturing difficulties, the inventors employ a metal-substitution technique, which entails formation of a polysilicon emitter, and then substitution of metal for the polysilicon.Type: GrantFiled: April 29, 1998Date of Patent: November 9, 2004Assignee: Micron Technology, Inc.Inventors: Kie Y. Ahn, Leonard Forbes
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Patent number: 6432791Abstract: Capacitors for integrated circuits with a common polysilicon layer for both MOS gates (274, 276, 278) and capacitor (270) lower plates but with implanted doping for the gates and masked diffusive doping for the capacitor plates.Type: GrantFiled: April 12, 2000Date of Patent: August 13, 2002Assignee: Texas Instruments IncorporatedInventors: Louis N. Hutter, Peter S. Ying, Imran Khan
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Patent number: 6025243Abstract: A deposited film formation method comprises the steps of:(a) feeding a gas of an organometallic compound containing molybdenum atom and hydrogen gas onto a substrate having an electron donative surface; and(b) maintaining the temperature of the electron donative surface within the range of the decomposition temperature of the organometallic compound or lower and 800.degree. C. or lower to form a molybdenum film on the electron donative surface.Type: GrantFiled: June 9, 1994Date of Patent: February 15, 2000Assignee: Canon Kabushiki KaishaInventors: Kazuaki Ohmi, Osamu Ikeda, Shigeyuki Matsumoto