Controlled Atmosphere Patents (Class 438/909)
  • Patent number: 5785877
    Abstract: An object to be etched is loaded in a low-pressure vapor phase processing chamber, and then an etching gas obtained by adding a small amount of additive gas of oxygen or additive gas at least containing oxygen to a reaction gas used for etching is fed to the low-pressure vapor phase processing chamber so as to suppress a reaction between the wall of the low-pressure vapor phase processing chamber and the reaction gas. In this state, the object to be etched is dry-etched with the etching gas.
    Type: Grant
    Filed: February 11, 1997
    Date of Patent: July 28, 1998
    Assignees: Nippon Telegraph and Telephone Corporation, Tokyo Electron Limited
    Inventors: Masaaki Sato, Yoshinobu Arita, Masahiro Ogasawara, Hidenori Satoh, Hiromitsu Kanbara
  • Patent number: 5782942
    Abstract: An improved filter system, particularly for the furnaces of a semiconductor manufacturing plant, has a standby filter and a piping system for connecting it momentarily in parallel with a normally used filter of one of the furnaces. A system of valves permits the normal filter to be isolated from its furnace so that it can be allowed to cool and then removed and replaced. The filter system avoids the problem that a standby filter is otherwise required for each furnace or that the replacement can not be made at a convenient time.
    Type: Grant
    Filed: January 11, 1996
    Date of Patent: July 21, 1998
    Assignee: Vanguard International Semiconductor Corporation
    Inventor: Wen-Kai Wu
  • Patent number: 5753305
    Abstract: This invention pertains generally to aging methods suited to aerogel thin film fabrication, and particularly to techniques for improving gel strength and/or aerogel dielectric constant by a rapid aging technique, which avoid damage or premature drying of wet gel thin films during aging. A substrate having a wet gel thin film deposited thereon is contacted with a saturated water vapor atmosphere, preferably at an elevated pressure and a temperature greater than 100.degree. C. The method may comprise a vapor-phase exchange step to remove low boiling point pore liquids such as ethanol prior to or during aging. The method may also comprise a vapor-phase exchange step to replace water in the wet gel with another pore liquid such as acetone to stop the aging process and prepare the wet gel for drying. A vapor-phase aging catalyst (e.g. ammonia) may also be used to enhance the aging process.
    Type: Grant
    Filed: November 14, 1996
    Date of Patent: May 19, 1998
    Assignee: Texas Instruments Incorporated
    Inventors: Douglas M. Smith, Gregory P. Johnston, William C. Ackerman, Shin-Puu Jeng
  • Patent number: 5731238
    Abstract: An integrated circuit (10) is formed using jet vapor deposition (JVD) silicon nitride. A non-volatile memory device (11) has a tunnel dielectric layer (27) and an inter-poly dielectric layer (31) that can be formed from JVD silicon nitride. A transistor (12,13,40) is formed that has a gate dielectric material made from JVD silicon nitride. In addition, a passivation layer (47) can be formed overlying a semiconductor device (40) that is formed from JVD silicon nitride.
    Type: Grant
    Filed: August 5, 1996
    Date of Patent: March 24, 1998
    Assignee: Motorola Inc.
    Inventors: Craig Allan Cavins, Hsing-Huang Tseng, Ko-Min Chang
  • Patent number: 5631199
    Abstract: A furnace for manufacturing a semiconductor device and a method of forming a gate oxide film by utilizing the same is disclosed, which can decrease the budget of the device and improve the quality of the oxide film. First N.sub.2 O gas in a source furnace maintained at a high temperature. This eliminates factors contributing to poor quality. These factors include the increase of H.sub.2 generated as a result of the difference in the resolving temperatures of N.sub.2 O and NH.sub.3 in the oxidization process. Also, the invention results in the oxidizing a selected portion of a wafer by making N.sub.2 O and NH.sub.3 react in the main furnace maintained at low temperature.
    Type: Grant
    Filed: July 7, 1995
    Date of Patent: May 20, 1997
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventor: Mi Ra Park
  • Patent number: 5629223
    Abstract: The present invention develops a process for forming hemi-spherical grained silicon storage capacitor plates by the steps of: forming a silicon layer over a pair of neighboring parallel conductive lines, the silicon layer making contact to an underlying conductive region; patterning the silicon layer to form individual silicon capacitor plates; exposing the silicon capacitor plates to a fluorine based gas mixture during an high vacuum annealing period, thereby transforming the silicon capacitor plates into the semi-spherical grained silicon capacitor plates; conductively doping the hemi-spherical grained silicon capacitor plates; forming a capacitor dielectric layer adjacent and coextensive the semi-spherical grained silicon capacitor plates; and forming a second conductive silicon layer superjacent and coextensive the capacitor dielectric layer.
    Type: Grant
    Filed: November 15, 1994
    Date of Patent: May 13, 1997
    Assignee: Micron Technology, Inc.
    Inventor: Randhir P. S. Thakur
  • Patent number: 5620910
    Abstract: In an insulated gate type field effect semiconductor device having a thin silicon semiconductor film, the gate insulating film that covers the active layer is a thin film consisting essentially of silicon, oxygen and nitrogen. In the gate insulating film in the device, the nitrogen content is made the largest in the interface between the film and the adjacent gate electrode, and the material constituting the gate electrode is prevented from being diffused into the gate insulating film. In the film, the nitrogen content is made the largest in the interface between the film and the adjacent active layer, and hydrogen ions, etc. are prevented from being diffused from the active layer into the gate insulating film. Prior to the formation of the gate insulating film, the surface of the active layer is irradiated to laser rays or intense rays comparable to laser rays, so as to be oxidized or nitrided.
    Type: Grant
    Filed: June 22, 1995
    Date of Patent: April 15, 1997
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Satoshi Teramoto