Abstract: The present invention includes a process of growing a compound semiconductor layer locally, after applying radical particles that do not become an etchant of a compound semiconductor layer to an insulating mask so as to terminate the surface of the insulating mask in a state that the compound semiconductor layer is covered with the insulating mask, on the surface of the compound semiconductor layer exposed from the insulating mask.

Abstract: In a light-emitting diode, which comprises epitaxial wafer where a gallium phosphide or a gallium phosphide arsenide mixed crystal epitaxial layer is grown on a III-V family compound single crystal substrate having zinc blende type crystal structure, the surface of said substrate has a plane tilted by 5 to 16.degree. from a (100) plane toward ?010!, ?001!, ?0-10! or ?00-1!, or a plane having crystallographically equivalent crystal plane orientation to this plane. As a result, it is possible to improve light emitting output and to ensure longer service life.

Abstract: A method is described by which the mechanical strength of chips of semiconductor devices can be controlled by appropriate wafer finishing and sorted by knowledge of the finishing method and chip and wafer geometry. The control and sorting derive from a knowledge of the geometry of the striations remaining on the back of chips after the wafer-grinding finishing step.

Abstract: Trench structures (12,32,35,46) are formed in single crystal silicon substrates (10,30) that have either a (110) or (112) orientation. A selective wet etch solution is used that removes only the exposed portions of the single crystal silicon substrates (10,30) that are in the (110) or (112) crystal planes. The trench structures (12,32,35,46) are defined by the {111} crystal planes in the single crystal silicon substrate (10,30) that are exposed during the selective wet etch process. Trench structures (32,35) can be formed on both sides of a single crystal silicon substrate (30) to form an opening (34). Opening (34) can be used as an alignment mark to align front side processing to backside and vice versa. Trench structures can also be use to form a microstructure (41,61) for a sensor (40,60).

Abstract: A module and a method of making the module is disclosed. The module is formed from a semiconductor substrate and a silicon carbide chip for high temperature applications. The module is designed to be compatible with current silicon IC processes.

Abstract: The present invention includes a method and system to increase the deep trench sidewall surface area in a storage node on a DRAM chip. By tilting the trenches the capacitance is increased without taking up more space on the semiconductor chip.

Abstract: A technique of bonding a thin wafer layer to a substrate. The wafer is blown dry using an inert gas to prevent it from being damaged, while still ensuring that it dries completely. The initial bonding is done by orienting crystallographic axes, and then allowing the wafers to adhere to one another slowly. The contact wave is prevented from spreading, by a divider between the two wafers. The wafers are allowed to adhere to one another slowly to form a bond. The bond is strengthened by annealing.

Abstract: A sapphire wafer is sliced off parallel to a plane "a" {1120} so that patterns on its top surface are rectangular in shape as defined by an axis "c" (0001) and an axis "m" (1010). The sapphire wafer is fixed on a table. A scriber blade that is coated with synthetic diamond scribes the surface of the sapphire wafer so that scribe lines are formed in a checkered pattern. One of the scribe lines is inclined from axis "c" (001) by 20 to 70 degrees in a clockwise direction and the other scribe line is inclined from the axis "c" (001) by 20 to 70 degrees in a counterclockwise direction. After scribing, pressure is applied by a roller along the scribe lines so as to cause the sapphire wafer to break into a sapphire chip. The yield of sapphire chips is increased by the use of this method because chipping is less likely to occur.