Abstract: A system and method for forming a semiconductor die contact structure is disclosed. An embodiment comprises a top level metal contact, such as copper, with a thickness large enough to act as a buffer for underlying low-k, extremely low-k, or ultra low-k dielectric layers. A contact pad or post-passivation interconnect may be formed over the top level metal contact, and a copper pillar or solder bump may be formed to be in electrical connection with the top level metal contact.

Abstract: A process variation detector includes a pulse-signal generating unit that generates a pulse signal having a pulse width corresponding to a characteristic of a process variation in an integrated circuit based on a clock signal; and an output unit that generates a predetermined value, when the pulse signal indicates a specific process variation, by using a transistor of which a channel width and a gate length are set to an unbalanced state, and outputs the predetermined value.

Abstract: A process for epitaxially coating the front surface of a semiconductor wafer in a CVD reactor, the front surface of the semiconductor wafer being exposed to a process gas which contains a source gas and a carrier gas, and the back surface of the semiconductor wafer being exposed to a displacement gas, wherein the displacement gas contains no more than 5% by volume of hydrogen, with the result that diffusion of dopants out of the back surface of the semiconductor wafer, which is intensified by hydrogen, is substantially avoided. With this process, it is possible to produce a semiconductor wafer with a substrate resistivity of ?100 m?cm and a resistivity of the epitaxial layer of >1 ?cm without back-surface coating, the epitaxial layer of which semiconductor wafer has a resistance inhomogeneity of <10%.

Abstract: A method of standardizing a fabrication process for an integrated circuit. The fabrication process includes a preceding thermal energy sensitive process and at least one set of selectable succeeding thermal energy delivery processes. An integrated circuit structure is formed using the preceding thermal energy sensitive process. The preceding thermal energy sensitive process is characterized based at least in part upon the greatest amount of thermal energy delivered to the integrated circuit by one of the set of selectable succeeding thermal energy delivery processes. Then as subsequent processes are selected and accomplished, if they do not deliver the greatest amount of thermal energy as anticipated by the preceding thermal energy sensitive process, an additional amount of thermal energy is added, so as to preferably equal the anticipated greatest amount of thermal energy. In this manner, the characterization of the preceding thermal energy sensitive process attains its desired parameters.

Abstract: There is provided a high quality liquid crystal panel having a thickness with high accuracy, which is designed, without using a particulate spacer, within a free range in accordance with characteristics of a used liquid crystal and a driving method, and is also provided a method of fabricating the same. The shape of a spacer for keeping a substrate interval constant is made such that it is a columnar shape, a radius R of curvature is 2 &mgr;m or less, a height H is 0.5 &mgr;m to 10 &mgr;m, a diameter is 20 &mgr;m or less, and an angle &agr; is 65° to 115°. By doing so, it is possible to prevent the lowering of an opening rate and the lowering of light leakage due to orientation disturbance.

Abstract: For removing a photoresist formed on a semiconductor wafer by using an ozone-dissolved water, until just before a low temperature ozone-dissolved water generated by an ozone-dissolved water generator is discharged from a discharge nozzle onto a semiconductor wafer placed on a stage, the semiconductor wafer is heated to a predetermined temperature which is higher than ordinary temperatures. When the low temperature ozone-dissolved water having a high concentration of ozone is discharged onto the semiconductor wafer, the temperature of the ozone-dissolved water elevates upon the instant. Thus, the photoresist formed on the semiconductor wafer can be removed by a high temperature, high ozone concentration, ozone-dissolved water.

Abstract: A method of manufacturing a semiconductor device includes forming an insulated wiring pattern on a semiconductor substrate, and forming a lower interlayer insulating layer on the wiring pattern. A hard mask is formed on the lower insulating layer. Self-aligned contact holes are formed to expose the substrate under openings or gaps of the wiring pattern by partially etching the lower interlayer insulating layer be using the hard mask as an etch mask. A surface treatment process is carried out against surface of the substrate exposed through the self-aligned contact holes. Then, a first conductive layer is conformably formed over the whole surface of the substrate over which the surface treatment process is finished. At this time, projections are formed on sidewalls of the self-aligned contact holes. The first conductive layer is anisotropically etched to remove the projection. A second conductive layer fills completely the self-aligned contact holes.

Abstract: Polycrystalline silicon-germanium alloy is grown on a glass substrate through a chemical vapor deposition under the conditions where the substrate temperature ranges from 350 degrees to 450 degrees in centigrade, the ratio between gas flow rate of Si.sub.2 H.sub.6 and the gas flow rate of GeF.sub.4 ranges from 20:0.9 to 40:0.9 and the dilution gas is selected from the group consisting of helium, argon, nitrogen and hydrogen, and the composition ratio of silicon of the polycrystalline silicon-germanium is equal to or greater than 80 percent so that the carrier mobility is drastically improved.

Abstract: A photo FET device having a large area backside optical energy reception surface is disclosed. The photo FET device is fabricated in the source gate and drain upward configuration and then inverted onto a new permanent substrate member and an original surrogate substrate member removed in order to expose the active area backside optical energy reception surface. Electrical characteristics including curve tracer electrical data originating in both dark and illuminated devices and devices of varying size and both depletion mode and enhancement mode operation are also disclosed. Fabrication of the device from gallium arsenide semiconductor material and utilization for infrared energy transducing in a number of differing electronic applications are also disclosed.