Variable Automatic Gain Control Loop Gain Patents (Class 455/240.1)
  • Publication number: 20030171104
    Abstract: Receiver comprising a cascade of first to N resonance amplifiers (SA1, SA2, SA3), an output thereof being coupled to signal processing means (TO, SD, PK, LP1, S) for deriving a baseband modulation signal. To improve the signal to noise ratio said cascade is included in an RF input stage of the receiver for a distributed selective amplification of an RF reception signal, preferably with an impedance level of the individual resonance amplifiers within said cascade of first to N resonance amplifiers increasing in signal downstream direction.
    Type: Application
    Filed: August 20, 2002
    Publication date: September 11, 2003
    Inventor: Herman Wouter Van Rumpt
  • Publication number: 20030143968
    Abstract: A constant output signal can be achieved by controlling a gain variable amplifier 2 based on a level of an output signal which is derived by variably amplifying a receiving signal S1 (input signal). An AGC output signal S11 is detected by a detector circuit 3. Then, a CPU 5 generates a control signal S8 based on a detected voltage signal S7. An RSSI detector portion 9 detects an RSSI signal S10 corresponding to a transmitting signal level from the receiving signal S1. The transmitting signal level is compared to a preceding transmitting signal level. The control signal from a preceding execution of the gain control is output if the present control signal is lower than the preceding control signal and the present transmitting signal level is reduced below the preceding transmitting signal level.
    Type: Application
    Filed: February 4, 2003
    Publication date: July 31, 2003
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. a corporation of Japan
    Inventors: Yasushi Iwata, Yasufumi Ichikawa
  • Patent number: 6597898
    Abstract: A constant output signal can be achieved by controlling a gain variable amplifier 2 based on a level of an output signal which is derived by variably amplifying a receiving signal S1 (input signal). An AGC output signal S11 is detected by a detector circuit 3, then a detected voltage signal S7 is converted into a digital signal by an A/D converter 4 to output it to a CPU 5. Then, the CPU 5 generates a control signal S8 based on the detected voltage signal S7, then an A/D converter 6 converts the control signal S8 into the analogue signal, and then the signal is sent out to the gain variable amplifier 2 to execute gain control. At this time, an RSSI detector portion 9 detects an RSSI signal S10 corresponding to a transmitting signal level from the receiving signal S1, and then the CPU 5 sends out the control signal S8 stored at the time of preceding execution of the gain control when the RSSI signal S10 is reduced below a predetermined threshold value S12.
    Type: Grant
    Filed: January 6, 2000
    Date of Patent: July 22, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yasushi Iwata, Yasufumi Ichikawa
  • Patent number: 6577852
    Abstract: When an input signal S11 is variable-gain-amplified by a variable gain amplifier 1 to obtain a predetermined output signal S12, a variable gain control signal S15 is generated by a detecting circuit 2, an A/D converter 3, an adder 4, and a converting unit 5. Both a latch circuit 6 and an adder 7 calculate a difference between a variable gain control signal generated during a preceding control operation and a present variable gain control signal. When the difference result is equal to “0”, a counter 8 counts predetermined stable condition continued time, and thereafter outputs a non-operation setting signal S16. Also, the counter 8 sends out the variable gain control signal generated during the preceding control operation to the variable gain amplifier 1 so as to set the detecting circuit 2, the A/D converter 3, the adder 4, and the converting unit 5 into non-operation conditions thereof.
    Type: Grant
    Filed: July 5, 2000
    Date of Patent: June 10, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yasushi Iwata, Yasufumi Ichikawa
  • Patent number: 6574292
    Abstract: Automatic gain control (AGC) methods and apparatus suitable for use in orthogonal frequency division multiplexing (OFDM) receivers are described. One AGC method includes the steps of repeatedly performing a first AGC process which adjusts amplifier gain based on determining that a signal level of multiple time sample values is outside a limit set by a first predefined threshold; and repeatedly performing a second AGC process which adjusts the amplifier gain based on determining that a signal level of multiple frequency sample values associated with a plurality of pilot tones is outside a limit set by a second predefined threshold. Preferably, the first AGC process is performed repeatedly at a first rate and the second AGC process is performed repeatedly at a second rate that is less than the first rate.
    Type: Grant
    Filed: January 17, 2002
    Date of Patent: June 3, 2003
    Assignee: AT&T Wireless Services, Inc.
    Inventors: Jari M. Heinonen, Michael R. Hirano, Hongliang Zhang
  • Publication number: 20030096587
    Abstract: An automatic gain control loop for a radio receiver, comprising a switchable lowpass filter (21) to reduce distortions in an analogue gain control signal (6) by switching said switchable lowpass filter (21) to a low time constant in case a change of a gain control signal (6) of the automatic gain control loop lies above a predetermined threshold, which low time constant is lower than a normally used time constant, comprises a hold unit (24) which affects that said switchable lowpass filter (21) uses said low time constant a predetermined time after a change of the gain control signal (6) of the automatic gain control loop lies below said predetermined threshold.
    Type: Application
    Filed: November 19, 2002
    Publication date: May 22, 2003
    Inventor: Jens Wildhagen
  • Patent number: 6560447
    Abstract: A DC offset correction circuit (68) provides DC offset correction within a receiver (50) for receiving and processing a radio frequency signal (28) within a radio communication system (30). The DC offset correction circuit (68) includes a feedback loop (88) for shifting a digital signal (80) by a programmable amount; and a coarse DC offset correction path (104) coupled to the feedback loop (88) for performing coarse DC offset correction.
    Type: Grant
    Filed: March 5, 2001
    Date of Patent: May 6, 2003
    Assignee: Motorola, Inc.
    Inventors: Mahibur Rahman, Christopher T. Thomas, Robert Schweickert, James Mittel, Clinton C. Powell, II
  • Patent number: 6559717
    Abstract: An apparatus comprising a first circuit and a second circuit. The first circuit generally comprises one or more master amplifiers and a plurality of control amplifiers. The first circuit may be configured to generate a plurality of control signals in response to (i) a first signal related to a desired gain and (ii) a second signal related to a known reference. The second circuit may be configured to generate an output signal in response to (i) an input signal and (ii) the plurality of control signals. The output signal may be amplified with respect to the input signal.
    Type: Grant
    Filed: June 13, 2001
    Date of Patent: May 6, 2003
    Assignee: LSI Logic Corporation
    Inventors: Lapoe E. Lynn, Samuel W. Sheng
  • Patent number: 6553084
    Abstract: A digital automatic gain control linearizer for controlling a variable gain control element for automatically controlling gain, using an analog signal obtained by converting input digital data includes a memory an average calculation unit. The memory outputs upper and lower limit data corresponding respectively to the upper and lower limits of a binary data range which can be expressed by a plurality of upper bits forming the digital data. The average calculation unit calculates the average of one and other data of the upper and lower limit data, and repeats average calculation a predetermined number of times using the calculated average at least one of the upper limit data and the lower limit data. Average calculation is repeated a number of times corresponding to the lower-bit value of the digital data except for the plurality of upper bits, and the variable gain control element is controlled in accordance with the average calculated by the average calculation unit.
    Type: Grant
    Filed: June 7, 1999
    Date of Patent: April 22, 2003
    Assignee: NEC Corporation
    Inventor: Tsuguo Maru
  • Patent number: 6542202
    Abstract: A video signal processing apparatus capable of improving signal level while reducing noise component no matter a video signal of what illuminance is input is provided, which apparatus includes a video signal amplifying circuit amplifying an input video signal and outputting a video signal of a predetermined image size in accordance with a gain control coefficient, a frame addition circuit connected to the video signal amplifying circuit for adding outputs of the video signal amplifying circuit by a predetermined number of frames, a first signal level detecting circuit connected to the video signal amplifying circuit and calculating the gain control coefficient and a multiplication coefficient in accordance with an output of the video signal amplifying circuit, and a first multiplier connected to the frame addition circuit and the first signal level detecting circuit and receiving as inputs an output of the frame addition circuit and the multiplication coefficient.
    Type: Grant
    Filed: August 17, 1999
    Date of Patent: April 1, 2003
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Mitsuhiko Takeda, Mamoru Oda
  • Patent number: 6535560
    Abstract: A receiver is adaptively calibrated by using a coherent reference signal. The reference signal is selected to be offset from a center frequency of the calibration signal such that the resultant product is offset from baseband by some small amount. The resultant product is used to determine a next value of the calibration parameters.
    Type: Grant
    Filed: June 3, 1999
    Date of Patent: March 18, 2003
    Assignee: Ditrans Corporation
    Inventor: Wesley K. Masenten
  • Publication number: 20030027537
    Abstract: A system and method for receiver automatic gain control (AGC) adapted to provide a feedback signal having improved stability is described herein. The system and method includes taking plurality of samples of received signal, calculating power for each of the plurality of samples of the received signal, and computing an average value of the calculated powers. An appropriate feedback signal based on the computed average value may then be generated.
    Type: Application
    Filed: August 1, 2001
    Publication date: February 6, 2003
    Inventor: Koji Kimura
  • Publication number: 20030013427
    Abstract: A wireless transmitter has: a calculation means for determining an electric power value of baseband signals to be input to modulating means; a detection means for determining a transmitting electric power value after detecting a transmitting electric power of an antenna; a generation means for generating target gains of a plurality of variable gain amplifying means; and a control means for determining observation gains from the electric power value and the transmitting electric power value to control the gains of the plurality of variable gain amplifying means in such that the observation gains come to be the target gains.
    Type: Application
    Filed: July 12, 2002
    Publication date: January 16, 2003
    Applicant: NEC CORPORATION
    Inventor: Takeshi Ishihara
  • Patent number: 6498926
    Abstract: A programmable linear receiver which provides the requisite level of system performance at reduced power consumption. The receiver minimizes power consumption based on measurement of the non-linearity in the output signal from the receiver. The amount of non-linearity can be measured by the RSSI slope or energy-per-chip-to-noise-ratio (Ec/Io) measurement. The RSSI slope is the ratio of the change in the output signal plus intermodulation to the change in the input signal. The input signal level is periodically increased by a predetermined level and the output signal from the receiver is measured. The output signal comprises the desired signal and intermodulation products from non-linearity within the receiver. When the receiver is operating linearly, the output signal level increases dB per dB with the input signal level. However, as the receiver transitions into non-linear region, intermodulation products due to non-linearity increase faster than the desired signal.
    Type: Grant
    Filed: December 9, 1997
    Date of Patent: December 24, 2002
    Assignee: Qualcomm Incorporated
    Inventors: Steven C. Ciccarelli, Saed G. Younis, Ralph E. Kaufman
  • Publication number: 20020187765
    Abstract: A novel and useful apparatus for and method of automatic gain control (AGC) using Kalman filtering and hysteresis. A nonlinear, time-variant loop filter such as a Kalman filter is employed in the feedback loop of an AGC circuit. The circuit is able to transition quickly and make fast adaptations to new levels of the input signal by use of a restart mechanism used to dynamically modify the gain of the loop filter that enables the AGC circuit to quickly adapt to changes in the signal level of the input. An AGC circuit incorporating a hysteresis in the feedback loop is also disclosed.
    Type: Application
    Filed: April 2, 2001
    Publication date: December 12, 2002
    Applicant: Itran Communications Ltd.
    Inventors: Marian Kozak, Dan Raphaeli
  • Publication number: 20020160734
    Abstract: A direct downconversion receiver architecture having a DC loop to remove DC offset from the signal components, a digital variable gain amplifier (DVGA) to provide a range of gains, an automatic gain control (AGC) loop to provide gain control for the DVGA and RF/analog circuitry, and a serial bus interface (SBI) unit to provide controls for the RF/analog circuitry via a serial bus. The DVGA may be advantageously designed and located as described herein. The operating mode of the VGA loop may be selected based on the operating mode of the DC loop, since these two loops interact with one another. The duration of time the DC loop is operated in an acquisition mode may be selected to be inversely proportional to the DC loop bandwidth in the acquisition mode. The controls for some or all of the RF/analog circuitry may be provided via the serial bus.
    Type: Application
    Filed: December 21, 2001
    Publication date: October 31, 2002
    Inventors: Tao Li, Christian Holenstein, Inyup Kang, Brett C. Walker, Paul E. Peterzell, Raghu Challa, Matthew L. Severson, Arun Raghupathy, Gilbert Christopher Sih
  • Patent number: 6363127
    Abstract: Automatic gain control (AGC) methods and apparatus suitable for use in orthogonal frequency division multiplexing (OFDM) receivers are described. One AGC method includes the steps of repeatedly performing a first AGC process which adjusts amplifier gain based on determining that a signal level of multiple time sample values is outside a limit set by a first predefined threshold; and repeatedly performing a second AGC process which adjusts the amplifier gain based on determining that a signal level of multiple frequency sample values associated with a plurality of pilot tones is outside a limit set by a second predefined threshold. Preferably, the first AGC process is performed repeatedly at a first rate and the second AGC process is performed repeatedly at a second rate that is less than the first rate.
    Type: Grant
    Filed: June 9, 2000
    Date of Patent: March 26, 2002
    Assignee: AT&T Wireless Services, Inc.
    Inventors: Jari M. Heinonen, Michael R. Hirano, Hongliang Zhang
  • Publication number: 20010046846
    Abstract: A baseband signal processing means for performing baseband processing of a received signal produces and updates a gain control signal for controlling gain used in a gain varying means. Time intervals for the update of the gain control signal are set on the basis of a rate of change over time in the power level of the received signal. As an absolute value of a slope of an amount of change in the power level of the received signal per unit time is larger, a shorter time interval for the update of the gain control signal is set. As an absolute value of a slope of an amount of change in the power level of the received signal per unit time is smaller, a longer time interval for the update of the gain control signal is set.
    Type: Application
    Filed: March 27, 2001
    Publication date: November 29, 2001
    Applicant: NEC Corporation
    Inventor: Soichi Tsumura
  • Patent number: 6324229
    Abstract: An automatic digital level control adjuster (310) processes an analog input signal (305) to adjust its signal level, based on input (311) from a digital module (330) that is clocked by a clock signal (325) derived from the analog signal (305). Preferably, the input (311) from the digital module (330) changes at a rate dependent on the clock signal (325), and such changes are made during crossovers of the analog signal across a predetermined zero reference threshold.
    Type: Grant
    Filed: May 11, 1998
    Date of Patent: November 27, 2001
    Assignee: Motorola, Inc.
    Inventor: Charles E. Browder
  • Patent number: 6317589
    Abstract: A gain compensation loop suitable for a quadrature receiver comprises a signal strength comparator having in-phase and quadrature signals fed to respective inputs of the signal strength comparator. The signal strength comparator outputs a signal which represents the difference in strength between the in-phase and quadrature signals. The signal output from the signal strength comparator is input to a gain adjuster which adjusts the gain of the in-phase or quadrature signal in accordance with the signal from the signal strength comparator to bring the in-phase and quadrature signals towards the same strength.
    Type: Grant
    Filed: May 28, 1998
    Date of Patent: November 13, 2001
    Assignee: Nokia Mobile Phones Limited
    Inventor: Adrian Philip Nash
  • Patent number: 6295445
    Abstract: An RF signal received from an antenna is supplied to an RF portion. The RF portion mixes down the RF signal to an IF signal. An RSSI circuit of an automatic gain controlling circuit portion converts the received RF signal into a DC component and detects the electric field intensity of the received signal. A level determining unit has two threshold values of the input level. The level determining unit controls the variable amount of a gain varying unit corresponding to the input level. An averaging process circuit averages a digital signal in a predetermined time period T and controls the variable amount of the gain varying unit 3 so that the average value converges at a digital value with n bits that represent a predetermined amplitude level. A BB portion demodulates the digital signal that has been modulated on the transmitting side to original information.
    Type: Grant
    Filed: June 28, 1999
    Date of Patent: September 25, 2001
    Assignee: NEC Corporation
    Inventor: Hiroyuki Uesugi
  • Patent number: 6240283
    Abstract: A method and apparatus is shown for controlling the input gain of a receiver wherein the input gain is controlled by sampling an amplified data signal during a time interval when a positive-going feedback transient from an output terminal of the receiver to an input terminal of the receiver is not present in the amplified data signal. An embodiment of a receiver circuit according to the present invention includes an input amplifier having variable gain determined by a gain control signal, a comparator which compares the amplified data signal from the input amplifier to a detection threshold voltage to produce a demodulated data signal and an analog delay circuit which delays the amplified data signal by a predetermined time interval to produce a delayed data signal. A switch is driven by the demodulated data signal to sample the delayed data signal for input to an automatic gain control circuit.
    Type: Grant
    Filed: August 7, 1997
    Date of Patent: May 29, 2001
    Assignee: Integration Associates, Inc.
    Inventor: Wayne T. Holcombe
  • Patent number: 6226504
    Abstract: A receiving apparatus is disclosed which can cope with the fluctuation of input level of RF signal appropriately and has a first amplifier means wherein the amplifying and the attenuating of input signal are selectively performed and for processing the signal in a communication band handled by this apparatus, and a second amplifier means for gain-variably amplifying a signal, which is a signal converted from the output of the first amplification means 13 into the intermediate frequency signal or base band signal, the gain of the second amplifier means being set based on the detection of output level of the second amplifier means, and the selection of the amplification or attenuation in the first amplifier means, (13) being performed based on the detection level of output from the first amplifier means.
    Type: Grant
    Filed: October 27, 1998
    Date of Patent: May 1, 2001
    Assignee: Sony Corporation
    Inventor: Kotaro Takagi