Separate Automatic Gain Control Signals Patents (Class 455/247.1)
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Patent number: 6995806Abstract: An amplifier (125) includes a gain stage (210) for amplifying a signal received by the amplifier (125). The amplifier (125) also includes an AGC circuit (400) that adjusts the amplification of the gain stage (210) and that includes a comparator (440) for determining whether the input signal is one of a digital pilot signal and one of an analog pilot signal. The AGC circuit (400) processes both digital and analog pilot signals and automatically adjusts the processing method depending upon the type of pilot signal.Type: GrantFiled: August 4, 2000Date of Patent: February 7, 2006Assignee: Scientific-Atlanta, Inc.Inventors: Saleh Al-Araji, John A. Ritchie, Jr.
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Patent number: 6996386Abstract: An A-rail circuit outputs a control signal AGCOUTA whereas a B-rail circuit outputs a control signal AGCOUTB in an AGC circuit. AGCOUTA controls an AGC amplifier (A) while AGCOUTB controls an AGC amplifier (B). A difference value between a power of an input signal and (an amount of variable adjustment SWEEP+a power reference value AGCR). If an output signal of a loop filter in the A-rail circuit attains AGCARAIL>AGCATOB, AGCARAIL=AGCATOB is fixed, and AGCBRAIL is adjusted based on the difference value. If an output signal of a loop filter in the B-rail circuit attains AGCBRAIL<AGCBTOA, AGCBRAIL=AGCBTOA is fixed, and AGCARAIL is adjusted based on the difference value. A control circuit in the AGC circuit acquires a bit error rate, identifies a value of SWEEP allowing a minimum bit error rate, and fixes the value of SWEEP at the identified value.Type: GrantFiled: March 5, 2003Date of Patent: February 7, 2006Assignee: Renesas Technology Corp.Inventor: Kazuya Yamanaka
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Patent number: 6904273Abstract: An apparatus for providing automatic gain control for use in a satellite terminal of a satellite communication system capable of transmitting a plurality of different modes of data. The apparatus includes a demodulator circuit having an analog to digital converter; a first variable attenuator having an attenuation value set on the basis of a measured power level of a predetermined data signal; and a second variable attenuator having an attenuation value set on the basis of the mode of data being received by the satellite terminal, where each of the data modes have a corresponding predetermined attenuation value associated therewith which is utilized as the attenuation value of the second variable attenuator when the satellite terminal receives the data mode.Type: GrantFiled: January 10, 2002Date of Patent: June 7, 2005Assignee: Hughes Electronics CorporationInventors: J. Mark Steber, Richard Clewer, Kumud Patel, Bala Subramaniam
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Patent number: 6904274Abstract: A soft limiter for a signal processor includes a variable-gain amplifier, and a threshold detector. The variable-gain amplifier includes a signal input for receiving an input signal, a signal output for providing an output signal representative of the input signal, and a gain control input for controlling a gain of the amplifier. The threshold detector is coupled to the gain control input, and includes a control input for receiving a control variable thereon. The threshold detector is configured to set the gain of the amplifier to a first gain value when the control variable exceeds a threshold value, and to set the gain to a second gain value different from the first gain value when the control variable is less than the threshold value.Type: GrantFiled: November 21, 2001Date of Patent: June 7, 2005Assignee: Research In Motion LimitedInventors: Sean B. Simmons, Zoltan Kemenczy
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Patent number: 6862325Abstract: The invention relates to a multi-standard digital receiver, in a digital video transmission system. It comprises a channel decoder for protecting a transmitted signal against channel transmission errors, the channel decoder comprising: a set of co-processors including at least 3 clusters of programmable co-processors for executing the functions of a digital front-end block (DFE), a channel correction block (CHN) and a forward error correction block (FEC), respectively, a general purpose processor (DSP) for managing control, synchronization and configuration of the channel decoder, and a memory (SM) shared between the clusters and the general purpose processor.Type: GrantFiled: October 17, 2001Date of Patent: March 1, 2005Assignee: Koninklijke Philips Electronics N.V.Inventors: Olivier Gay-Bellile, Xavier Marchal, Geoffrey Francis Burns, Krishnamurthy Vaidyanathan
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Patent number: 6728524Abstract: An automatic gain control circuit includes a power calculator for calculating power of a modulation wave supplied to a demodulator; a power comparator for comparing the power calculated by the power calculator with ideal power of a modulation scheme of the modulation signal; a first gain controller for carrying out gain control of a first AGC amplifier in response to an output of the power comparator; and a second gain controller for carrying out gain control of the second AGC amplifier in response to the output of the power comparator. The automatic gain control circuit can solve a problem of a conventional AGC circuit in that precision gain distribution cannot be achieved to the two AGC amplifiers because the two AGC amplifiers are controlled by a single control signal output from the automatic gain control circuit.Type: GrantFiled: December 19, 2000Date of Patent: April 27, 2004Assignee: Renesas Technology Corp.Inventors: Kazuya Yamanaka, Syuji Murakami
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Patent number: 6535560Abstract: A receiver is adaptively calibrated by using a coherent reference signal. The reference signal is selected to be offset from a center frequency of the calibration signal such that the resultant product is offset from baseband by some small amount. The resultant product is used to determine a next value of the calibration parameters.Type: GrantFiled: June 3, 1999Date of Patent: March 18, 2003Assignee: Ditrans CorporationInventor: Wesley K. Masenten
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Patent number: 6498927Abstract: A wireless or wired communication system and method is provided including a transmitter and a receiver. A RF communication system in accordance with the present invention includes an apparatus and gain control method between RF receiver and baseband modem in case of a plurality of gain stages inside a receiver. The gain of each stage can be controlled by an integrated gain controller. The gain controller monitors the signal level of each gain stage to place its gain to optimal value. The gain control apparatus and method can be implemented in a digital AGC system. The gain controller accepts a signal implementing gain control and thus there is no stability issue. When distributed gain stages are present inside a related art receiver and separate gain control loops are used, stability issues can arise. In a preferred embodiment of an apparatus and method, the baseband modem decides the amount of gain control and adjusts the gain of certain gain stages by the proper amount.Type: GrantFiled: August 29, 2001Date of Patent: December 24, 2002Assignee: GCT Semiconductor, Inc.Inventors: Suwon Kang, Jeong-Woo Lee, Joonbae Park
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Patent number: 6487419Abstract: Methods, systems and computer program products are provide which control the operation of a receiver of a wireless device so as to reduce the power consumption of the receiver by setting the third order intercept point of a low noise amplifier based upon at least one of a strength of a signal received by the wireless device or a transmission power of a transmitter of the wireless device. Furthermore, the gain of the low noise amplifier may also be set based upon received signal strength or transmitter power. Also, the gain of an amplifier associated with a mixer of the receiver may be set based upon received signal strength or transmitter power. Preferably, multiple power modes are provided to tailor the power consumption to the operating conditions of the wireless device.Type: GrantFiled: August 6, 1998Date of Patent: November 26, 2002Assignee: Ericsson Inc.Inventor: John G. Freed
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Patent number: 6418303Abstract: A fast attack Automatic Gain Control (AGC) loop (100) having the capability to selectably shape one or more decaying current sources (242, 260) contained within an off-channel feedback loop and an on-channel feedback loop of the AGC loop by sequentially and selectively switching out weighted transistors (Tr0, Tr1, Tr2, . . . , Tr10) of a plurality of weighted current mirrors (313, 379, 453, 519) at predetermined intervals (t0, t1, t2, . . . , t10).Type: GrantFiled: February 29, 2000Date of Patent: July 9, 2002Assignee: Motorola, Inc.Inventors: Dane E. Blackburn, Raul Salvi
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Publication number: 20020025792Abstract: An AGC amplifier circuit has a fixed-gain amplifier, of which the gain is not controlled by an AGC voltage, and a variable-gain amplifier, of which the gain is controlled by the AGC voltage, that are connected in parallel. When the AGC voltage is within a predetermined voltage range, the overall gain of the AGC amplifier circuit is varied by the variable-gain amplifier; however, when the AGC voltage is outside the predetermined voltage range, the overall gain is kept constant by the fixed-gain amplifier. The minimum gain of the AGC amplifier circuit is set to be equal to the gain of the fixed-gain amplifier.Type: ApplicationFiled: August 7, 2001Publication date: February 28, 2002Inventor: Hiroshi Isoda
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Publication number: 20010051512Abstract: A low cost redundancy scheme for the radio frequency front end of a wireless hub that requires a minimum number of down converters and upstream receivers to implement. The redundancy scheme may also be used as a back-up support for any upstream channel that is provided with a greater amount of data than the other upstream channels.Type: ApplicationFiled: January 26, 2001Publication date: December 13, 2001Applicant: VYYO LTD.Inventors: Eric K. Wilson, Hillel Hendler
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Patent number: 6324387Abstract: A controlled receive device is disclosed having an amplifier circuit, which receives an input signal, and a control circuit which receives the input signal and outputs a controlled signal to a receiver. The receiver outputs an output signal. A controller varies the gain of the amplifier circuit in response to levels of the controlled signal and the output signal. The control circuit outputs a controlled indicator signal indicative of a level of the controlled signal and the receiver outputs an output indicator signal indicative of the output signal level. The controlled indicator signal and the output indicator signal are compared using comparators, to respective reference or threshold levels for producing control signals used by the controller for varying the amplifier gain.Type: GrantFiled: December 29, 1998Date of Patent: November 27, 2001Assignee: Philips Electronics N.A. Corp.Inventors: Farbod Kamgar, Antoine J. Rouphael, Mariam Motamed
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Patent number: 6181201Abstract: The present invention is a novel and improved AGC circuit which is generically configurable to accommodate a variety of AGC amplifier configurations to enhance IP3 performance and reduce required amplifier current, while providing a received power estimate which remains valid regardless of how the gain or attenuation is distributed among the various amplifiers. A generic control circuit maintains this power estimate in a single overall gain amplification value by distributing gain to at least two amplifier stages in response to that value. By programming or hard coding a few key parameters, a generic control circuit can control a wide variety of amplifier configurations. Among the configurations supported are switched LNA, switched variable gain LNA, variable gain, and a decoupled IF and UHF variable gain LNA configuration. The invention is extendable to include multi-stage amplifier configurations.Type: GrantFiled: October 11, 1999Date of Patent: January 30, 2001Assignee: Qualcomm IncorporatedInventor: Peter J. Black