Abstract: This document discloses, among other things, a front end circuit having a selectable center frequency. The center frequency is selected based on a control signal proportional to a phase difference between a reference frequency and an amplifier output. A resonant frequency of a tank circuit coupled to the amplifier is tuned using the control signal.

Abstract: The invention provides a low noise amplifier. The low noise amplifier includes a first transistor, a second transistor, and a first resistor. The first transistor has a gate to receiving a radio frequency input signal, wherein the source of the first transistor is coupled to a ground voltage. The second transistor has a drain to output a radio frequency output signal, wherein the gate of the second transistor is coupled to a first reference voltage. The first resistor is coupled between the drain of the first transistor and the source of the second transistor.

Abstract: An output power detection circuit including a detection circuit is disclosed. The output power detection circuit further includes a summing network, wherein a first voltage input of the summing network is capable of receiving a voltage that is proportional with a current flowing through an output stage of an RF amplifier circuit, a second voltage input is coupled with the detection circuit, and an output is capable of providing a summing voltage.

Abstract: Embodiments of the present invention include a low phase noise oscillator circuit using a current-reuse technique to reduce power consumption and improve phase noise, where the oscillator circuit comprises a first VCO coupled to a second VCO, and the outputs of the first and second VCOs are coupled with passive elements, such as capacitors. The overall power consumption of both the first and second VCOs is about the same as a single VCO. Furthermore, the phase noise is lowered by around 3 dB.

Abstract: A transceiver is described that includes a power amplifier (PA), a low noise amplifier (LNA), and an impedance matching circuit having a first and second differential output node. The first and second differential output nodes are coupled to outputs of the PA and to inputs of the LNA. The impedance matching circuit provides a load impedance to the outputs of the PA. The transceiver further includes a first impedance device having an output impedance coupled between the first and second differential output nodes. In this way, the combination of the output impedance and the load impedance matches with an impedance at the inputs of the LNA.

Abstract: An amplifier assembly and also a receiver including such an amplifier assembly is disclosed, wherein the amplifier includes a programming input for setting the gain thereof. The signal level at the output of the amplifier is compared with a reference level and a counter is incremented in a step-by-step fashion such that the gain in the amplifier is reduced for as long as the output level lies above the reference level. The amplifier assembly enables frequency-dependent received field strength fluctuations that occur in frequency hopping methods to be corrected in a manner dependent on the conditions in the current time slot. The assembly is also suitable for modulation methods that use a modulation with phase and amplitude variation.

Abstract: A difference between an output current signal (mos) of the mixing circuit (MC) and a current from a controlled current source (CCS) is conducted to an input of an operational amplifier (A). A control voltage (cv) for said current source is a voltage at the output of the operational amplifier (A) being filtered by a low-pass filter, whose limiting frequency equals a low frequency limit of the modulation signal in the received signal (rs). The method is speeded up in that the limiting frequency of the low-pass filter is increased by two to three orders of magnitude at the beginning and is gradually lowered to said value. A rather short time duration of the transient process is achieved so that the working point with a low voltage of the DC component and low-frequency components is set at least five times faster than so far.

Abstract: Gain setting can be performed at high speed while reducing DC offset due to a filter cutoff frequency changeover without the need for input signal muting. A filter circuit having first and second filters is capable of allowing settings of first and second cutoff frequencies. First and second filter switch circuits and a charging circuit including a charging resistor and a charging switch are provided. For a first time period, the first switch circuit is controllably turned on while the second switch circuit is controllably turned off, thereby providing the first filter function. For a second time period, the first switch circuit is controllably turned off while the second switch circuit is controllably turned on, thereby providing the second filter function. For the first time period, the charging switch is controllably turned on so that the second capacitor is charged via the charging resistor.

Abstract: A signal processing device suppresses a DC offset without omission of a low-frequency component of a signal in a receiver in a direct conversion system. The signal processing device includes an input terminal 29, a gain amplifier 31 that amplifies an input signal to generate an output signal, comparators 32 and 33 each of which compares an output signal level with a reference value, a capacitor 37, current source circuits 34 and 35, one of which charges or discharges electric charges stored in the capacitor when the output signal level falls outside a reference range according to results of comparisons by the comparators, a variable current source 36 through which current to be flow is controlled according to a potential at the capacitor, and a load circuit 38 that is connected between the input terminal and the variable current source and supplies a bias to the input terminal, together with the variable current source.

Abstract: A single-ended-to-differential mixer includes a differential input circuit having a single-ended input. The differential input circuit is responsive to a single-ended input signal to generate first and second signals. The single-ended-to-differential mixer includes a passive tank circuit in communication between a reference voltage and the differential input circuit. The single-ended-to-differential mixer includes a mixer circuit in communication with the differential input circuit and responsive to the first and second signals and a second input signal to generate a differential mixer output signal.

Abstract: A multi-band low noise amplifier (LNA) includes multiple low noise amplifying circuits configured to selectively operate in corresponding frequency bands. The low noise amplifying circuits include corresponding amplifying units and degenerating units. The degenerating units include first inductors, which are arranged in loop patterns isolated from each other on a same layer, such that one first inductor surrounds at least one other first inductor. A current flows through a selected first inductor included in a selected low noise amplifying circuit of the low noise amplifying circuits.

Abstract: In one embodiment, the present invention includes a method for receiving a radio frequency (RF) signal and mixing the RF signal with a master clock to obtain a mixed signal, cyclically rotating the mixed signal to each of N gain stages for at least one cycle of the master clock, and summing the outputs of the N gain stages to provide an output signal.

Abstract: An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local oscillator (LO) generator, a controller, and a self-testing unit. All of these components can be packaged for integration into a single IC including components such as filters and inductors. The controller for adaptive programming and calibration of the receiver, transmitter and LO generator. The self-testing unit generates is used to determine the gain, frequency characteristics, selectivity, noise floor, and distortion behavior of the receiver, transmitter and LO generator. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.

Abstract: A radio frequency signal handling device and a mobile communication device comprising such a radio frequency signal handling device. The radio frequency signal handling device comprises a first terminal interfacing external entities in the form of an input where radio frequency signals are to be received, at least one signal scaling unit having a first end where a signal provided by a terminal interfacing external entities is received, and one signal detector provided for each signal scaling unit and being connected to a second end of the corresponding signal scaling unit for detecting a signal provided by this signal scaling unit. The signal scaling unit only includes passive reactive components and comprises at least one such passive reactive component.

Abstract: An amplifier comprises a source degeneration inductance and at least two field effect transistors coupled in parallel and having mutually different gate biasing. Source connections of the field effect transistors are coupled along different positions of the source degeneration inductance.

Abstract: A radio frequency (RF) front-end includes a plurality of power amplifier modules and a plurality of impedance matching circuits. Each of the plurality of impedance matching circuits includes an input connection and an output connection, wherein outputs of the plurality of power amplifier modules are coupled to corresponding input connections of the plurality of impedance matching circuits to provide a desired loading of the plurality of power amplifier modules and wherein the output connections of the plurality of impedance matching circuits are coupled together to add power of the plurality of power amplifiers.

Abstract: To provide an antenna device adapted to interrupt jamming waves and enable cost reduction, a high-pass filter (HPF) adapted to interrupt general-use frequencies at least near a low-frequency side of a pass band intended for use is provided as a frequency selection circuit 11A on the antenna 1 side in an initial-stage LNA 2A. By setting a low-side cutoff frequency to 900 MHz, it is possible to prevent reception of frequencies in a general-use frequency band with a high frequency of use as jamming waves. That is, for example, it is possible to prevent reception of frequencies in 800 to 900 MHz band for mobile cellular telephones and higher harmonics thereof as jamming waves. Further, since an additional filter is not required in the antenna device, the circuit structure can be simplified.

Abstract: A mixer arrangement includes a mixer cell coupled by a signal input to a mixer input, and is embodied for frequency conversion of a signal present on the input side to an intermediate frequency. A first current source is coupled to the signal input of the mixer cell, and a second current source is coupled to a signal output of the mixer cell. The mixer arrangement furthermore includes a sensor circuit embodied for detection and for outputting of a value which is derived from a current of one of the current sources. A desired value regulating circuit is coupled by a feedback input to the sensor circuit and is designed for outputting a regulating signal to the one current source derived from a comparison of a signal present at a feedback input with a desired value.

Abstract: Controlling a tower-top low noise amplifier (TTLNA) without transmit mode or receive mode timing control signals from a base station. The TTLNA system and associated components autonomously determine the proper mode of operation (transmit/receive), and automatically control the operation of a low noise amplifier (LNA) to prevent signal distortion and/or damage to the wireless system hardware. A preferred method comprises: at a TTLNA, measuring a transmit time period based on detecting radio frequency (RF) transmit signal energy; determining a receive time duration based on the measured time period and a predetermined frame time; and, configuring the TTLNA to a receive mode by placing a low noise amplifier into a receive signal path during the determined receive time duration.

Abstract: A receiver has an offset application circuit for applying a known offset to an input signal, and a decision circuit for comparing the offset-applied input signal with a reference voltage. The level of the input signal is determined based on the known offset and on the result output from the decision circuit. With this configuration, a large common mode voltage can be eliminated in a circuit used for signal transmission.

Abstract: This invention relates to a system (100) for communicating wirelessly. The system (100) comprises an inductive antenna circuit (110) for transmitting and receiving inductively coupled signals, a driving means (102, 104) connected to inductive antenna circuit (110) and driving the inductive antenna circuit (102, 104) during a transmit mode, and comprises an amplifier means (112) connected to the inductive antenna circuit (110) and detecting and amplifying received signals differentially a receiving mode.

Abstract: A semiconductor device includes a p-type semiconductor layer and an n-type semiconductor layer that are joined by sandwiching a depletion layer with a thickness that allows transmission of a plurality of electrons and holes by direct-tunneling.

Abstract: A front end and a high frequency receiver (1) provided therewith are described, which front end comprises a quadrature low noise amplifier (2-1, 2-2) as a low noise amplifier. A high isolation between local oscillators (6-1, 6-2) and quadrature mixers (3-1, 3-2) is achieved thereby, reducing a DC offset at mixer outputs (7, 8). The quadrature low noise amplifier may be implemented as a differential class AB cascade arrangement of MOST or FET semiconductors (15). A low distortion receiver (1) having a high linearity is the result.

Abstract: A broadband signal amplifier includes one of more broadband amplifier circuits, each dynamically controlled in response to a total power level of signals applied thereto to reduce linearity in response to a reduction of input signal strength. A filter may couple the output of the broadband amplifier circuits to each other to form a tandem arrangement. Power detectors are connected to detect and provide outputs indicative of the total power levels of the signals applied to respective broadband amplifiers. A control unit is connected to and receives the output from the power detectors and, in response, provides a control signals to the broadband amplifier circuit so as to operate each over portions of their operating characteristic curves that provide only that degree of linearity necessary to limit distortion to a predetermined or dynamically adjustable maximum acceptable level.

Abstract: To provide an antenna device adapted to interrupt jamming waves and enable cost reduction, a high-pass filter (HPF) adapted to interrupt general-use frequencies at least near a low-frequency side of a pass band intended for use is provided as a frequency selection circuit 11A on the antenna 1 side in an initial-stage LNA 2A. By setting a low-side cutoff frequency to 900 MHz, it is possible to prevent reception of frequencies in a general-use frequency band with a high frequency of use as jamming waves. That is, for example, it is possible to prevent reception of frequencies in 800 to 900 MHz band for mobile cellular telephones and higher harmonics thereof as jamming waves. Further, since an additional filter is not required in the antenna device, the circuit structure can be simplified.

Abstract: In one embodiment, the present invention includes a mixer circuit to receive and generate a mixed signal from a radio frequency (RF) signal and a master clock signal, a switch stage coupled to an output of the mixer circuit to rotatingly switch the mixed signal to multiple gain stages coupled to the switch stage, and a combiner to combine an output of the gain stages.

Abstract: A discrete time receiver includes a low noise transconductance amplifier (LNTA), a discrete time sampler, a passive discrete time circuit, and a switched capacitor amplifier. The LNTA amplifies a received RF signal and provides an amplified RF signal. The discrete time sampler samples the amplified RF signal (e.g., with multiple phases of a sampling clock) and provides first analog samples. The passive discrete time circuit decimates and filters the first analog samples and provides second analog samples. The switched capacitor amplifier amplifies the second analog samples and provides third analog samples. The discrete time receiver may further include a second passive discrete time circuit, a second switched capacitor amplifier, and an analog-to-digital converter (ADC) that digitizes baseband analog samples and provides digital samples. The discrete time receiver can flexibly support different system bandwidths and center frequencies.

Abstract: A RF device such as a tower mounted amplifier (TMA), mast-head amplifier (MHA), or Tower Mounted Boosters (TMB) includes a housing having a plurality of cavities and an input and an output, the input being coupled to the antenna and the output being coupled to a base station. The housing includes a transmission path holding multiple coaxial resonators. The housing further includes multiple receive paths including at least one path having a plurality of cavities, each cavity containing a dielectric resonator. The metallic transmit resonator nearest the antenna input is coupled to the first dielectric resonator via a common resonant wire. The last dielectric resonator in the receive path is coupled to a first metallic resonator of a downstream clean-up filter via another common resonant wire.

Abstract: A low noise amplifier in an integrated circuit, the circuit having a digital portion and an analog portion on a common substrate, the digital portion having at least one clocking frequency, includes an input configured to receive a signal at a tuned frequency and an output circuit. The output circuit is configurable to operate in either a single-ended mode or a pseudo differential-ended mode, wherein the output circuit is configured in the pseudo differential-ended mode when the tuned frequency is substantially similar to the at least one clocking frequency or one of its harmonics and otherwise configured in the single-ended mode.

Abstract: An apparatus and method for detecting an output power level of an optical receiver, in order to hold output signal levels constant over changing input optical levels. A photodetector detects an optical signal, and a current from the photodetector is applied an amplifier. The amplifier may be either a differential trans-impedance amplifier, or a dual trans-impedance amplifier coupled to a differential output amplifier. An output of the amplifier is applied o a signal detector, wherein an output signal of the signal detector is an indication of an output power level of the optical receiver.

Abstract: An amplifier assembly and also a receiver including such an amplifier assembly is disclosed, wherein the amplifier includes a programming input for setting the gain thereof. The signal level at the output of the amplifier is compared with a reference level and a counter is incremented in a step-by-step fashion such that the gain in the amplifier is reduced for as long as the output level lies above the reference level. The amplifier assembly enables frequency-dependent received field strength fluctuations that occur in frequency hopping methods to be corrected in a manner dependent on the conditions in the current time slot. The assembly is also suitable for modulation methods that use a modulation with phase and amplitude variation.

Abstract: Controllable operational transconductance power amplifier (controllable power OTA) including an input stage receiving a differential input signal (Ovin) and deriving therefrom first (i1) and second (i2) low power current signals being coupled to first (ccs1) and second (ccs2) current controlled output current sources being arranged in class B push pull configuration. To obtain an effective gain control while securing power efficiency and linearity, the overall gain of the power OTA is controlled by varying the gain or transconductance of the input stage (c15) and by the use of means for bi-directionally rectifying said first (i1) and second (io) low power current signals and providing in mutual alternation power amplification of said first (i1) and second (i2) low power current signals into first (I01) and second (Io2) mutually exclusive high power current output signals, which are supplied through a current summer to a current output (I0) of said linear power amplifier.

Abstract: Aspects of a system for a power amplifier with an on-package matching transformer may include a DC/DC converter that enables generation of a bias voltage level within an IC die based on an amplitude of an input signal to a PA circuit within the IC die. The bias voltage level may be applied to a transformer, which is external to the IC die but internal to an IC package containing the IC die and/or a circuit board containing the IC package. One or more amplifier bias voltage levels, derived from the bias voltage level applied to the transformer, may be applied to the PA circuit.

Abstract: In one embodiment, the present invention includes an amplifier having an input to receive a radio frequency (RF) signal from an output node of a source. An input stage coupled to the amplifier input may include one or more components to aid in processing of incoming signals. One such component coupled between the source and the input of the amplifier is a coupling capacitor used to maintain a bias voltage of the amplifier at a different potential than a DC voltage of the output node. In certain applications, the amplifier and the coupling capacitor may be integrated on a single substrate.

Abstract: A receiver is disclosed. The receiver includes: a tunable low noise amplifier (LNA), the tunable LNA comprising: a plurality of LNAs for receiving and amplifying a plurality of frequency bands respectively; a plurality of first switches respectively coupled to the plurality of LNAs; a plurality of LC loads, respectively coupled to the plurality of first switches; a plurality of buffers, respectively coupled to the plurality of first switches; and a plurality of second switches, respectively coupled to the plurality of LC loads and an LO signal; a power detecting circuit for determining a signal power level corresponding to the LO signal; a first switch unit; and a controller, for isolating the output of the plurality of LNAs, selectively decoupling at least one of the LC loads according to the signal power level of the LO signal, and routing the LO signal to the second switches during calibration mode.

Abstract: An analog multi-gigabit receiver and/or transceiver can be implemented for the reception and demodulation of multi-gigabits quadrature phase shift keying (QPSK) modulated using a CMOS (complementary metal-oxide semiconductor) process. Further, an analog multi-gigabit receiver and/or transceiver can be implemented for the reception and demodulation of multi-gigabits binary phase shift keying (BPSK), minimum shift keying (MSK), and/or amplitude shift keying (ASK) signal modulated in CMOS processes.

Abstract: A RF differential gain stage has cross-coupled capacitors between input and output nodes of the amplifier stage to boost gain. The gain boost allows cancellation of the series resistance of an inductive load of the amplifier stage.

Abstract: A FM receiver comprises an IF filter, a demodulator and a decoder. The IF filter generates an RSSI and a FM modulated signal in response to a FM signal. The demodulator comprises a duty-to-voltage amplifier for amplifying a peak of a MPX signal. The duty-to-voltage amplifier comprises a current source, a switch and a current splitter. The current source generates a current. The switch controls a flow of the first current in response to a PWM signal. The current splitter splits the flow of the current into a sub-flow in response to the RSSI. The peak of the MPX signal is proportional to the sub-flow. The decoder receives the MPX signal to generate an audio signal to play sound.

Abstract: A power amplifier module includes a transmit power probability module and a power amplifier circuit. The transmit power probability module is coupled to determine a transmit power level probability. The power amplifier circuit is coupled to amplify an outbound radio frequency (RF) signal at a power level in accordance with the transmit power level probability and a desired transmit power level.

Abstract: A radio frequency circuit according to the present invention, is a radio frequency circuit for amplifying a radio frequency signal, the radio frequency circuit comprising: an amplifier circuit for amplifying the radio frequency signal and outputting an amplified signal obtained by the amplification of the radio frequency signal; a load circuit connected to an output of the amplifier circuit; a plurality of transmission lines; a selection circuit for selecting a transmission line among the plurality of transmission lines in accordance with a predetermined parameter of the amplified signal so as to connect the selected transmission line to an output of the load circuit; and a conversion circuit for converting, into a predetermined load impedance, a load impedance looking from the amplifier circuit toward an output side of the amplifier circuit, the conversion being performed in the transmission line selected by the selection circuit.

Abstract: A mixer comprises a differential input circuit that is configured to receive an input signal. The mixer comprises a tank circuit including a tuning capacitor arranged in parallel with an inductor. A resonant frequency of the inductor and tuning capacitor is substantially centered around a predetermined frequency of the input signal. The mixer comprises a mixer circuit that communicates with the differential input circuit and that is configured to receive first and second current signals and a second input signal. The mixer circuit is configured as a Gilbert cell double-balanced switching mixer for generating a differential mixer output signal as a product of the first and second current signals and the second input signal.

Abstract: The invention relates to a low power radio frequency receiver which comprises: (a) an antenna for receiving a first radio frequency signal; (b) a radio frequency amplifier for amplifying the first radio frequency signal received by said antenna; (c) an oscillator for generating a second radio frequency signal having a predefined frequency and a predefined duty cycle to be mixed with said first radio frequency signal received by said antenna; (d) a mixer for mixing the first amplified radio frequency signal with second radio frequency signals and generating a third radio frequency signal; (e) an intermediate frequency filter for passing one or more intermediate frequencies of said third radio frequency signal and attenuating other frequencies of said third signal that are lower or higher than its cutoff frequencies, characterized in that it further comprises: (f) one or more switches for periodically and synchronously switching ON and OFF one or more of said radio frequency amplifier, said oscillator, and said

Abstract: A method for producing a transmission signal, wherein an input signal (Vd(t)), which is to be amplified, is fed to a power amplifier (PA) which outputs the signal in an amplified form (va(t)). A reproduction thereof is made and allocates a specific pre-distortion input signal (vd(t)) value to a specific input signal (vd(t)) value. A corresponding pre-distortion value is then determined for the input signal (vd(t)) and the corresponding pre-distortion value is applied to the input signal (vd(t)) in order to feed the pre-distorted input signal to the power amplifier (PA). Subsequently, the crest factor (CF) is calculated from the output signal (vd(t)) of the power (PA) and the reproduction or the value thereof if the determined crest factor departs from a predetermined range of values.

Abstract: A method significantly reduces the average power for radio communication in a communication system, such as a system that has applications requiring low communication latency. The method may use a low power radio communication circuit (e.g., a non-heterodyne receiver) to wait for a communication request, taking advantage of the low power consumption of the radio communication circuit. Subsequent to receiving and validating the communication request, the communication system may switch to a more efficient—but higher power—communication circuit. Thus, effective communication is achieved without making undesirable tradeoffs, such as reduced sensitivity.

Abstract: A radio frequency (RF) receiver includes an amplifier stage, a blocking module, and a down conversion module. The amplifier stage amplifies an inbound RF signal (includes a desired component and a blocking component) to produce an amplified inbound RF signal. The blocking module generates an oscillation corresponding to a frequency of the blocking component and filters the amplified inbound RF signal based on the oscillation to substantially attenuate the blocking component and to pass, substantially unattenuated, the desired component. The down conversion module converts the desired RF signal component into a baseband or near baseband inbound signal.

Abstract: In a SPDT switch, a resistor for leak path is connected between a terminal for antenna and a reference potential. The resistor for leak path allows charge capacitances accumulated in electrostatic capacitor elements provided as DC cut capacitors connected to transmission signal terminals and reception signal terminals to be discharged and allows rapid lowering of a potential at the terminal for antenna. In the SPDT switch, a switching characteristic is improved and a delay in the rising edge of a low-power slot which comes after a high-power slot is reduced.

Abstract: Switching characteristics in an SPDT switch are improved to reduce the rise delay in a low power slot following after a high power slot. Control terminals of an SPDT switch are respectively provided with backflow prevention circuits. The backflow prevention circuit is configured to have two transistors and a diode. In a transmission mode, for example, when a time slot where a high power passes through transistors is followed by a time slot where a low power passes through, the electric charges accumulated in the gates of the transistors are blocked. In the case where the transistors are in the OFF state, the electric charges accumulated in the gates of the transistors are immediately discharged to allow the transistors to be completely turned OFF.

Abstract: The invention relates to a preamplifier circuit with at least one transistor that couples a signal input to a signal output. The signal input is supplied with a radio-frequency signal. In addition, the preamplifier circuit includes a switch that switchably couples the input to a reference potential and which, when the preamplifier is inactive, is closed. Hence, when the preamplifier is inactive, the input is put into a low-impedance state and the amplifier and downstream assemblies are protected from unwanted high-power interference signals. It is thus also possible to use other, fully integratable filter types in a transceiver's reception signal processing chain instead of external surface acoustic wave filters with a low level of complexity and without drawbacks.

Abstract: A Radio Frequency Receiver on a Single Integrated Circuit (“RFSIC”) is described. The RFSIC may include a mixer, a phase-locked loop (“PLL”) in signal communication with the mixer, and an on-chip auto-tuned RF filter in signal communication with both the mixer and PPL, such that the same PLL simultaneously tunes the frequency of the VCO and the frequency response of the auto-tuned RF filter.

Abstract: An RF amplifier for amplifying a composite RF signal includes a first RF signal and a second RF signal. The amplifier includes a first amplifying stage for providing a first amplified signal a second amplifying stage for providing a second amplified signal, a third amplifying stage for providing a third amplified signal and a fourth amplifying stage for providing a fourth amplified signal, the fourth amplifying stage being arranged after the third amplifying stage. The respective amplified signals are summed up to obtain amplified RF signals.