Integration Or Differentiation Patents (Class 708/6)
  • Patent number: 11431589
    Abstract: A logical expression engine and computer-implemented method for optimizing evaluation of a logical expression is provided. The method includes receiving an original logical expression to be applied by a computer program for processing input information, the original logical expression having at least one operator and a subexpression disposed on each side of a related operator of the at least one related operator. The method further includes receiving statistics accumulated about how the computer program applies the subexpressions of the original logical expression for processing the input information received by the computer program, using the accumulated statistics to optimize the order in which the subexpressions would be applied by the computer program, and outputting for application by the computer program an optimized logical expression having the subexpressions ordered in accordance with the optimized order.
    Type: Grant
    Filed: October 24, 2019
    Date of Patent: August 30, 2022
    Assignee: Arbor Networks, Inc.
    Inventors: Brian St. Pierre, Peter Allen Jensen, Timothy David Dodd
  • Patent number: 8937989
    Abstract: Systems and methods are provided for channel estimation using linear phase estimation. These systems and methods enable improved channel estimation by estimating a linear channel phase between received pilot subcarrier signals. The estimated linear phase can then be removed from the received pilot subcarrier signals. After the estimated linear phase is removed from the received pilot subcarrier signals, a channel response can be estimated. A final estimated channel response can be generated by multiplying the results of the linear channel estimation by the estimated linear phase.
    Type: Grant
    Filed: January 8, 2014
    Date of Patent: January 20, 2015
    Assignee: Marvell International Ltd.
    Inventors: Jungwon Lee, Raj M. Misra, Adina Matache, Konstantinos Sarrigeorgidis
  • Patent number: 8630371
    Abstract: Systems and methods are provided for channel estimation using linear phase estimation. These systems and methods enable improved channel estimation by estimating a linear channel phase between received pilot subcarrier signals. The estimated linear phase can then be removed from the received pilot subcarrier signals. After the estimated linear phase is removed from the received pilot subcarrier signals, a channel response can be estimated. A final estimated channel response can be generated by multiplying the results of the linear channel estimation by the estimated linear phase.
    Type: Grant
    Filed: May 18, 2012
    Date of Patent: January 14, 2014
    Assignee: Marvell International Ltd.
    Inventors: Jungwon Lee, Raj M. Misra, Adina Matache, Konstantinos Sarrigeorgidis
  • Patent number: 8598533
    Abstract: A radiation detection system can include a photosensor to receive light from a scintillator via an input and to send an electrical pulse at an output in response to receiving the light. The radiation detection system can also include a pulse analyzer that can determine whether the electrical pulse corresponds to a neutron-induced pulse, based on a ratio of an integral of a particular portion of the electrical pulse to an integral of a combination of a decay portion and a rise portion of the electrical pulse. Each of the integrals can be integrated over time. In a particular embodiment, the pulse analyzer can be configured to compare the ratio with a predetermined value and to identify the electrical pulse as a neutron-induced pulse when the ratio is at least the predetermined value.
    Type: Grant
    Filed: December 13, 2010
    Date of Patent: December 3, 2013
    Assignee: Saint-Gobain Ceramics & Plastics, Inc.
    Inventors: Peter R. Menge, Clarisse Tur
  • Patent number: 8352527
    Abstract: Disclosed is a filter circuit, comprising a signal to be filtered, a difference circuit coupled to the signal to be filtered, a filter having an input coupled to the difference circuit, an integrator (or accumulator) having a first input coupled to an output of the filter circuit, and having a second input, and an accumulator coupled to an output of the integrator. A method of filtering is described also.
    Type: Grant
    Filed: September 29, 2006
    Date of Patent: January 8, 2013
    Assignee: Cypress Semiconductor Corporation
    Inventor: David Van Ess
  • Patent number: 8194768
    Abstract: Systems and methods are provided for channel estimation using linear phase estimation. These systems and methods enable improved channel estimation by estimating a linear channel phase between received pilot subcarrier signals. The estimated linear phase can then be removed from the received pilot subcarrier signals. After the estimated linear phase is removed from the received pilot subcarrier signals, a channel response can be estimated. A final estimated channel response can be generated by multiplying the results of the linear channel estimation by the estimated linear phase.
    Type: Grant
    Filed: August 20, 2008
    Date of Patent: June 5, 2012
    Assignee: Marvell International Ltd.
    Inventors: Jungwon Lee, Raj M. Misra, Adina Matache, Konstantinos Sarrigeorgidis
  • Patent number: 7613760
    Abstract: Efficiently implemented multi-channel integrators and multi-channel differentiators utilize a delay section in a single integrator or differentiator in lieu of parallel integrator or differentiator lines to handle multi-channel data flow and processing. The delay section functions like a shift register, greatly reducing the space and/or resources required for implementing the integrator or differentiator. Such integrators and differentiators can be used in multi-channel decimators, interpolators and numerically controlled oscillators in place of multiple instances of single channel integrators that have had to be used in earlier systems. These structures and devices can be implemented in programmable devices such as PLDs and similar devices, in which the delay section can be implemented in embedded memory in the device. Multi-stage decimators and interpolators can use multiple instances of an integrator and/or differentiator in series.
    Type: Grant
    Filed: March 18, 2004
    Date of Patent: November 3, 2009
    Assignee: Altera Corporation
    Inventors: Benjamin J. Esposito, David J. Moore
  • Patent number: 7555507
    Abstract: An apparatus for solving time-continuous differential equations is disclosed. The apparatus includes a group of hybrid integrators interconnected to each other. Each one of the hybrid integrators includes an analog integrator, a conversion logic and multiple digital registers. The analog integrator generates an analog output, and the conversion logic along with the digital registers converts the analog output to a digital output. The analog output and the digital output are then combined to yield an integrated output. The integrated output is fed to the hybrid integrators within the group.
    Type: Grant
    Filed: December 16, 2005
    Date of Patent: June 30, 2009
    Assignee: Board of Regents, The University of Texas System
    Inventors: Michael Bryant, Ashish Seth, Benito Fernandez
  • Publication number: 20080052047
    Abstract: A method for simulating a partial differential equation to perform image and signal processing. The method utilizes quantum and classical lattice gas processes to simulate the partial differential equation. The lattice gas processes may be run on a type I quantum computer, type II quantum computer or a classical computer. A system for simulating and solving a partial differential equation comprising a quantum computer and a classical processor.
    Type: Application
    Filed: July 12, 2007
    Publication date: February 28, 2008
    Inventors: Mark W. Coffey, Gabriel G. Colburn
  • Publication number: 20040236806
    Abstract: A chain rule-based evaluation technique is presented for analytically evaluating partial derivatives of nonlinear functions or differential equations defined by a high-level language. A coordinate embedding strategy is introduced that replaces all scalar variables with higher-dimensional objects. The higher dimensional objects are defined by a concatenation of the original scalar and its Jacobian and Hessian partials. The artificial problem dimensions permit exact sensitivity models to be recovered for arbitrarily complex matrix-vector models. An object-oriented operator-overloading technique is used to provide a familiar conceptual framework for generating the model sensitivity data. First- and second-order partial derivative models are automatically evaluated by defining generalized operators for multiplication, division, and composite function calculations.
    Type: Application
    Filed: June 24, 2003
    Publication date: November 25, 2004
    Inventor: James D. Turner
  • Publication number: 20030023645
    Abstract: One embodiment of the present invention provides a system that automatically computes a derivative of a numerical expression within a digital computer system. The system operates by receiving a representation of the numerical expression, wherein the numerical expression includes one or more independent variables. Next, the system forms an expression tree for the derivative of the numerical expression with respect to an independent variable, wherein the expression tree makes use of temporary variables to form results of sub-expressions for computing the derivative. While forming this expression tree, the system seeks to introduce only temporary variables and associated sub-expressions as necessary to eliminate repeated common sub-expressions, thereby substantially minimizing the number of temporary variables. The system subsequently uses this expression tree to compute the derivative of the numerical expression during a computation.
    Type: Application
    Filed: June 28, 2001
    Publication date: January 30, 2003
    Inventor: G. William Walster