Abstract: A moving image network system which has high response to a moving image transmission request and prevents interruption of a moving image signal. Upon transmitting moving image data from terminal 1 to terminal 2, controller 20 adds a transmitter terminal address, priority and a coding type of the moving image data to transmission load information received by transmission load information receiver 17, and outputs the data to transmission load information transmitter 16. The controller 20 encodes/decodes moving image data in accordance with transmission load information of the moving image data and adjusts transmission data amount corresponding to transmission load of a transmission path.

Abstract: Each node in the network broadcasts its unique identifier to the other nodes. Each node assigns a different network address to each of the nodes based on the unique identifier received from the node. However, each node assigns the network addresses in a common predetermined manner. Thus, each node arrives at the same assignment of network addresses. In a preferred embodiment, the assignment of network addresses is maintained as an address table at each node.

Abstract: A multiprocessor system is provided that comprises a plurality of processor units coupled together via a backplane and a timestamp distribution system. The timestamp distribution system provides a first time signal to the plurality of processor units over the backplane. The timestamp distribution system comprises a first timestamp distributor for generating the first time signal and a first timestamp communication bus on the backplane for transporting the first time signal from the timestamp distributor to the plurality of processor units. The first time signal comprises a first time data word that is transmitted at a periodic rate wherein the first time data word does not change each time the first time signal is transmitted.

Abstract: The present invention relates to a packet processing method using a multiple fault tolerant network structure, in particular to a packet processing method using a multiple fault tolerant network structure which is capable of performing communication of a whole ring and disusing a useless packet when a fault occurs on a plurality of connection lines and nodes by using a dual ring structure.

Abstract: On a screen of a display unit, all NODEs in a ring network to which a connected node (NODE) belongs are minimized and displayed on a screen of a display unit, and a line connecting NODEs with each other is displayed between respective NODE icons. Display colors of the NODE icon and the line icon are changed depending on presence/absence of a failure. Further, a display color of each object displayed in each window varies in a plurality of stages in accordance with a degree of a failure.

Abstract: The invention relates to a method of joint data transmission of digital source data and control data between data sources and data sinks which are subscribers of a uni-directionally operated communication network having a ring configuration, in which source data and control data are transmitted in a format which prescribes a clocked sequence of individual bit groups of the same bit width which are transmitted in a continuous data stream, in each case specific bit positions predetermined by the format are reserved, in which the subscribers sample data in each case with a first sampling frequency and the communication network samples data with a second sampling frequency, which is an integral multiple of the first sampling frequency, in which, within each bit group, at least one contiguous region with a predetermined number of bit positions can be reserved for source data and the contiguous region(s) in each case have a beginning and a defined length and are in each case assigned to a subscriber address, in whi

Abstract: A local communication system includes a plurality of stations exchanging control messages and source data via a ring network. One of the stations is designated a master station with the other stations designated as slave stations. On start-up, a “Set Position” message is generated by the master station and modified by each station in turn, so that each station can determine its ring position. In the event that start-up is unsuccessful due to a break down at some point in the ring, the slave station immediately following the break will become temporary master, and will generate a “Set Position” message prior to shut down. By this mechanism, the master station is able to store an indication of the relative position of the temporary master station in the network, so that the fault may be more easily located.

Abstract: A power control management system includes an Ethernet server and at least one Ethernet gateway to facilitate communications with at least one intelligent end device (IEDs). A control computer includes the Ethernet server which is configured to create and encapsulate messages intended for the IEDs in an industry standard format. An Ethernet gateway is also included which is configured to communicate with the server, and further configured to transmit messages received from the server to the IEDs.

Abstract: Methods, systems, and devices are provided for managing resources in a computing cluster. The managed resources include cluster nodes themselves, as well as sharable resources such as memory buffers and bandwidth credits that may be used by one or more nodes. Resource management includes detecting failures and possible failures by node software, node hardware, interconnects, and system area network switches and taking steps to compensate for failures and prevent problems such as uncoordinated access to a shared disk. Resource management also includes reallocating sharable resources in response to node failure, demands by application programs, or other events. Specific examples provided include failure detection by remote memory probes, emergency communication through a shared disk, and sharable resource allocation with minimal locking.

Abstract: An interprocessor communication device, in which a plurality of processors are interconnected to processor buses for an address signal, a data signal, and a control signal, receiving/outputting handshake signals for transmitting/receiving a message to/from an adjacent processor. A plurality of memory blocks are connected to memory buses for an address signal, a data signal, and a control signal and stores/outputs data upon input of an address signal and a control signal. A rotation bus interface module, connected between the processor buses and the memory buses, switches the memory buses connected to the processor buses in response to handshake signals received from two adjacent processors to allow the processors exclusively to access the memory blocks.

Abstract: A multiprocessing computer system includes a plurality of nodes interconnected through a global interconnect network which supports cluster communications. An initiating node may launch a request to a remote node's memory. A remote cluster node may be reached by passing the request through one or more intermediate nodes configured in pass-through mode. Accordingly, various global network topologies may be supported. The pass-through mode may be advantageously accommodated using a node having hardware which is similar to other nodes in the system. More particularly, the pass through mechanism may be implemented without significantly altering a node's local bus transactions. In one specific implementation, when the system interface of a particular node receives a transaction, the address of the transaction is checked to determine if the transaction should be treated as a pass through transaction.

Abstract: A data processing system comprises a plurality of nodes an-d a serial data bus interconnecting the nodes in series in a closed loop, for passing address and data information. At least one processing node includes a processor, a printed circuit board and a memory which is partitioned into a plurality of sections, including a first section for directly sharable memory located on the printed circuit board, and a second section for block sharable memory. A local bus connects the processor, block sharable memory and printed circuit board, for transferring data in parallel from the processor to the directly sharable memory on the printed circuit board, and for transferring data from the block sharable memory to the printed circuit board.

Abstract: A method and system for routing an externally generated message in a network includes receiving at an ingress port of a network a message from an external network. The message includes Internet protocol (IP) source and destination addresses and message data. The IP source and destination addresses are translated to internal addresses that are non-forwardable in the external network. The message data is routed in the network based on the internal addresses.

Abstract: A data network hub unit is stackable with other such units to constitute a hub in which each of the units can supply data packets to network data destinations and receive data packets from network data sources, and to form a closed data transmission ring which enables packets received at any unit to be transmitted from any other unit. The hub unit includes arbitration control means responsive to packet headers circulating on said ring.

Abstract: The invention relates to a computer farm, comprising a bus (7) on which is simulated a local area network between several processor cards (3a-3h) mounted on the bus. Each card comprises a test function (11) which implements, upon execution thereof, at least part of the functionalities required for simulating the local area network on the card and a module for executing the test function, whilst the farm comprises a test means which periodically executes the same calculation as the same test function and compares its result with the result provided by the card.

Abstract: An adapter device for providing the user a remote access point for supporting interaction between the device and one or more target devices supporting one or more of several communication protocols for automotive and industrial automation applications employing user-selectable protocols, such as multiplexed communication networks.

Abstract: A computer graphics system having a hyperpipe architecture. Multiple rendering pipes are coupled together through a hyperpipe network scheme. Each of the rendering pipes are capable of rendering primitives for an entire frame or portions thereof. This enables multiple rendering pipes to process graphics data at the same time. A controller coordinates the multiple rendering pipes by sending requests to the appropriate rendering pipes to retrieve the pixel data generated by that particular pipe. It then merges the pixel data received from the various rendering pipes. A single driver then draws the three-dimensional image out for display.

Abstract: A multi-services communications device provides internal control over communications, so that computer control input is not required. Communications performance is improved, especially for real time communications such as telephone conversations, because the multi-services communications device does not wait on late or failed control input from the computer. The multi-services communications device is comprised of a communications processing system connected to a network interface, telephone interface, video interface, and computer interface. The communications processing system controls: 1) the exchange of telephone signals with a telephone connection, 2) the exchange of video signals with a video connection, 3) the exchange of data with a computer connection, and 4) the exchange of the data, video signals, and voice signals with a network connection.

Abstract: The present invention provides a protection protocol for fault recovery, such as a ring wrap, for a network, such as a two line bi-directional ring network. An embodiment of the present invention works in conjunction with a ring topology network in which a node in the network can identify a problem with a connection between the node and a first neighbor. The present invention provides a protection protocol which simplifies the coordination required by the nodes in a ring network. The nodes do not need to maintain a topology map of the ring, identifying and locating each node on the ring, for effective protection. Additionally, independently operating ring networks can be merged and the protection protocol will appropriately remove a protection, such as a ring wrap, to allow the formation of a single ring.

Abstract: Each node of multinode computer system includes an interrupt controller, a pair of send and receive queues, and a state machine for communicating interrupts between nodes. The communication among the interrupt controller, the state machine, and the queues is coordinated by a queue manager. For sending an interrupt, the interrupt controller accepts an interrupt placed on a bus within the node and intended for another node and stores it in the send queue. The controller then notifies the interrupt source that the interrupt has been accepted before it is transmitted to other node. The interrupt has a first form suitable for transmission on the bus. A state machine within the node takes the interrupt from the send queue and puts the interrupt into a second form suitable for transmission across a network connecting the multiple nodes.

Abstract: A method for identifying marginal transmission line conditions in a token ring network. The method includes the steps of (1) generating a series of test patterns simulating different frequency signals; (2) writing each test pattern into a token ring packet frame; (3) successively transmitting said test patterns from a sending station connected to said token ring network to a receiving station on said token ring network; (4) measuring the time required for each transmitted test pattern to be successfully transmitted from the sending station to the receiving station; (5) comparing the transmission times measured for all successful test pattern transmissions; and (6) determining that a marginal transmission line condition exists within the token ring network when the transmission time associated with one of the test patterns greatly exceeds the transmission times associated with the other test patterns.

Abstract: A multiple counter-rotating ring computer network system having a permission control scheme for client isolation. The peripheral channel allows two rings to be folded into one longer ring so that faulty nodes can be effectively removed from the network. Or, any of the rings can be masked so that they are unoperational. The network system also allows several client isolation states ranging from complete isolation to master access. These types of isolation allow faulty client devices to be tested while maintaining a high-level of network security by configuring the client to an appropriate isolation state.

Abstract: In a trunk transmission network for transmitting information signals between nodes via paths, flexible path operation is achieved by setting up paths between source nodes and destination nodes after pre-classifying paths into a higher service class in which any loss of information occurring in that path is restored, and a lower service class which permits loss of information to occur in the path. The flexible operation is further achieved by arranging for each node, when it acts as a source node, to recognize the service class of the information signal it is sending to a destination node, and to select a path corresponding to that service class.

Abstract: A method and apparatus for transferring data from a host to a node through a fabric connecting the host to the node. A chip architecture is provided in which a protocol engine provides for on ship processing in transferring data such that frequent interrupts from various components within the chip may be processed without intervention from the host processor. Additionally, context managers are provided to transmit and receive data. The protocol engine creates a list of transmit activities, which is traversed by the context managers, which in turn execute the listed activity in a fashion independent from the protocol engine. In receiving data, the context managers provide a mechanism to process frames of data originating from various sources without requiring intervention from the protocol engine. When receiving data, the context managers are able to process frames from different sources, which arrive out of order.

Abstract: Routing asynchronous state changes in a multi-processing system having an end user system, a central application server system and an endpoint system, includes detecting a state change with a service object on the endpoint system, sending a notification to an associated service proxy object on the central application server system notifying the associated service proxy object of the state change, sending a notification to an associated distributed service object which is an owner of the service proxy notifying the associated distributed service object of the state change, sending a notification to an associated distributed service proxy object on the end user system notifying the associated distributed service proxy object of the state change, and posting an event to an associated owner window of the distributed service proxy object using a window identifier including sending a notification to the associated owner window notifying the associated owner window of the state change.

Abstract: Communication stations whose own addresses coincide with a destination address of communication data received via data transmission lines and whose write enable/disable states of their own addresses stored in their address/flag memory are in their write enable states can update their own addresses to variably set address values of the communication data, then update their own address write enable/disable states to their write disable states, then execute predetermined calculations for the variably set address value in the communication data, and then transmit the communication data whose variably set address value has been rewritten into the variably set address value obtained by the calculations to succeeding stations so as to circulate between a plurality of communication stations sequentially.

Abstract: The present invention provides a method and apparatus for removing unwanted data packets from a ring topology communication network having a plurality of nodes. The invention ensures that a data packet is removed from the network if there is a failure of the originating node, or if there is a failure of the node principally responsible for removing the data packet. The invention provides fault-tolerance, without significantly adversely affecting the overall network performance. The invention provides the originating node address in a controlled field of the data packet, with unused data bits within the control field being used as "rouge packet bits." The invention will include one or more nodes designated as "rouge data packet removal nodes" or "rouge removal nodes." A data packet is created at an originating node which will embed its own address in a "Node ID" field of the data packet and will transmit the data packet along the network.

Abstract: An initiator device, in a data processing system utilizing a Serial Storage Architecture subsystem, directs an I/O process via secondary path if a primary path is unavailable, even if the primary path is shorter. Also, an initiator device may send outbound data frames, on a secondary path, simultaneously with the SCSI command. Additional flexibility is attained by utilizing an adapter and target storage devices that all support Out of Order Transfers ("OOT"). If a target supports OOT, individual data frames that comprise an I/O process may be sent on multiple paths, allowing greater flexibility in routing. Also, an initiator device may send outbound data frames, on an alternate path, simultaneously with the SCSI command.

Abstract: Interconnection subsystems having diverse topologies, for interconnecting small numbers of nodes having a predetermined maximum degree in a multiprocessor computer system, include subsystems broadly classified into a number of general classes based on their topologies, including a "polygonal" class, a "ladder" class and a "tiled" class. In topologies of the polygonal class, a majority of the nodes in the multiprocessor computer system are connected in a ring and the remaining nodes are connected to the nodes in the ring, and in some cases also to each other. In topologies of the ladder class, the nodes are interconnected in a "ladder" topology comprising a series of nodes connected in a ring, the ring corresponding to one standard of a ladder topology folded on itself. Each node in the ring is connected to another node in a second series, effectively forming rungs of the ladder topology.

Abstract: Relay station whose own address coincides with a destination address of communication data and whose own address write enable/disable state stored in the state storing means is in a write enable state can update its own address into a variably set address value in the communication data, then update the own address write enable/disable state into the write disable state, execute predetermined calculation of the variably set address value in the communication data, and transmit the communication data in which the variably set address value has been rewritten into a calculated value to a succeeding relay station so as to circulate sequentially between the plurality of relay stations.

Abstract: Interconnection subsystems having diverse topologies, for interconnecting small numbers of nodes having a predetermined maximum degree in a multiprocessor computer system, include subsystems broadly classified into a number of general classes based on their topologies, including a "polygonal" class, a "ladder" class and a "tiled" class. In topologies of the polygonal class, a majority of the nodes in the multiprocessor computer system are connected in a ring and the remaining nodes are connected to the nodes in the ring, and in some cases also to each other. In topologies of the ladder class, the nodes are interconnected in a "ladder" topology comprising a series of nodes connected in a ring, the ring corresponding to one standard of a ladder topology folded on itself. Each node in the ring is connected to another node in a second series, effectively forming rungs of the ladder topology.

Abstract: A method and apparatus for transferring data from a host to a node through a fabric connecting the host to the node. A chip architecture is provided in which a protocol engine provides for on chip processing in transferring data such that frequent interrupts from various components within the chip may be processed without intervention from the host processor. Additionally, context managers are provided to transmit and receive data. The protocol engine creates a list of transmit activities, which is traversed by the context managers, which in turn execute the listed activity in a fashion independent from the protocol engine. In receiving data, the context managers provide a mechanism to process frames of data originating from various sources without requiring intervention from the protocol engine. When receiving data, the context managers are able to process frames from different sources, which arrive out of order.

Abstract: A reduced instruction set architecture implements complicated image processing algorithms that are decomposed into combinations of simple operations. The simple operations are further decomposed into multiple operations of one dimensional data with an address controller to scan data in a highly flexible fashion for multi-dimensional applications.

Abstract: A computer system employs a hierarchical ring structure for communication. Computer system elements are configured into modules with ring interface hardware, and the modules are coupled to one or more rings. Bridge modules may be included for transmitting between rings in the hierarchy. The rings are time division multiplexed, and each time slot on a ring carries a frame. According to an address carried within the frame, bridge modules determine whether or not to transmit a frame circulating on a source ring onto a target ring. If the address of the frame indicates a module upon the source ring, the bridge module retransmits the frame on the source ring. Otherwise, the bridge module transmits the frame on the target ring. The bridge module operates in this fashion at any level of the hierarchy. The owner of a time slot on a ring is permitted to release the time slot for use by other modules. To reclaim a time slot, the owner marks the time slot owned.

Abstract: The invention relates to a local area network comprising at least a ring system which includes a plurality of network nodes coupled via ring connections, which nodes are used for coupling to a station or a network node of another ring system and for switching packets generated by a station or a network node. Switching software is provided distributed over all the network nodes and stations and at least sufficient for the switching operations. The distributed switching software renders an object available for each respective application, which object is combined to a respective component of object framework software for object registration and routing the messages to and from the object. The distributed switching software in each network node and each station is represented as a distribution plane entity which is used for transmitting and controlling the messages between objects in a station or a network node and another distribution plane entity.

Abstract: A system ling client computers, particularly client notebook computers, to communicate with a computer local area network (LAN) using infrared or other transparent links. The system includes a pseudo nic driver, transparent communication hardware, and a transparent link in a network interface unit. The pseudo nic driver hides the technical details of the transparent communications by presenting itself as a traditional nic driver to the client networking software. The network interface unit bi-directionally communicates via the transparent link with an, for example, an infrared enabled client computer and performs the necessary bridging between the low level infrared signals and traditional LAN system such as Ethernet.

Abstract: A plurality of computers are sequentially connected to form a chain of computers in a network. Data packets from computers are gathered and sequentially routed through the chain of computers to a last computer in the chain on a packet assembly channel. Data packets routed through the last computer are then broadcast to all the computers in the network on a packet broadcast channel. Each computer in the network is provided with a network interface card to interface with the packet assembly and broadcast channels. A network hub configures the packet assembly and broadcast channels route data packets generated by the computers through the last computer and to broadcast the data packets routed through the last computer to the computers in the network.

Abstract: A graphics accelerator includes a plurality of digital signal processors that are arranged in a self-regulating, peer-to-peer configuration. Accordingly, the processors cooperate to process, on a cyclical basis, each of a successive series of graphics requests received over a request bus. To that end, each processor includes a request bus, an input in communication with the request bus, and an output coupled to a sequencer for ordering graphics requests processed by the digital signal processors.

Abstract: A method and apparatus for expanding multiple token rings by interconnecting multiple multi-ring hubs. The computer networking hubs of the present invention are operable to support multiple token ring networks. In addition, the networking hubs of the present invention include a cable interface configured to interconnect the multiple token ring networks to a single cable interconnected with a separate hub, which is also configured to support multiple token rings. As a result, multiple token rings are able to be expanded across multiple networking hubs.In one embodiment, the networking hubs of the present invention are further operable to receive signals from remote nodes via a first signal mode. The signals are converted to a second signal mode to be transmitted internally. To transmit the signals to a separate hub, the signals are re-converted to the first signal mode and transmitted to a separate networking hub via the first signal mode.

Abstract: A load balancing method and apparatus are provided, by which loads in a wide range of the entire system can be balanced with a small overhead with respect to load balancing processing, and the mean response time of the entire system can be shortened. The method has the steps of (i) estimating a load of the present node based on the number of tasks being or waiting to be processed and determining an estimated load value of the node; (ii) accepting a task passing through a logical ring network, and every time a task is accepted, comparing the estimated load value and a threshold value which is set with respect to the number of tasks existing in the node so as to limit the load of the node; and (iii) judging, based on a result of the comparison, whether the accepted task is handed over to a task processing unit, or is transmitted to the logical ring network again without handing over the task to the task processing unit.

Abstract: A single chip integrated circuit comprises a plurality of modules interconnected in an on-chip network. The modules are processors or memory devices or hybrids. An inter-module link provides an electrical path for data communication among the modules. The modules are connected to the inter-module link by inter-module ports, with at least one inter-module port coupled between an associated module and the inter-module link. The inter-module link electrically couples the inter-module ports and provides a communications pathway between the modules. Each inter-module port provides a common, universal interface to any of the modules, i.e., modules of different types are connectable to any inter-module port.

Abstract: A single-chip, network interface controller (NIC) integrated circuit (IC) with a host interface and arbiter common to two 10BASE-T ETHERNET local area network (LAN) segments with respective unshielded twisted pair interfaces, encoder-decoders, medium access controllers, first-in first-out register memory arrays, and buffer management. Source-address and destination-address content addressable memories are connected to respective MAC receivers in the medium access controllers to both learn the addresses of network clients on the two segments and then to transparently bridge packets between the LAN segments. The NIC effectively increases the bandwidth of a server connection to the thus unified network.

Abstract: A communication controller transfers data cells and a control data cell representative of a target transmission rate from a system memory to a host; however, when a bus between the system memory and the communication controller is congested, the actual transmission rate for the data cells becomes smaller than the target transmission rate; a time stamp generator produces a time stamp representative of time for requesting a data transfer from the system memory, and a time stamp monitor compares the time stamp with actual stating time of transmission of the data cell to the host so as to check whether the target transmission rate is appropriate or not; if the target transmission rate is too large, the time stamp monitor requests a data processor to change the target transmission rate so that the data cells are transferred to the host at an appropriate transmission rate at all times.

Abstract: The system described provides a reconfigurable serial interconnection among a processor, whether in a workstation or a server, and user class I/O devices, such as video display terminals, storage devices, and other peripherals. Sustainable I/O throughput of 1 Gbps or more supports the needs of display and video input devices. In addition the system allows hot plug-and-play of user class I/O devices.

Abstract: Disclosed is a synchronous cross-connect system with an integrated 2.5 Gbps (STM-16) I/O link and a ring network interworking. The synchronous cross-connect system includes: first and second I/O portions for performing I/O function with respect to a plurality of STM-16 signals, including a backplane signal pattern which takes four units among the plurality of STM-16 signals performing a protection switching and transmission functions; a signal intercrossing portion for crossing/connecting signals of the first and second I/O portions; and synchronizing portion for generating clock signals necessary to the first and second I/O portions and the signal intercrossing portion. As a result, the synchronous cross-connect system performs a transmission function without an additional apparatus in the transmission link with interoffice transmission capacity of 2.5 Gbps (STM-16), and has a high survivability because of a real-time fault recovery function using the ring network interworking.

Abstract: A computer chip includes a plurality of modules interconnected in an on-chip data transfer network configured in a mesh or ring of rings topology. The data transfer network includes links or buses, and switchpoints. The links or buses are configured in a ring topology as a mesh or ring of rings with each group of links of bus including a portion which is shared with a portion of another group of links or bus. The bus switchpoints are positioned at intersections of the mesh of rings. Each switchpoint is operable to route data from a source to a destination so that the modules are operable to communicate with each other through the groups of links or buses, and switchpoints. In various embodiments, the modules are coupled to the links or buses and/or the switchpoints.

Abstract: A computer system with a plurality of devices compatible with the Fibre Channel Protocol, which computer system is provided with the capability to dynamically alter the configuration of the plurality of devices without a system reset, or without additional software overhead. This capability is realized by providing unique mapping relationships between low-level Fibre Channel information structures related to the devices and upper-level link elements compatible with an Operating System associated with the computer system.

Abstract: The present invention provides for an on-chip communications method with fully distributed control combining a fully-pipelined, fixed-latency, synchronous bus with a two-level arbitration scheme where the first level of arbitration is a framed, time-division-multiplexing arbitration scheme and the second level is a fairly-allocated round-robin scheme implemented using a token-passing mechanism. Both the latency and the bandwidth allocation are software programmable in real-time operation of the system. The present invention also provides for a communications system where access to a shared resource is controlled by the above communications protocol. Access to and from the shared resource from the subsystem is through a bus interface module. The bus interface modules provide a level of indirection between the subsystem to be connected and the shared resource. This allows the decoupling of system performance requirements from subsystem requirements. Communication over the bus is fully memory mapped.

Abstract: A computer system with a plurality of devices compatible with the Fibre Channel Protocol. The computer system is provided with the capability to recover from a loop hang condition resulting from an unresponsive communication link in an Arbitrated Loop. This capability is realized by providing a sense mechanism for detecting a no-change condition in the states associated with a controller arranged in the Arbitrated Loop.

Abstract: A method for the common transmission of digital source data and control data between data sources and data sinks. The data sources and data sinks are subscribers in a communication network with a ring structure. The source data and control data are transmitted in a format which prescribes a pulsed sequence of individual bit groups of identical length. Specific bit positions in each of the bit groups are reserved for source data and control data. The transmission is in a continuous data stream synchronous with a clock signal. An arbitrarily large contiguous region of the bit positions can be reserved for the source data within a bit group for data which are transmitted in data packets. Each of the data packets has a start with a subscriber address and a defined length.