Abstract: The present invention discloses a method for scheduling queues based on a chained list.

Abstract: A server of an elastic computing cloud system includes a block device driver apparatus and at least a block device service apparatus. The server implements a hot deployment for a storage service, such that an upgrade of the storage service may be performed without interrupting the storage service. The block device driver apparatus maintains a waiting queue and a pending queue for each storage service. In response to determining a storage service will perform an upgrade, the block device driver apparatus stops processing data write/read requests that are maintained in the pending queue for the service, and puts the data write/read requests that are currently processed in the pending queue back to the waiting queue for re-dispatching, thus realizing completion of processing the upgrade of the storage service in the elastic computing cloud system without interrupting the storage service.

Abstract: A communication method for use by an input/output (I/O) scanner coupled to a programmable logic controller (PLC) includes coupling at least one I/O module to a backplane, and coupling a maintenance module to the backplane. The communication method also includes selectively enabling and disabling communication between the backplane and the at least one I/O module by actuating a switch in the maintenance module such that network communication is maintained by a network interface regardless of whether communication between the backplane and the at least one I/O module is enabled.

Abstract: Auto-trespass can be at least temporarily disabled subsequent to an automatic failover. The automatic failover exchanges roles between an active path and a passive path, such that the passive path becomes the active path and vice versa. By disabling auto-trespass, hosts that are unaware that the automatic failover has occurred will not trigger another failover when those hosts attempt to perform I/O operations via the formerly-active path. This can reduce performance decreases that would otherwise occur due to the active role being traded in a “ping-pong” manner between the paths.

Abstract: In a network having a computing system interfacing with a storage system via a switch, an average transmit wait count value is compared with a first threshold value. The average transmit wait count value is updated when a switch port has a frame available for transmission but is unable to transmit the frame if a port of the storage system is unable to receive the frame or if another switch port is unable to receive the frame. A congestion message is generated for notifying a management module of congestion at the switch port when the average transmit wait count value reaches the first threshold value. Depending upon the characteristics of the congestion, a notification is sent to the computing system to either only reduce a rate of write operations to reduce congestion, or to reduce both the rate of write operations and a rate of read operations.

Abstract: A disclosed image forming apparatus includes an image processing device including plural image processing units; a control device configured to control the plural image processing units; and a connection unit configured to connect the image processing device to the control device. Each of the plural image processing units is connected to the control device by one of plural channels; the image processing device is connected to the control device by a first bus including the channels; and the connection unit is provided on the first bus so that the image processing device is connected to the control device by a single connection unit.

Abstract: There is provided an apparatus including a plurality of modules. Each module includes a storage unit configured to store a waiting ID and a specific ID of the module, a communication unit configured to transmit and receive packets to and from a bus, and a processing unit configured to process data of a packet which includes a valid flag indicating that the packet is valid, wherein the communication unit takes in data held by a packet which has an ID that coincides with the waiting ID, and stores the processed data in a packet which includes the valid flag indicating invalid and an ID coincident with the specific ID, and transmits the packet.

Abstract: A storage system configured to associate a virtual port 810 to a plurality of physical ports 800. In response to commands from computers, the storage system 100 manages relation between physical ports and virtual ports and relation between virtual port and volumes by performing processes such as creating a virtual port, assigning LUs to a virtual port, moving a virtual port between physical ports and deleting a virtual port. The storage system also maintains/calculates statistics information for ports and displays the information for each virtual port.

Abstract: According to one embodiment, a memory control device includes a controller, a command queue module, a plurality of stage processors, and a skip module. The controller controls a data access command to a nonvolatile memory from a host. The command queue module queues a transfer request command corresponding to the data access command. The stage processors each perform stage processing related to the transfer request command queued by the command queue module. The skip module skips the stage processing by the stage processors in response to a shutdown command from the controller.

Abstract: In some embodiments a Universal Serial Bus cable includes a first differential pair to transmit bus signals, and a second differential pair to transmit bus signals in a same direction as the bus signals transmitted by the first differential pair. In this manner, a bandwidth of the Universal Serial Bus cable is doubled in that same direction. Other embodiments are described and claimed.

Abstract: In some embodiments a Universal Serial Bus cable includes a first differential pair to transmit bus signals, and a second differential pair to transmit bus signals in a same direction as the bus signals transmitted by the first differential pair. In this manner, a bandwidth of the Universal Serial Bus cable is doubled in that same direction. Other embodiments are described and claimed.

Abstract: The method includes in placing an instruction presence parameter in the “argument” field of a binary word defining a read/write command generated by generic management programs (drivers) for removable data storage units. This makes it possible to circumvent the limitation of the set of the commands authorized by a generic program for managing a removable data storage unit, without running the risk of data being interpreted wrongly as instructions.

Abstract: An efficient transfer of data including a plurality of data sections is achieved. In a data transfer system including a first DMA 1142 of a channel control unit 11 and an MP 122 of a processor unit 12 that sets a transfer parameter in the first DMA 1142, while CKD format data 1400 is transferred from a cache memory 14 to a memory 113 of the channel control unit 11, the MP 122 acquires a C field 1411 from the cache memory 14 and sets a transfer parameter in the first DMA 1142 on the basis of the acquired C field 1411, the transfer parameter having attached thereto the C field 1411 and being used for transferring a K field 1412 from the cache memory 14 to the memory 113. The first DMA 1142 retrieves the C field 1411 attached to the transfer parameter, stores the C field 1411 in the memory 113, and transfers the K field from the cache memory 14 to the memory 113 according to the transfer parameter.

Abstract: A key activity detection method, applied in an electronic device having at least a first key and a digital I/O pin, includes: switching the digital I/O pin to a first operation mode, so that a voltage of the digital I/O pin is decreased to a ground voltage; switching the digital I/O pin to a second operation mode, so that the voltage of the digital I/O pin is increased; measuring a first charge period of the voltage of the digital I/O pin; counting a first appearance times of the first charge period; judging whether the first key is stably activated according to the first appearance times of the first charge period.

Abstract: Methods, controllers, and systems for managing data transfer, such as those in solid state drives (SSDs), are described. In some embodiments, the data transfer between a host and a memory is monitored and then assessed to provide an assessment result. A number of storage units of the memory allocated to service another data transfer is adjusted based on the assessment result. Additional methods and systems are also described.

Abstract: A communication link between a host device and a client device can be suspended based on a suspend request or notification provided by the client device. The suspend request can be transmitted by a client device to a host device if the client device determines that suspension is appropriate, and can be sent in response to receiving a polling request from the host device. After receiving a suspend request, the host device can initiate an operation to suspend the communication link between the devices.

Abstract: A storage system configured to associate a virtual port 810 to a plurality of physical ports 800. In response to commands from computers, the storage system 100 manages relation between physical ports and virtual ports and relation between virtual port and volumes by performing processes such as creating a virtual port, assigning LUs to a virtual port, moving a virtual port between physical ports and deleting a virtual port. The storage system also maintains/calculates statistics information for ports and displays the information for each virtual port.

Abstract: A data storage device is provided, including a first data storage device electrically storing write data, a second data storage device magnetically storing write data, and a controller partitioning write data into first and second write data portions. The first write data portion is programmed to the first data storage device and the second write data portion if magnetically written to the second data storage device at the same time.

Abstract: Method and apparatus for managing item sequence numbers in an item processing system. The invention provides for overrun prevention and management of item sequence numbers, which form a part of an image key. In example embodiments, a buffer is provided to determine how close a current item sequence number (ISN) is permitted to be to an overrun value. When the current ISN reaches the buffer value, new entries of documents are prevented or at least restricted from being processed. In some embodiments, a “force mode” is provided in which a sorter can be made to start a new entry even if the buffer value has been exceeded. In such an embodiment, the system can be set up so that a hard stop is enforced when the ISN is within a certain range of the overrun value.

Abstract: An apparatus comprises an audio or video jack connector configured to receive an audio or video jack plug of a separate device, a detection circuit in electrical communication with the connector, and a processor communicatively coupled to the detection circuit. The connector includes an electrical contact for connection to a conducting terminal of the plug. The detection circuit is configured to determine a resistance at the conducting terminal. The resistance is a resistive load of the separate device at the conducting terminal of the plug. The processor is configured to identify a function of the separate device according to the determined resistance, and configure an operation of the apparatus according to the determined function.

Abstract: An apparatus comprises a digital image sensor, a communication port, a detection circuit and a processor. The detection circuit is configured to detect a change in electrical resistance at a connector of the communication port. The processor is configured to initiate an operation of the apparatus according to the detected change in resistance.

Abstract: Architecture that allows programmatic association of devices to sessions and redirects input to the desired session. When the solution is active, input from the devices is not realized by the standard operating system input stack, thereby allowing even reserved key sequences such as Ctrl-Alt-Del to be intercepted and redirected to a desired session. Moreover, in addition to redirecting input to a specific session, the architecture facilitates the filtering of input from unwanted/unmapped devices, the interception and filtering or redirection of reserved key sequences such as Ctrl-Alt-Del, and the maintenance of input state for each session.

Abstract: A data transferring apparatus, that is capable of connecting to at least one device and that transfers a request from a host to the device, obtains, in response to receiving a suspend request for suspending at least one of the devices from the host, configuration data of the target device (or port) for suspension indicated by the suspend request from the device, and saves the obtained configuration data. During resume, the saved configuration data is set in the device (or the port).

Abstract: Methods and systems for encoding and/or decoding digital signals representing serial attached SCSI (SAS) out of band (OOB) signals exchanged over an optical communication between two SAS devices. A SAS OOB signal to be transmitted from a first SAS device to a second SAS device is first encoded as a digitally encoded signal representing the analog SAS OOB signal and then transmitted over an optical communication medium to another SAS device. A receiving SAS device coupled to an optical communication medium decodes a received digitally encoded signal to detect a received, encoded SAS OOB signal and processes the received SAS OOB signal when receipt is detected. The digitally encoded signal may comprise an idle word portion and a burst word portion to represent various SAS OOB signals. Further, the digitally encoded signal may be precomputed in a variety of disparity forms and stored in a memory for lookup and retrieval.

Abstract: A computer program product, apparatus, and method for handling early termination of an I/O operation at a channel subsystem in an I/O processing system are provided. The computer program product includes a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method. The method includes receiving a request to terminate an I/O operation, and transmitting an abort command to a control unit in communication with the channel subsystem in response to receiving the request to terminate the I/O operation. The method also includes transmitting a purge path command to purge a path associated with the I/O operation, where the purge path command includes an error code identifying the request to terminate the I/O operation.

Abstract: According to one embodiment, a data processing circuit included in a data processing apparatus together with plural peripheral circuits including a peripheral circuit configured to output first data includes a processing unit and a stop unit. The processing unit subjects the first data to data processing according to a specified processing algorithm to obtain second data. The stop unit stops the output of the second data to the outside of the data processing circuit in a stop period excluding a period from the time when the plural peripheral circuits finish starting in specified start order until the time when a specified time elapses after the plural peripheral circuits finish stopping in specified stop order.

Abstract: A data transmission apparatus connecting to a network consisted of a plurality of data transmission apparatuses comprises a disconnecting device that disconnects a connection established between a transmission plug of a transmitting node and a reception plug of a receiving node, both nodes being connected to the network, an optimization requesting device that requests optimization of transmitting sequences to the transmitting node, a receiver that receives information about a transmission plug newly assigned to the transmitting sequence used by the transmitting nodes of which connection has been disconnected by the disconnecting device, the information being received as an answer for the optimization request from the transmitting node, and a connecting device that establishes a new connection between the newly assigned transmission plug and the reception plug of the receiving node of which connection has been disconnected by the disconnecting device.

Abstract: A disclosed image forming apparatus includes an image processing device including plural image processing units; a control device configured to control the plural image processing units; and a connection unit configured to connect the image processing device to the control device. Each of the plural image processing units is connected to the control device by one of plural channels; the image processing device is connected to the control device by a first bus including the channels; and the connection unit is provided on the first bus so that the image processing device is connected to the control device by a single connection unit.

Abstract: Proposed is technology for shortening the time required for analyzing and processing commands issued from multiple hosts and speeding up the processing. When a controller receives a command including random IO processing and the reception of commands is complete, it determines whether the valid extents prescribed in seek parameters attached to an LOC command overlap, and executes extent exclusive wait processing which causes access to the logical volume to enter a wait state or access processing to the logical volume based on the determination result. If the reception of commands is incomplete, the controller determines whether the access ranges (extents) designated in a DX command overlap, and executes extent exclusive wait processing or access processing to the logical volume based on the determination result.

Abstract: A method of transmitting data on a data line between a central control device and a decentralized data processing device. During a normal operation of the system, the central control device periodically sends synchronization pulses to the at least one data processing device via the data line in order to request data packets, and the decentralized data processing device sends the data thereof to be transmitted, as data packets, to the central control device, following the synchronization pulse. The data line is embodied as a data bus. Each of the decentralized data processing devices is configured by the central control device before the first transmission of data packets to the central control device. In order to configure the system, a bi-directional communication is carried out between the central control device and the at least one decentralized data processing device.

Abstract: A multi-core/multi-package bus termination apparatus includes a configuration array and a plurality of drivers. The configuration array generates location/protocol signals that each direct one of the plurality of drivers on the bus to employ location-based bus termination or protocol-based bus termination. The plurality of drivers is coupled to the plurality of location/protocol signals, a plurality of location signals, a bus ownership signal, and a multi-package signal. Each of the plurality of drivers controls how one of a plurality of nodes is driven responsive to a first state of one of the plurality of location/protocol signals.

Abstract: The physical server includes a hypervisor for managing an association between the virtual server and the I/O device allocated to the virtual server. The I/O switch includes: a setting register for retaining a request to inhibit a transaction from being issued from the I/O device to the virtual server; a Tx inhibition control module for performing an inhibition of the transaction from the I/O device to the virtual server, and guaranteeing a completion of a transaction from the I/O device issued before the inhibition; a virtualization assist module for converting an address of the virtual server into an address within a memory of the physical server; and a switch management module for managing a configuration of the I/O switch.

Abstract: A memory controller including an address incrementer and a page crossing detect logic. The address incrementer may be configured to generate a next address in a burst from a current address in the burst. The page crossing detect logic may be configured to determine whether the burst will cross a memory page boundary based on the current address and the next address. The memory controller may be configured to automatically split bursts crossing page boundaries.

Abstract: A system and method of broadcasting data to multiple targets across a system bus, such as the peripheral component interconnect (PCI) bus, that does not normally support broadcast transfers, in which one target responds to the bus transaction and the remaining targets listen in on the bus transaction to receive data from the system bus. The responding target stalls the bus transaction when any of the listening targets communicate to the responding target that they are temporarily unable to accept the data on the bus.

Abstract: A method and apparatus for detecting a connection between a peripheral device and a host device is described.

Abstract: A computer-implemented method, system and computer program product for managing USB ports on blades in a blade center are presented. A set of remotely-transmitted instructions causes a multiplexer to physically disconnect one or more selected USB ports on a blade. In one embodiment, the same one or more selected USB ports are also software-disabled by a USB software-based controller.

Abstract: A processor having a core configured to control a keyboard and a plurality of pins connected to the core, configured to transfer signals from the processor to the keyboard. A controller is configured to transfer signals from one or more registers through at least one of the pins, intermittently with signals transferred to the keyboard.

Abstract: A system on a chip for network devices. In one implementation, the system on a chip may include (integrated onto a single integrated circuit), a processor and one or more I/O devices for networking applications. For example, the I/O devices may include one or more network interface circuits for coupling to a network interface. In one embodiment, coherency may be enforced within the boundaries of the system on a chip but not enforced outside of the boundaries.

Abstract: Transferring data between devices utilizing state data. The devices may include a writer device and a reader device, each coupled to a common bus. A host device may create a transfer session between the devices. Each of the host device, the writer device, and the reader device may maintain state data of the transfer session. The host device may notify at least one of the reader device or the writer device of a state change from a disabled state to an enabled state. After enabling, data may be transferred directly between the writer device and the reader device without involving the host device. Finally, the host device may notify at least one of the reader device or the writer device of a state change from the enabled state to the disabled state. After disabling, the direct transfer of data between the writer device and the reader device may be stopped.

Abstract: A semiconductor integrated circuit apparatus, comprising a data transmitter circuit, and a plurality of data receiver circuits each having a data converter circuit which restores each of bits of identification number data and transfer data from a shift register of the data transmitter circuit to 2-bit complementary data transmitted via first and second transmission lines, a reception control circuit which, when a transfer completion signal has been received via a third transmission line, compares an allocated identification number with the restored identification number data, and a shift register provided in association with the reception control circuit, wherein each reception control circuit feeds transfer data transmitted from the data transmitter circuit corresponding to the identification number data to the associated shift register in accordance with a result of comparison between the identification number data and the allocated identification number.

Abstract: Methods and apparatus to provide a high throughput pipelined data path are described. In one embodiment, an apparatus may include three stages to process inbound data packets, e.g., to align one or more bits of data. Other embodiments are also described.

Abstract: A data transmission apparatus connecting to a network consisted of a plurality of data transmission apparatuses comprises a disconnecting device that disconnects a connection established between a transmission plug of a transmitting node and a reception plug of a receiving node, both nodes being connected to the network, an optimization requesting device that requests optimization of transmitting sequences to the transmitting node, a receiver that receives information about a transmission plug newly assigned to the transmitting sequence used by the transmitting nodes of which connection has been disconnected by the disconnecting device, the information being received as an answer for the optimization request from the transmitting node, and a connecting device that establishes a new connection between the newly assigned transmission plug and the reception plug of the receiving node of which connection has been disconnected by the disconnecting device.

Abstract: Various apparatuses, methods and systems for dual JTAG controllers with shared pins disclosed herein. For example, some embodiments provide a boundary scan apparatus having a first boundary scan circuit with a first plurality of control inputs, a second boundary scan circuit with a second plurality of control inputs, and a plurality of boundary scan control signals connected to the first plurality of control inputs on the first boundary scan circuit and to the second plurality of control inputs on the second boundary scan circuit. At least two of the plurality of boundary scan control signals are connected between the first boundary scan circuit and the second boundary scan circuit in a crossover fashion.

Abstract: The invention provides a signal receiving circuit applied to multiple digital video/audio transmission interface standards. The signal receiving circuit includes at least an input interface for receiving an input signal, and at least an interface circuit. The input interface includes a set of shared input terminals, a set of first separate input terminals for receiving an input signal corresponding to a first transmission specification with the set of shared input terminals, and a set of second separate input terminals for receiving an input signal corresponding to a second transmission specification with the set of shared input terminals. The interface circuit includes a control circuit coupled to the input interface for supplying a control signal, and a processing module coupled to the input interface and the control circuit for processing the input signal according to the control signal to generate an output signal.

Abstract: An interface between USB devices employs isolation techniques to provide electrical isolation of a USB signal for transmission of the USB signal between the devices. Unidirectional isolator channels are utilized to transmit the USB signals, and a selection of an isolator channel operating in an intended direction is performed by either direction control logic or a USB hub function. Logic may be employed to detect a device attempting to initiate a USB signal. The logic operates to enable a transmitter on a receiving side and isolate the USB signal through an isolator channel operating in a transmission direction.

Abstract: An apparatus and method are provided that enable I/O devices to be shared among multiple operating system domains. The apparatus has a first plurality of I/O ports, a second I/O port, and link training logic. The first plurality of I/O ports is coupled to a plurality of operating system domains through a load-store fabric. Each of the first plurality of I/O ports is configured to route transactions between the plurality of operating system domains and the switching apparatus. The second I/O port is coupled to a first shared input/output endpoint. The first shared input/output endpoint is configured to request/complete the transactions for each of the plurality of operating system domains. The link training logic is coupled to the second I/O port. The link training logic initializes a link between the second I/O port and the first shared input/output endpoint to support the transactions corresponding to the each of the plurality of operating system domains.

Abstract: Methods of preparing a power saving state, a Universal Serial Bus (USB) device and a USB host are provided. A method of preparing a power saving state comprises sending a request from a USB device to a USB host, the USB host being connected to the USB device via a USB and the request requesting that the USB host shall stop any bus traffic on the USB. Another method of preparing a power saving state comprises receiving, at a USB host, a request from a USB device, the USB device being connected to the USB host via a USB and the request requesting that the USB host shall stop any bus traffic on the USB. A USB device and a USB host are configured to carry out the respective methods.

Abstract: Methods and systems for performing direct memory access (DMA) transfers are described. An invalidate queue (or other storage device) contains an entry associated with a DMA transfer in progress. If the invalidate queue detects an invalidation of a memory page associated with that entry, then it is marked invalid. If the entry is marked invalid during the DMA transfer, then that DMA transfer is aborted. This enables, among other things, DMA transfers to unpinned virtual memory.

Abstract: An interface between USB devices employs isolation techniques to provide electrical isolation of a USB signal for transmission of the USB signal between the devices. Unidirectional isolator channels are utilized to transmit the USB signals, and a selection of an isolator channel operating in an intended direction is performed by either direction control logic or a USB hub function. Logic may be employed to detect a device attempting to initiate a USB signal. The logic operates to enable a transmitter on a receiving side and isolate the USB signal through an isolator channel operating in a transmission direction.

Abstract: A relay connector unit for communicating an electronic control unit with a plurality of electronic devices includes: a first connecting unit connected to the electronic control unit; a second connecting unit having a plurality of circuits connected to the electronic devices respectively; and a transferring unit connected to the first connecting unit and the second connecting unit. The transferring unit transmits first information received by the first connecting unit from the electronic control unit to at least one of the electronic devices through a corresponding circuit, on the basis of circuit identifying data included in first information, the circuit identifying data indicating the corresponding circuit to be transferred to or from. The transferring unit appends the circuit identifying data to second information received from one of the electronic devices through the corresponding circuit to transmit the second information to the electronic control unit through the first connecting unit.