Abstract: The present disclosure provides a CPU interconnect device, the CPU interconnect device connects with a first CPU, which includes a quick path interconnect QPI interface and a serial deserial SerDes interface, the quick path interconnect QPI interface receives serial QPI data sent from a CPU, converts the received serial QPI data into a parallel QPI data, and outputs the parallel QPI data to the serial deserial SerDes interface; the serial deserial SerDes interface converts the parallel QPI data output by the QPI interface into a high-speed serial SerDes data and then send the high-speed serial SerDes data to another CPU interconnect device connected with another CPU. The defects of poor scalability, long data transmission delay, and a high cost of an existing interconnect system among CPUs can be solved.

Abstract: An integrated circuit (IC) device can include a serial communication first interface (I/F) circuit electrically coupled to first physical connections of the IC device, and configured to respond to communication signals received at the first physical connections; at least one serial communication second interface (I/F) circuit electrically coupled to second physical connections of the IC device, and configured to enable data transactions over the second physical connections; and a repeater circuit configured to bypass the first I/F circuit and enable serial communication signals to be transmitted from the first physical connections to the second physical connections. Systems including such an IC device and related methods are also disclosed.

Abstract: An adapter that fits to a touchscreen of a tablet computer or mobile phone enabling input and output to and from the device. Output is achieved by a plurality of phototransistors arranged in a matrix which interpret a plurality of video image dots, squares or groups of pixels on the tablet computer or mobile phone touchscreen converting them to 1s (ones) or 0s (zeroes). Input is achieved by a plurality of conductors which are selectively electrified by control electronics to a charge sufficient to disrupt the field or capacitance of the touchscreen finger tip sense at a plurality of locations on the screen. A program(s) on the tablet computer or mobile phone interprets the electronically controlled touches as data.

Abstract: A system and corresponding method for transferring data via an interface assembly is provided. The data is transferred between a USB port of a first device and a media port of a second device. Uncompressed high definition media data may be received from the USB port. The received uncompressed high definition media data may be supplied to a media connector in accordance with a first media standard, such that the supplied data can be transmitted in accordance with the first media standard via the media connector to the media port of the second device. The uncompressed high definition media data may include multimedia data and side-band communication data. A single signal may be encoded and decoded in accordance with a protocol that enables the single signal to communicate all side-band communications to and from the source device via a single pin of a USB connector.

Abstract: To address the need for efficient and reliable testing of integrated devices, system on chips, and computers, deterministic behavior for an interface is accomplished by fixing variation in latency associated with receiver and transmitter data stream. The interface may be a serial interface that is PCIe compliant and corrects latency variations in the receiver that consequently results in deterministic transmit data. Consequently, the data received and/or transmitted is predictable with respect to time and facilitates testing and validation of the devices and logic associated with the interface.

Abstract: A format converter includes a first input buffer for storing input data, an output buffer for storing output data, a converter connected between the first input buffer and the output buffer, and a register that the converter refers to. The register allows plural kinds of conversion patterns to be defined in conformity with a desired data format conversion. The converter generates the output data based on the input data, in accordance with the conversion pattern defined in the register.

Abstract: Apparatus and methods are provided for alleviating processing requirements of a central computer in a vessel. Each apparatus is placed in close proximity to one or more pieces of electronic equipment implementing a legacy interface. The apparatus processes data to and from the electronic equipment, including converting data to formats consistent with the formats used by the intended recipient.

Abstract: A KVM switch includes: a first input portion and a second input portion that inputs a plurality of video signals from the first and the second information processing apparatus, respectively; a converting portion that converts the video signals input from the first or second input portion into a plurality of pieces of image data which are capable of being displayed on a remote terminal; a transmitting and receiving portion that transmits the pieces of converted image data to the remote terminal, and receives various requests from the remote terminal; and a switching portion that switches the video signals input from the first input portion to the video signals input from the second input portion when the transmitting and receiving portion receives a switching request for switching from a first information processing apparatus to a second information processing apparatus from the remote terminal.

Abstract: A method of conversion by at least one interface circuit connected between a first bus including at least one data wire and one clock wire, and at least one second single-wire bus, of a transmission between a master circuit connected to the first bus and at least one slave circuit connected to the second bus, wherein a speculative read command is sent to the slave circuit before interpreting the state of a bit for controlling a reading or a writing, originating from the master circuit.

Abstract: A serial interface circuit which can adapt to various frame formats to reduce the load on a CPU. The interface circuit includes a rewritable control register used for programmably specifying a field structure to be targeted for processing out of structures of fields preceding a data field of a frame as defined by a communication protocol. The interface circuit analyzes the field structure preceding the data field according to a setting of the control register. When a destination of a received frame is determined to match an expected value, the interface circuit issues a request for the CPU to process the data field information. After a setting is made on the control register, the serial interface circuit can adapt to various formats of frames as defined by a communication protocol according to the information held there, and can also analyze a destination.

Abstract: An adapter that fits to a touchscreen of a tablet computer or mobile phone enabling input/output to the device for embedded control applications. Output is achieved by a plurality of photo-transistors arranged in a matrix which interpret a plurality of video image dots, squares or groups of pixels on the tablet/mobile phone screen converting them to 1s (ones) or 0s (zeroes). Input is achieved by a plurality of wires (or conductors) insulated from each other by a dielectric and/or capacitive dielectric and arranged in a grid with ground or negative conductors and signal conductors which are selectively electrified by control electronics to a charge sufficient to disrupt the field or capacitance of the touchscreen finger tip sense at a plurality of locations on the screen. An application program(s) on the tablet/mobile phone interprets the electronically controlled touches as digital data.

Abstract: An embedded system includes an ARM processor and a number of b-bit peripheral processors connected to the ARM processor through a converting chip. The ARM processor includes pins P0˜Pa-1 divided into teams T1˜TN, each of which includes b pins, a and b are integral multiple of 8, wherein a=N×b. The number of the peripheral processors is N and each team corresponds to one peripheral processor. The converting chip reads an a-bit data from the ARM processor, converts the data into a plurality of b-bit data, and transfers each b-bit data to a peripheral processor, where the number of the b-bit data is N. The converting chip further reads one b-bit data from each peripheral processor in sequence, converts the read plurality of b-bit data into an a-bit data, and transfers the a-bit data to the ARM processor.

Abstract: Embodiments of the invention are generally directed to adaptive interconnection for multimedia devices. An embodiment of an apparatus includes an apparatus that includes one or more ports, the one or more ports including one or more adaptable ports, where each adaptable port includes a receptacle to accept a plug of a connector element, the receptacle including multiple electrical contacts. The apparatus further includes an adaptable port device to process data including multimedia data received at the one or more adaptable ports, where the adaptable port device is to detect a multimedia signal format for multimedia data received at each of the adaptable ports, and adapt each of the adaptable ports to be compatible with the detected multimedia signal format for the adaptable port.

Abstract: A serial port remote control circuit includes a first interface circuit, a control circuit, an output circuit, and a power circuit. The first interface circuit converts recommended standard 232 (RS232) level signals to transistor-transistor logic (TTL) level signals or vice versa. The control circuit is connected to the first interface circuit, to convert the TTL level signals to physical bus signal or vice versa. The output circuit is connected to the control circuit, to convert the received physical bus signals from the control circuit to network bus signals or vice versa. The power circuit outputs a first voltage and a second voltage converted from the first voltage to the control circuit, the first interface circuit, and the output circuit.

Abstract: Embodiments disclosed herein provide for capability identification for accessories coupled with a mobile computing device. During capability identification an accessory can request capability information from a mobile computing device. In some embodiments, the accessory can specifically request capability information associated with a specific lingo. In response, the mobile computing device can respond with a message that indicates the capabilities of the mobile computing device that are supported. In some embodiments, the capabilities can be those capabilities associated with the specified lingo. In some embodiments, if the mobile computing device does not support a lingo, then the mobile computing device can respond to the request from the accessory with a negative acknowledgement.

Abstract: A dual-interface connector for providing an interface to a storage device and an interface to a host and for connecting between a storage device and a host includes a storage device interface, for connecting with a storage device, and a host interface, for connecting with a host. A controller is operable in at least two distinct modes of operation. In a first mode of operation, the controller enables a session to be opened, by the host, between the storage device and the host when the storage device is connected to the storage device interface and the host is connected to the host interface. In a second mode of operation, the controller is operative, if an open session exists between the storage device and the host, to maintain the open session between the storage device and the host even after the storage device is disconnected from the storage device interface.

Abstract: An arrangement including a first semiconductor chip and a second semiconductor chip connected thereto, where the second semiconductor chip is additionally connected to electrical loads and drives these electrical loads on the basis of a timing which is prescribed to it by load control data, and where the first semiconductor chip transmits to the second semiconductor chip the aforementioned load control data and pilot data which control the second semiconductor chip, and where the second semiconductor chip transmits to the first semiconductor chip diagnostic data which represent states prevailing in the second semiconductor chip or events which occur. The diagnostic data are transmitted via a first transmission channel and the load control data and the pilot data are transmitted via a second transmission channel.

Abstract: A circuit die to circuit die interface system includes a first circuit die with a first circuit having a first default signal, at least a second circuit die with a second circuit having a second default signal; and a logic circuit disposed on one of the first and second circuit dies and enabled by a default signal from all but one of the circuits to transmit a communication signal from the remaining circuit.

Abstract: This document discusses, among other things, a system and method for deserializing non-packet-based video information received using a physical Universal Serial Bus (USB) interface and providing a high definition output signal to a video port (e.g., an HD video port, such as HDMI, DisplayPort, etc.) using the deserialized video information.

Abstract: A method and apparatus for transmitting a signal to a remote location. The method splits the signal into a multitude of signals that are transmitted down cables. The split signals are collected into a single signal at the receiving end at the remote location. An apparatus for splitting the signals and collecting the split signals is illustrated.

Abstract: A media source device includes media files in either original source format or in alternative digital formats, based on a content descriptor indicated by a client device from a plurality of content descriptors generated to represent possible transcodings of the source format. In the alternative, a media source device can receive a client device report and subsequent request for a media file. The media source device can send the media file to the client device in a particular digital format based on whether the content descriptor corresponding to the media file is compatible or incompatible with the client device. The bit rate used to send the media file to the client device can be adjusted based on the available transmit bit rate.

Abstract: The invention provides KVM console cables, comprising a video connector, a first console connector, a second console connector, a third console connector, a combined connector, and a transmission line. The video connector is utilized to connect to a video monitor. The first, second, and third console connectors are utilized to connect to a first console device, a second console device and third console device, respectively. The combined connector is utilized to connect to a KVM switch. The video connector and the first, second and third console connectors are connected to the combined connector by the transmission line.

Abstract: A command conversion device 14 is connected between an amplifier device 11 and a portable player 13. The amplifier device 11 sends/receives a plurality of types of first commands corresponding to a plurality of types of devices (e.g., CD players, MD recorders, tape recorders, etc.), and performs an operation based on a received first command. The portable player 13 sends/receives a second command, and performs an operation based on a received second command. The command conversion device 14 includes a selector for selecting a type of a first command, and a converter. When a first command of the type selected by the selector is received from the amplifier device 11, the converter converts the received first command into a second command, and sends the second command to the portable player 13.

Abstract: A keyboard-mouse-video (KVM) switch has a server interface, a client interface, a switch circuit and a digital video overlapping circuit. The server interface is connected to plural computers, and the client interface is connected to plural sets of manipulation and display devices. The switch circuit routes paths between the computers and the sets of manipulation and display device. The digital video overlapping circuit overlaps a digital video overlapping image onto a digital video signal received from one of the computers through the server interface. The overlapped digital video signal is then transmitted to one of the sets of manipulation and display device through the client interface.

Abstract: In one embodiment, the present invention includes a method for receiving data from a second device in a first device, forwarding the data from an input/output (I/O) clock domain to a system clock domain of the first device, and providing the data to a functional unit of the first device at a deterministic time. In such manner, the two devices may operate in lockstep fashion. Other embodiments are described and claimed.

Abstract: The invention describes combination I/O modules for automation. Various combinations of inputs and output with different electrical interfaces are offered providing greater flexibility in controller hardware selection.

Abstract: There is described a periphery unit for an automatic device, which can be actuated as an analog input and as an analog output. A number of connections which are to be used as inputs and the number of connections which are to be used as outputs can be adapted in a flexible manner on the respective application from a predetermined number of connections of the periphery unit. As a result, a redundant automatic device wherein said types of periphery units can be used, is provided.

Abstract: A DVD reproducing device is capable of being connected to a certain external electronic device. The DVD reproducing device includes an external input receiving unit connected with the external electronic device to receive an external input signal from the external electronic device. A key input receiving unit receives a user selection signal for selecting whether or not the external input signal is transformed. An external signal processing unit transforms the external input signal into a certain form according to a user selection signal.

Abstract: A method and apparatus is provided for validating a plurality of variable data transmitted in an automobile, comprising generating a control copy and a redundant copy of the variable data, calculating a pre-transmittal cross-check measure using the redundant copy of the variable data, and generating a transmittal message using the control copy of the data and the pre-transmittal cross-check measure.

Abstract: A method and apparatus for compressing uncompressed data by applying a transform prior to the application of a data compression scheme. At decompression time, a transform can be applied after a data decompression scheme has been applied to compressed data.

Abstract: A hybrid data distribution system includes a modulator coupled to an analog device, one or more processors coupled to the modulator, and a database coupled to the one or more processors. The database is configured to store encoded data. The system also includes an Ethernet switch for transmitting the encoded data to a digital device. The Ethernet switch is coupled to each of the database and the digital device. Moreover, the one or more processors are configured to directly or indirectly obtain the encoded data from the database, decode the encoded data, and directly or indirectly transmit the decoded data to the modulator. The modulator is configured to transmit the decoded data to the analog device, and the Ethernet switch is configured to directly or indirectly obtain the encoded data from the database, and to transmit the encoded data to the digital device.

Abstract: A data converter for a padded protocol interface performs, on a first data sample, decoding operations requiring data from second and third data samples, while buffering the second data sample without buffering the third data sample. A state machine controlling the decoding operation waits an additional clock cycle, until the second sample has become the current sample and the third sample has become the second sample and thus is available.

Abstract: A method for copying data over a network operating in accordance with a protocol, such as the ESCON protocol, that supports a given logical address range includes establishing a logical path over the network from a primary storage system to a secondary storage system using path logical addresses within the given logical address range. A virtual path is created over the logical path to carry the data from a source storage device in a first logical subsystem of the primary storage system to a target storage device in a second logical subsystem of the secondary storage system, wherein the first and second logical subsystems have respective first and second subsystem logical addresses which are outside the given logical address range. The virtual path is used in a peer-to-peer remote copy (PPRC) operation to copy the data from the source storage device to the target storage device.

Abstract: A self-contained data storage module receives a data request conforming to a first standard. The data request is translated into a second standard. At least one of the storage devices mounted on a board within the data storage module is identified. The translated data request is transmitted to each identified storage device, where the data request is serviced.

Abstract: The apparatus and method for transferring audio data to a data recorder adopting a personal computer bus to receive audio data enters into data communication mode over a bus without conducting preparation steps for transferring data when a record request is received. The preparation steps include occupying the bus and issuing packet commands. Real-time data such as an audio signal are transferred with no delay to a general optical disk driver satisfying the personal computer (PC) bus interfacing requirement. This allows adoption of a general disk driver for data recording instead of an exclusive audio disk driver, thereby reducing manufacturing cost of a digital audio recorder and enabling the disk driver installed in a digital audio recorder to be used in other devices such as a PC.

Abstract: The present invention relates to an AV network construction apparatus A, comprising: a 1394 link 10 for connecting lines employing an interface of IEEE1394 standard, an information receiving/transmitting means 11, a protocol processing means 12, a virtual device function processing means 20, an integration management means 30 for activating or terminating the virtual device function processing means 20, an OS 40 for activating a pc 103, and a PC device driver 50 for activating a peripheral device M, and a method for constructing such a virtual AV network construction, and a recording medium containing a program concerning the virtual AV network construction method.

Abstract: An information transfer apparatus including an information source connected to an information to constant frequency converter, a transmitter connected to the information to constant frequency converter, a receiver linked to the transmitter, and a constant frequency interpreter connected to the receiver.

Abstract: A peripheral storage device system and a data transfer device for use in a peripheral storage device system are disclosed, which provide for selective information transfer between a peripheral storage device, such as a disk drive, a CDROM drive, or a tape drive, and a host computer in a serial or parallel data format. A cable connector and cable assembly are disclosed for connecting the peripheral storage device system with the host computer, whereby serial data transfer may be accomplished via an ATA connector on one or both of the peripheral storage device and the host computer. In addition, a methodology is disclosed for transferring data between a peripheral storage device and a host computer in one of a serial and a parallel data format.

Abstract: An intelligent network connecting apparatus for serving as a terminal of network includes a female Ethernet connector, female USB connector, converting means, and auto-detecting switch. While a computer couples with the female Ethernet connector, signals would directly communicate between the computer and a remote network. When the computer couples with the female USB connector, the auto-detecting switch would automatically couple the converting means with the network. Meanwhile, the signals passing through the female USB connector would be sent to the converting means and transformed in forms of between USB standard and Ethernet standard, thereby ensuring the signals communicating between the computer and the network.

Abstract: An infrared transmission system with automatic character identification is disclosed. In the process of identifying a selected type of internal code contained in information sent from a sender device, check whether the value of each character contained in the sent information is within a default range of a specific internal code, discard all internal codes having values other than the default range, perform an conversion and an analysis on the qualified information based on the value of internal code thereof, select those less frequently appeared and qualified types of internal codes as the types of internal codes, and convert the received information into one having the type of internal code compatible to the recipient device. This can prevent random codes from occurring, show the correct information at the recipient device, carry out an errorless information communication and exchange between various electronic devices supporting software of different languages.

Abstract: In a tape drive, or other storage device, used for storing computer data, both record data and record structure information such as file marks are encoded with codewords to form an encoded data stream. Of the fixed number of possible fixed-length codewords, one codeword is assigned as a root sequence for one or more longer codewords. Thus, detection of the root sequence during decoding of an encoded data stream triggers the reading of a fixed number of further bits. The further bits represent file marks and any other defined information. In the tape drive (800), the tape drive interface (810) receives record data and file mark commands. The formatter (820) encodes the record data as fixed length codewords.

Abstract: Parallel data is serialized and transmitted and asynchronous data is received and placed into parallel bytes using a hardware assisted interface. The interface can be driven with very little overhead to the DSP. Additional timing registers and enhanced data buffers decrease the necessary DSP resource commitment. Furthermore the hardware settings in the interface can be adjusted by the DSP to optimize the interface's performance in transmitting various asynchronous protocols.

Abstract: A gear box module or circuit can act as an interface for transferring data from a first clock domain to a second clock domain. The gear box circuit uses a level sensitive memory element coupled to an input selection circuit to receive data from logic in the first clock domain and provide the data to logic in the second clock domain. An input selection signal causes the selection circuit to select the input source for the level sensitive memory element, thereby allowing the proper signal to be provided as output to logic in the second clock domain. Additionally, the gear box can provide the proper output signal for logic in the second domain using circuitry to alternately mask the gear box output. The gear box receives control signals, including for example the input selection signal, from control circuitry. The logic in each clock domain does not have to be aware of the clock frequency on the other side of the gear box, nor does it need to be aware of the ratio of clock frequencies between clock domains.

Abstract: A physical layer interface for a serial bus includes a controller for producing parallel data representing a near-end line state of the serial bus. A line transmitter is connected to the controller for converting the parallel data therefrom into serial data and transmitting the serial data to the serial bus. A line receiver is connected to the serial bus for receiving therefrom serial dtaa and converting the received serial data into parallel data representing a far-end line state of the serial bus. A differential line state of the serial bus is detected from the parallel data of the controller and the parallel data of the line receiver. The detected differential line state is the input to the controller. In a modified embodiment, a far-end line state of the serial bus is detected from the near-end line state of the serial bus and a far-end differential signal received by the line receiver and directly supplied to the controller.

Abstract: An interconnectivity scheme for a PC Theatre system includes the use of compatible plug and display connectors on both the display and the host computer. Audio/video signals received by either the display or the computer may be processed by the computer and transmitted between these devices in a standardized signal format using the compatible connectors. The control scheme for facilitating master-slave control of the display by the computer includes the use of various standardized signals and formats as well to ensure compatibility between products manufactured by different companies.

Abstract: An asynchronous FIFO using Asynchronous NULL Convention LOGIC (NCL) to facilitate interfacing between multiple non-synchronous systems with a minimum of design and verification. Multiple interfaces, configurations, means for minimizing latency, and capabilities for datastream processing are also incorporated.

Abstract: An isochronous data pipe provides a bidirectional path for data between an application and a bus structure. The isochronous data pipe includes the ability to send, receive and perform manipulations on any isochronous stream of data, including data on any number of isochronous channels. The isochronous data pipe is a programmable sequencer that operates on the stream of isochronous data as it passes through the isochronous data pipe. The isochronous data pipe is programmed by an application to perform specific operations on the stream of data before the data is either transmitted across the bus structure or sent to the application, thereby pre-processing and manipulating the data before it is delivered to its destination. The operations are performed on both the packet header and the data field of the data packet. The isochronous data pipe can be stopped and started on the occurrence of specific events.

Abstract: Data transfer scheme wherein data transfer rates can be effectively doubled with no increase in the clock speed of the interface. This is accomplished by allowing more than one data transfer to occur on a single clock cycle. This transfer scheme increases the transfer rate of the interface by multiplexing two data groups on the same interface. These data groups are transmitted from a source phase latch at approximately the same time as two strobe signals which have low skew with respect to the data. The master and slave strobe signals are logically combined to create an even latch enable signal and an odd latch enable signal that are used to latch and de-multiplex the multiplexed data groups at a receiving end of a pair of flow-though source synchronous latches.

Abstract: An asynchronous FIFO using Asynchronous NULL Convention LOGIC (NCL) to facilitate interfacing between multiple non-synchronous systems with a minimum of design and verification. Multiple interfaces, configurations, means for minimizing latency, and capabilities for datastream processing are also incorporated.

Abstract: A digital protocol translator including a first protocol circuitry having a first I/O port adapted to communicate using a first digital protocol, the first protocol circuitry including a first controller. The translator further includes a second protocol circuitry having a second I/O port communicating using a second digital protocol different from the first digital protocol, the second protocol circuitry including a second controller in communication with the first controller, such that communications between the first I/O port and the second I/O port are translated between the first protocol and the second protocol. Preferably, the translator further includes a microprocessor and digital memory, where the microprocessor operates under the control of a program stored in the memory.