Abstract: Example computing device that may be implemented to report application status via platform binary tables are disclosed. In response to an upgrade log detected during a BIOS initialization, a platform binary table to a management agent stored in a memory is generated. An application status corresponding with the upgrade log is collected during the BIOS initialization. In response to an operating system initialization, the management agent is launched from the platform binary table to report the application status via the management agent. The upgrade log is removed.

Abstract: Systems and methods for verifying the integrity of a software installation image before installing the software. Security of the software installation process is ensured by providing access to the software image from a security monitor using security policies. An installation system for protecting the installation of a software image includes instructions that, when executing on computing hardware, cause the computing hardware to implement: a verifier engine to verify the integrity of the software image, a security monitor engine to set an initial access state for the software image granting access to the verifier engine and to update the access state for the software image in accordance with at least one security policy, and an installer engine to install software contained in the software image according to the access state.

Abstract: A physiological monitor has a sensor port configured to attach and communicate with a sensor. A processor board is in communications with the sensor port and has a board digital signal processor (DSP). Firmware residing on the processor board is executable by the board DSP so as to calculate physiological parameters in response to a sensor signal received from the sensor. Upgrade tools are individually attachable to the sensor port in lieu of the sensor so as to designate to the processor board which of the physiological parameters, if any, to calculate when the sensor is attached to the sensor port.

Abstract: An information handling system main board CMOS is powered by a CMOS battery, such as to keep a real time clock during a power off state, with the battery ground passed through a ground pad so that ground to the CMOS is incomplete until a coupling device, such as a screw, couples the main board to an information handling system housing. A bi-stable relay couples to the main board between the CMOS battery positive terminal and the CMOS to prevent application of power by the CMOS battery to the CMOS after closing of the ground until an embedded controller that is powered on the main board commands closing of the bi-stable relay.

Abstract: A firmware update system includes firmware storage device(s), an operating system engine coupled to the firmware storage device(s), and a remote access controller device coupled to the firmware storage device(s) and the operating system engine. The remote access controller device receives a single out-of-band firmware update command and, in response, performs a firmware storage device unlock operation to unlock the firmware storage device(s), transmits a firmware update package including a firmware update utility and a firmware update image to the operating system engine to cause the operating system engine to utilize the firmware update utility to update firmware stored in the firmware storage device(s) that was unlocked with the firmware update image and, subsequent to the operating system engine updating the firmware stored in the at least one firmware storage device that was unlocked, performs a firmware storage device lock operation to lock the firmware storage device(s).

Abstract: Aspects include obtaining data to be transformed. A selected transformation to be applied to the data is determined based on a storage block address list entry (SBALE) in a storage block address list (SBAL). The SBALE includes at least one field that is used in determining the selected transformation to be applied. The selected transformation is applied on the data to generate transformed data and the transformed data is placed in a location specified by the SBAL.

Abstract: An information handling system stores a hash values for firmware components for the information handling system. A processor receives an off-host image verification request from a second information handling system. In response to the off-host image verification request, the processor reads first metadata for a next firmware component, provides the first metadata to the second information handling system, and receives a golden hash value from the second information handling system. In response to the first hash value not matching the golden hash value, the processor applies a mitigation policy. In response to the first hash value matching the golden hash value, the processor provides a device verification signal.

Abstract: An event that indicates unexpected shutdown of a hard disk drive is determined. The hard disk includes first and second controllers that control respective first and second independently-operable actuators. Each of the actuators has one or more heads that access one or more spinning disks of the hard disk drive. While receiving power for the hard disk drive via back-electromotive force of a motor driven by the one or more spinning disks in response to the event, the first and second controllers independently move the respective first and second actuators to safe positions. In response to determining the first and second actuators are in safe positions, write cache data associated with the first and second controllers is written to a non-volatile memory.

Abstract: Systems, methods, and software can be used to select a boot loader. In some aspects, a primary boot loader on an electronic device invokes a boot selector stored on a permanent memory storage on the electronic device. The boot selector selects a secondary boot loader stored on the electronic device. The selected secondary boot loader is executed to boot the electronic device.

Abstract: A computing system has a processing device (e.g., CPU, FPGA, or GPU) and memory regions (e.g., in a DRAM device) used by the processing device during normal operation. The computing system is configured to: monitor use of the memory regions in volatile memory; based on monitoring the use of the memory regions, identify at least one of the memory regions of the volatile memory; initiate a hibernation process; and during the hibernation process, copy data stored in the identified memory regions to non-volatile memory.

Abstract: A system for receiving, at a server with one or more processors, a request for a respective product page from a first client system. The system then sends the respective product page to the first client system for display, wherein the respective product page includes a send SMS message link. The system receives, from the first client system, a first SMS message, wherein the first SMS message is generated by user selection of the send SMS message link. The system transmits the first SMS message to a second client system associated with a seller of the respective product.

Abstract: Memory controllers, devices, modules, systems and associated methods are disclosed. In one embodiment, a memory controller is disclosed. The memory controller includes write queue logic that has first storage to temporarily store signal components of a write operation. The signal components include an address and write data. A transfer interface issues the signal components of the write operation to a bank of a storage class memory (SCM) device and generates a time value. The time value represents a minimum time interval after which a subsequent write operation can be issued to the bank. The write queue logic includes an issue queue to store the address and the time value for a duration corresponding to the time value.

Abstract: A system for receiving, at a server with one or more processors, a request for a respective product page from a first client system. The system then sends the respective product page to the first client system for display, wherein the respective product page includes a send SMS message link. The system receives, from the first client system, a first SMS message, wherein the first SMS message is generated by user selection of the send SMS message link. The system transmits the first SMS message to a second client system associated with a seller of the respective product.

Abstract: Embodiments are described for supporting remote monitoring and management of FPGA (Field Programmable Gate Array) card operations. The FPGA card includes an external interface supporting core operations of the FPGA and for accessing functions defined by the programmable logic of the FPGA. Network activity data is collected from a network controller of the FPGA card. In response to invocation of an internal operations interface function by an external interface request, the collected network activity data is included in a network report for transmission to a remote access controller. A proxy message compliant with the external interface is used to transport the collected network activity data that is not supported by the external interface. The proxy message is transmitted to an FPGA management controller via the external interface, where it is converted to remote management protocol and transmitted to the remote management controller.

Abstract: A method includes: determining whether individualized system data are one or more of: installed on, associated with, and up-to-date with respect to a computer system and/or a hardware component of the computer system; and in response to determining the individualized system data are one or more of: not installed on, not associated with, and not up-to-date with respect to the computer system and/or the hardware component, one or more of: installing the individualized system data to one or more of the computer system and the hardware component; associating the individualized system data with one or more of the computer system and the hardware component; and updating out-of-date individualized system data of one or more of the computer system and the hardware component. Corresponding systems and computer program products are also disclosed.

Abstract: Methods and apparatus to provide isolated execution environments are disclosed. In some examples, the methods and apparatus identify a request from a host application. In some examples, the methods and apparatus, in response to identifying the request from the host application, load a microcode application into memory when excess micro operations exist in a host instruction set architecture, the microcode application being a fragment of code. In some examples, the methods and apparatus execute the microcode application. In some examples, the methods and apparatus, in response to completed execution of the microcode application, unload the microcode application from memory.

Abstract: A memory medium includes one or more binary images and an update logic image. The memory medium selectively updates binary images having contiguous memory sectors erased before being rewritten. The update logic image includes instructions for determining whether an updating operation is to be performed and determining memory addresses of the memory medium at which a corresponding replacement image can be recorded. The instructions are also for erasing the determined memory addresses and writing the replacement image to the determined memory addresses.

Abstract: An example method is provided to perform distributed power management for a distributed storage system accessible by a cluster in a virtualized computing environment. The method may comprise a first host from the cluster determining to initiate entry into a partial suspend mode and sending a request message to the cluster to take control of a storage controller of the first host. The method may comprise the first host receiving a response message from a second host from the cluster indicating availability to take control of the storage controller, and transferring control of the storage controller to allow the second host to control the storage controller via a network controller of the first host. The method may further comprise the first host entering into the partial suspend mode to suspend operations of one or more components while the storage controller remains controllable by the second host via the network controller.

Abstract: A memory chip coupled to a host includes a memory and a controller. Multiple boot images having the same content are pre-loaded in the memory. The controller is coupled to the memory for processing data transmission between the memory chip and the host. The controller further determines whether the memory chip enters a boot mode for the first time. When the memory chip enters the boot mode for the first time, the controller accesses the memory so as to obtain a correct boot image from the boot images and transmits the correct boot image to the host.

Abstract: A computer-implemented method for replacing application methods at runtime may include identifying an application at runtime that includes a target method to replace at runtime with a source method, locating a target address of a target method data structure (that includes a target code pointer to method code of the target method) within memory at runtime that is referenced by a target class, determining a source address of a source method data structure (that includes a source code pointer to method code of the source method) within memory at runtime that describes the source method, and modifying the application at runtime to have the target class reference the source method instead of the target method by copying the source method data structure from the source address to the target address and, thereby, replacing the target code pointer with the source code pointer. Various other methods and systems are also disclosed.