Abstract: A hardware/software co-compressed computing method for a static random access memory (SRAM) computing-in-memory-based (CIM-based) processing unit includes performing a data dividing step, a sparsity step, an address assigning step and a hardware decoding and calculating step. The data dividing step is performed to divide a plurality of kernels into a plurality of weight groups. The sparsity step includes performing a weight setting step. The weight setting step is performed to set each of the weight groups to one of a zero weight group and a non-zero weight group. The address assigning step is performed to assign a plurality of index codes to a plurality of the non-zero weight groups, respectively. The hardware decoding and calculating step is performed to execute an inner product to the non-zero weight groups and the input feature data group corresponding to the non-zero weight groups to generate the output feature data group.

Abstract: Disclosed are examples of apparatuses including memory devices and systems comprising memories sharing a common enable signal, wherein the memories may be put into different power modes. Example methods for setting the different power modes of the memories are disclosed. In some examples, different power modes may be set by issuing memory group-level commands, memory-level commands, or combinations thereof.