Abstract: Systems and methods are provided for encoding forwarded error for data bus width conversion. Input data and input forwarded error information are received. System input parity information is computed based on the input data and the input forwarded error information. Output data based on the input data and system output parity information based on the system input parity information are provided, and it is determined whether to indicate a forwarded error output based on the output data and the system output parity information.

Abstract: A program is obfuscated by reordering its instructions. Original instruction addresses are mapped to target addresses in an irregular way, with position dependent address steps between the addresses of logically successive instructions. Preferably pseudo-random address steps are used, for example with address steps that have mutually opposite sign with equal frequency. The data processing device has an instruction flow control unit that updates instruction addresses according the position dependent address steps. The instruction flow control unit may comprise a circuit that contains secret information, which is not normally accessible from the outside, to control the updates. A lookup table may be used for example, with address steps, successor addresses or mapped address values. In an embodiment the mapping of original instruction addresses to target addresses may be visualized by means of a path (36) along points in an n-dimensional array, where n is greater than one.