Formation Of Sub-program Jump Address Or Of Return Address (epo) Patents (Class 712/E9.083)
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Patent number: 12112147Abstract: Systems and methods are disclosed that relate to graphically representing different components (e.g., software modules, libraries, interfaces, or other blocks of code) that may be included in an application, linking the components in an ordered sequence to embody the application, and deploying the application to perform a task. The components may be displayed and represented as graphical components in a graphical application editor, or any other development environment. The graphical application editor may perform various operations with respect to the graphical components and the components respectively represented by and corresponding therewith. The operations may include facilitation of linking implemented instances of the graphical component objects together and/or developing the application by linking the underlying code associated with the graphical component objects according to the linking of the graphical component objects.Type: GrantFiled: June 8, 2022Date of Patent: October 8, 2024Assignee: NVIDIA CORPORATIONInventors: Chunlin Li, Prashant Gaikwad, Kaustabh Purandare
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Patent number: 12050911Abstract: The present disclosure relates to a computing device. A computing device includes an arithmetic processing circuit configured to execute a program, and a program memory for storing the program. Each instruction in the program has a length of 16 bits. The program memory has a first memory area, and a second memory area in which higher addresses than the first memory area are associated. The arithmetic processing circuit has a 16-bit program counter for specifying an address to be read, and reads and executes an instruction at an address corresponding to an upper 15-bit value of the program counter from a target memory area, wherein the target memory area is, of the first memory area and the second memory area, a memory area corresponding to a value of a least significant bit in the program counter.Type: GrantFiled: November 10, 2022Date of Patent: July 30, 2024Assignee: Rohm Co., Ltd.Inventors: Tetsuya Ooka, Takahiro Nishiyama
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Patent number: 11921559Abstract: Embodiments are directed to a power grid distribution for a deterministic processor. The deterministic processor includes a plurality of functional slices, a plurality of data transport lanes for transporting data across the functional slices along a first spatial dimension, and a plurality of instruction control units (ICUs). An instruction in each subset of the ICUs includes a functional slice specific operation code and is transported to a corresponding functional slice along a second spatial dimension orthogonal to the first spatial dimension. A power supply grid of metal traces is spread across the first and second spatial dimensions for supplying power to the functional slices and the ICUs. At least a portion of the metal traces are routed as discontinuous stubs along the first spatial dimension or the second spatial dimension.Type: GrantFiled: April 28, 2022Date of Patent: March 5, 2024Assignee: Groq, Inc.Inventor: Jeffrey Werner
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Patent number: 11789650Abstract: The present technology relates to an electronic device. According to the present technology, a storage device includes a memory device configured to include memory cells for storing data and circuitry structured to generate voltage information indicating whether a voltage used for performing an operation on the memory cells is included in a preset voltage range; and a memory controller in communication with the memory device and configured to transmit, to the memory device, a status command requesting for a status response indicating a status of the operation, and control the memory device to change a voltage used for performing the operation based on the status response provided from the memory device and including the voltage information.Type: GrantFiled: May 21, 2021Date of Patent: October 17, 2023Assignee: SK HYNIX INC.Inventor: Chung Un Na
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Patent number: 11675593Abstract: Embodiments of the invention are directed to updating a dynamic library. Aspects include receiving an indication that the dynamic library has been updated and identifying all program modules that depend on the dynamic library. Aspects also include, for each program module that depends on the dynamic library, reassigning an application program interface (API) address for a current version of the dynamic library to an API address of the updated version of the dynamic library.Type: GrantFiled: August 31, 2021Date of Patent: June 13, 2023Assignee: International Business Machines CorporationInventors: Jing Lu, Dong Hui Liu, Xiao Yan Tang, Yong Yin, Peng Hui Jiang, Xiang Zu, Jia Yu
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Patent number: 11645068Abstract: A method for implementing a function jump includes receiving a first function, searching, for an address of the first function, a first data structure in which addresses of a plurality of functions are stored, where a patch function used to replace the first function is available when the address of the first function is found, searching a second data structure for an address of the patch function based on the address of the first function, where correspondences between a plurality of functions and patch functions of the functions are stored in the second data structure, jumping from the first function to the patch function of the first function based on the address of the patch function of the first function, and executing the patch function of the first function to respond to the call to the first function.Type: GrantFiled: April 20, 2021Date of Patent: May 9, 2023Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Leibin Hu, Congyang Wen, Hui Wang, Jian Ma
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Patent number: 10120745Abstract: Corruption of program stacks is detected by using guard words placed in the program stacks. An instruction, which is to be used in protecting stacks of a computing environment, is provided in a called routine, based on determining that the called routine is to include logic to detect corruption of stacks. The instruction in the called routine is to check a guard word provided by a calling routine to determine whether a stack is corrupt.Type: GrantFiled: January 6, 2016Date of Patent: November 6, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Karl J. Duvalsaint, Michael K. Gschwind, Valentina Salapura
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Patent number: 10083296Abstract: In an example, there is disclosed a computing apparatus having one or more logic elements providing a security agent operable for: detecting that a first process has launch a second process and placed the second process in a suspended state; detecting that the first process has modified or attempted to modify the second process; classifying the modification as potentially malicious; and taking a remedial action. There is also disclosed one or more computer-readable storage mediums having stored thereon executable instructions for providing the security agent, and a computer-executable method of providing the security agent.Type: GrantFiled: June 27, 2015Date of Patent: September 25, 2018Assignee: McAfee, LLCInventors: Aditya Kapoor, Joel R. Spurlock, Jonathan L. Edwards
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Patent number: 9977897Abstract: Systems, methods and media are shown for detecting a stack pivot programming exploit that involve extracting return addresses from a call stack from a snapshot of a running program and, for each extracted return address, identifying a stack frame and following frame from stack pointer information, checking whether the stack is consistent with the type of stack generated by the operating system and architecture conventions, and alerting that a stack pivot is likely if an anomaly in stack layout is found. Some examples involve determining whether the stack frame and following frame follow consistently in one of ascending or descending addresses. Some examples involve, given a consistent directional polarity and metadata about the directional polarity of the stack specified by one of the microarchitecture, operating system, software, or other configuration, determining whether the observed directional polarity corresponds to the expected directional polarity.Type: GrantFiled: July 16, 2015Date of Patent: May 22, 2018Assignee: Leviathan Security Group, Inc.Inventor: Falcon Momot
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Patent number: 9971900Abstract: Implementations are provided herein for maintaining a set of cryptographic algorithms in the kernel. User space applications can call on the set of cryptographic logic algorithms in the kernel to perform computations on data payloads residing in kernel space memory without having to copy the data payloads out of kernel space memory into user space memory. The results of the cryptographic logic being applied to data payloads can be packaged together with message framing originating from user space and data payloads in the kernel space as a protocol message that can sent through the network stack to a socket. It can be appreciated that by retaining protocol logic in user space, just the cryptographic algorithms need be added to the kernel.Type: GrantFiled: June 30, 2016Date of Patent: May 15, 2018Assignee: EMC IP Holding Company LLCInventor: Brian H. Koropoff
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Patent number: 9825891Abstract: A collaborative communication system that includes a plurality of endpoints and interconnecting nodes configured to communicate via messages over interconnecting channels. Each of the plurality of endpoints and/or interconnecting nodes can determine whether to apply protection to the messages on a per message basis and/or base on the interconnecting channel being used. Thus, a balance between adequate protection and use of system resources and bandwidth can be maintained.Type: GrantFiled: February 26, 2014Date of Patent: November 21, 2017Assignee: Open Invention Newtork, LLCInventors: Charles Wanek, Dan Jones, Todd Vernon
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Patent number: 9760354Abstract: A memory stores code including a plurality of functions and a plurality of function calls each calling one of the plurality of functions. A processor calculates, for each of the plurality of functions, a plurality of index values including a first index value indicating an iteration status of a loop in the function and a second index value indicating the code size of the function. The processor calculates, for each of the plurality of function calls, an evaluation value based on the plurality of index values that are calculated for the function called by the function call. The processor selects one or more of the plurality of function calls, based on the evaluation value, and inlines the selected function calls.Type: GrantFiled: March 15, 2016Date of Patent: September 12, 2017Assignee: FUJITSU LIMITEDInventor: Takayuki Matsuura
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Patent number: 9606855Abstract: Corruption of program stacks is detected by using guard words placed in the program stacks. A called routine executing on a processor checks a guard word in a stack of a calling routine. The checking determines whether the guard word has an expected value. Based on determining the guard word has an unexpected value, an indication of corruption of the stack is provided. Some routines, however, may not support use of guard words. Thus, routines that are interlinked may have differing protection capabilities. A determination is made as to the differing protection capabilities, an indication of the same is provided, and the routines are executed without failing due to the differing protection capabilities.Type: GrantFiled: January 6, 2016Date of Patent: March 28, 2017Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Karl J. Duvalsaint, Michael K. Gschwind, Valentina Salapura
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Patent number: 9332060Abstract: It presented a method, performed in a secure element, the secure element being arranged to enable user applications of the secure element to verify authenticity of incoming user application commands. The method comprises the steps of: receiving a command from a secure element reader for a user application on the secure element, the command comprising an application identifier of the user application; determining whether there is a matching user application in the secure element; invoking the matching user application; and establishing, when there is an absence of any matching user applications, a communication channel with a remote application manager server and sending an absent user application message to the application manager server indicating that the user application has been requested on the secure element. A corresponding secure element, method for an application manager server and application manager server are also presented.Type: GrantFiled: December 4, 2009Date of Patent: May 3, 2016Assignee: Telefonaktiebolaget L M Ericsson (Publ)Inventors: Petter Arvidsson, Mattias Eld