Digital Data Processing System Initialization Or Configuration (e.g., Initializing, Set Up, Configuration, Or Resetting) Patents (Class 713/1)
  • Patent number: 10565380
    Abstract: An apparatus comprising an authentication processor configured to, based on received firmware and predetermined cryptographic authentication information, provide for cryptographic based authentication of the received firmware to control execution of the received firmware by any one of a plurality of processors. Each processor of the plurality of processors is uniquely addressable by a boot sequencer.
    Type: Grant
    Filed: July 11, 2017
    Date of Patent: February 18, 2020
    Assignee: NXP B.V.
    Inventors: Piotr Polak, Vibhu Sharma
  • Patent number: 10560443
    Abstract: Certain aspects direct to systems and methods for performing scheduled power mode switch for thin client computing device. The system includes a server a computing device. The server receives a plurality of inputs, generates, based on the inputs, a power mode switch schedule including at least one sleep time and at least one wake time, and controls at least one computing device functions as a thin client to update configuration data of the at least one computing device with the power mode switch schedule and to switch between the wake mode the sleep mode according to the updated configuration data.
    Type: Grant
    Filed: March 16, 2017
    Date of Patent: February 11, 2020
    Assignee: AMZETTA TECHNOLOGIES, LLC
    Inventors: Veerajothi Ramasamy, Varadachari Sudan Ayanam
  • Patent number: 10558250
    Abstract: Systems and methods for supporting coordinated link up handling following a switch reset in a high performance computing environment. Systems and methods can ensure that when a switch of a fabric is rebooted, HCA ports connected to that switch will be set in Active state at the same time even though link training times for different ports may vary with up to several seconds.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: February 11, 2020
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventors: Bjørn Dag Johnsen, Dag Georg Moxnes, Line Holen
  • Patent number: 10552643
    Abstract: A method performed by a memory controller is described. The method includes, during boot up, issuing a command to a memory to cause the memory to zero out its content. The method also includes bypassing a descrambler when reading from a location in the memory that has not had its zeroed out content written over the scrambled data. The method also includes processing read data with the descrambler when reading from a location in the memory that has had its zeroed out content written over with scrambled data.
    Type: Grant
    Filed: December 28, 2016
    Date of Patent: February 4, 2020
    Assignee: Intel Corporation
    Inventors: John V. Lovelace, Sreenivas Mandava, Debaleena Das
  • Patent number: 10545686
    Abstract: A computing device having firmware, an uninterruptible power supply (UPS), and a memory module with volatile memory. Firmware tasks are prioritized to elevate tasks associated with the copying of the contents of the volatile memory to the nonvolatile memory external to the memory module during the loss of main or primary power.
    Type: Grant
    Filed: July 31, 2015
    Date of Patent: January 28, 2020
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Justin Haanbyull Park, Thierry Fevrier, David F Heinrich, David W Engler
  • Patent number: 10545788
    Abstract: Large-scale data migration processes are managed using a schedule optimizer implemented in software. The schedule optimizer assigns an available data migration window to each server in an inventory of servers based on a scheduling priority determined for that server. For example, servers that have manually scheduled conversion dates are assigned the highest scheduling priority, and servers that have a migration deadline are assigned the next highest scheduling priority. In addition, servers may grouped and data migration may be scheduled for server groups instead of individual servers.
    Type: Grant
    Filed: October 24, 2017
    Date of Patent: January 28, 2020
    Assignee: VMware, Inc.
    Inventor: Mathew P. Koshy
  • Patent number: 10547604
    Abstract: An information recording apparatus has a drive unit to record digital information including digital contents; and a host unit to control reading and writing of the digital information for the drive unit. The host unit has a network processing unit to communicate with a server, a shadow determination unit to determine whether a shadow boot program to be executed prior to a boot program is executable, a shadow reading unit to read the shadow program from the drive unit when the shadow determination unit determines to be executable, a shadow execution unit to execute the shadow program, a server authentication unit to perform authentication with the server in accordance with a processing of the shadow program, and a password transmitter to transmit to the drive unit a password used for unlock of the drive unit when the authentication with the server is successful.
    Type: Grant
    Filed: July 12, 2017
    Date of Patent: January 28, 2020
    Assignee: Toshiba Memory Corporation
    Inventor: Hiroshi Isozaki
  • Patent number: 10545767
    Abstract: A computer-implemented method, for booting a computer system, that provides a list with entries of startup processes. Each startup process defines a resource of the computer system. For each startup process a requirement is defined. The method further comprises fetching one of the entries of the list with entries of startup processes; determining whether the requirement is satisfied for the one of the entries of the list with entries of startup processes; fetching, in case the requirement is not fulfilled, a next one of the entries of the list with entries of startup processes; starting, in case the required resource is fulfilled, the startup process; and repeating the fetching a next one of the entries, the determining and the starting until all startup processes of the list of startup processes have been started.
    Type: Grant
    Filed: April 9, 2019
    Date of Patent: January 28, 2020
    Assignee: International Business Machines Corporation
    Inventors: Reinhard T. Buendgen, Jakob C. Lang, Volker Boenisch, Angel Nunez Mencias
  • Patent number: 10540190
    Abstract: A generic connector module of an integration-platform system reconciles the system's application-independent canonical API with each application-specific API used by an endpoint application. The system generates a software library of application-specific configuration files each capable of enabling the connector to translate commands between one application-specific API format and the canonical-API format. Applications may be added to the system, removed, or updated without revising the connector. When the connector receives an application-specific request from an application or a canonical request from the integration platform, the connector selects an application-specific configuration file that lets the connector translate the received request into its complementary API format. The connector then forwards the translated request to its intended recipient. A converse process occurs when receiving an application-specific or canonical response to the translated request.
    Type: Grant
    Filed: March 21, 2017
    Date of Patent: January 21, 2020
    Assignee: International Business Machines Corporation
    Inventors: Aditya M. Burli, Subramanian Krishnan, Ramya Rajendiran, Nagarjuna Surabathina
  • Patent number: 10540232
    Abstract: Examples disclosed herein relate to using a programmable logic device to perform a recovery operation on non-volatile storage devices. In response to receiving an indication to perform recovery, multiple storage devices are set to a predetermined value by the PLD. Recovery of the storage devices is to begin based on the predetermined value setting.
    Type: Grant
    Filed: September 19, 2017
    Date of Patent: January 21, 2020
    Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
    Inventors: Andy Brown, James T Bodner, David Blocker, James A Blocker
  • Patent number: 10534743
    Abstract: A device and method for providing performance information about a processing device. A stream of performance data is generated by one or more devices whose performance is reflected in the performance data. This performance data stream is then provided to a parallel port for outputting thereof.
    Type: Grant
    Filed: October 16, 2014
    Date of Patent: January 14, 2020
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Elizabeth Morrow Cooper
  • Patent number: 10536484
    Abstract: A graphical user interface provides network security administrators a tool to quickly and easily create one or more courses of action for automatic response to a network threat. The courses of action are hardware and system agnostic, which allows a common response task to be implemented by an underlying response engine for any or multiple similar-function devices regardless of brand or version. The course of action builder allows the administrator to use a simple, graphic-based, business modeling concept to craft and design security response processes rather than having to hard code response routines specific to each piece of hardware on the network. The graphic interface model allows the user of the threat response software incorporating the course of action builder to easily understand the overall flow and paths the response may take, as well as understand the data requirements and dependencies that will be evaluated.
    Type: Grant
    Filed: June 22, 2016
    Date of Patent: January 14, 2020
    Assignee: FireEye, Inc.
    Inventors: Christopher Nelson Bailey, Bernd Constant, Juan Manuel Vela
  • Patent number: 10528746
    Abstract: In one embodiment, an apparatus includes a first virtual machine (VM) including an encryption logic to encrypt first information. The encryption logic may include a first code block stored in a first execute-only region of a memory to encrypt the first information with a first key provisioned by a trusted agent, the first key stored in the first code block. The apparatus may further include a second VM including a decryption logic to decrypt the first information, and a shared buffer to enable secure communication of the encrypted first information from the first VM to the second VM, without involvement of the trusted agent. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 27, 2016
    Date of Patent: January 7, 2020
    Assignee: Intel Corporation
    Inventor: Barry E. Huntley
  • Patent number: 10528096
    Abstract: A computing system includes a first pool of collocated high heat density computing components; a second pool of collocated low heat density computing components; and a reconfigurable switching fabric electrically interconnecting the pools. A first cooling structure is in thermal communication with the first pool; a second cooling structure is in thermal communication with the second pool; and at least one heat rejection unit is in thermal communication with the first cooling structure, the second cooling structure, and at least one heat sink. A controller is configured to obtain a specification of a computing workload; electrically configure at least a portion of the first pool and at least a portion of the second pool to handle the computing workload, by reconfiguring the switching fabric; and select operating parameters for the first and second cooling structures and the at least one heat rejection unit to handle the computing workload.
    Type: Grant
    Filed: June 1, 2015
    Date of Patent: January 7, 2020
    Assignee: International Business Machines Corporation
    Inventors: Timothy J. Chainer, Pritish R. Parida
  • Patent number: 10528358
    Abstract: An apparatus to initialize a port includes a first input-output port to connect to a first device and a control unit to initialize all input-output ports of the apparatus when the apparatus is booted and to skip a power-on self-test (POST) of the first input-output port in response to a request to skip initialization of the first input-output port while the first input-output port is enabled.
    Type: Grant
    Filed: January 23, 2015
    Date of Patent: January 7, 2020
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Binh T. Truong, Larry W. Kunkel
  • Patent number: 10521376
    Abstract: An apparatus may include a baseboard management controller (BMC) configured to monitor one or more statuses of a storage array enclosure of the BMC. The BMC may further communicate with a host device of a PCIe network topology via a PCIe port of the BMC including performing a direct memory access (DMA) write to store status information of the enclosure to a memory of the host device via the PCIe network topology and performing a DMA read to retrieve control information from the memory of the host device via the PCIe network topology. In addition, the BMC may control one or more devices of the storage array enclosure based on the retrieved control information.
    Type: Grant
    Filed: March 15, 2018
    Date of Patent: December 31, 2019
    Assignee: Seagate Technology LLC
    Inventors: Sumanranjan Mitra, Ajit Patil, Sivaprakash Rajaram
  • Patent number: 10520951
    Abstract: Systems and methods for managing a formation of vehicles include at least one of the vehicles having a crossbar switch and a unidirectional antenna coupled to the crossbar switch. The vehicle is configured to form several networks, each including the vehicle and each other vehicle of the formation, using the crossbar switch and the antenna.
    Type: Grant
    Filed: February 22, 2018
    Date of Patent: December 31, 2019
    Assignee: Ford Global Technologies, LLC
    Inventors: Perry Robinson MacNeille, Bo Wu
  • Patent number: 10523754
    Abstract: A method, non-transitory computer readable medium, and application server computing device that receives a request identifying an operation to be performed on an application and a plugin associated with the application. The operation corresponds to an application task in a workflow for a data storage network action. An operating system call is generated to execute the plugin, wherein the call comprises at least one argument that identifies the operation. A standard-out output is obtained from the plugin, wherein the output comprises at least an indication of a status of the operation. The output is parsed, a result object is generated based on the parsed output, and the result object is returned in response to the received request. The result object includes at least the indication of the status of the operation.
    Type: Grant
    Filed: November 25, 2014
    Date of Patent: December 31, 2019
    Assignee: NETAPP, INC.
    Inventors: Keith Tenzer, Charles M. Fouts, Clemens Siebler
  • Patent number: 10515218
    Abstract: Embodiments detailed herein include, but are not limited to, a hardware processor to execute instructions and security circuitry to perform pre-boot operations including signature verification of a portion of firmware in a firmware storage hardware and initiating recovery upon a signature verification failure. The hardware processor comprises a plurality of cores in some embodiments. The hardware processor a multicore processor in some embodiments.
    Type: Grant
    Filed: October 1, 2016
    Date of Patent: December 24, 2019
    Assignee: Intel Corporation
    Inventors: Sergiu D Ghetie, Neeraj S. Upasani, Sagar V. Dalvi, David P. Turley, Jeanne Guillory, Mark D. Chubb, Allen R. Wishman, Shahrokh Shahidzadeh
  • Patent number: 10514942
    Abstract: Systems and methods for using linker scripts for loading system configuration tables. An example method may comprise: packaging, by a host computer system, a first system configuration table and a second system configuration table into one or more memory image files; providing a script comprising a first instruction to load the memory image files into a memory of a virtual machine being executed by the host computer system, the script further comprising a second instruction to resolve, in view of a base address, a reference by the first system configuration table to the second system configuration table; and providing the memory image files and the script to the virtual machine.
    Type: Grant
    Filed: February 24, 2014
    Date of Patent: December 24, 2019
    Assignee: Red Hat Israel, Ltd.
    Inventor: Michael Tsirkin
  • Patent number: 10509908
    Abstract: An electronic device, such as a dynamic transaction card having an EMV chip, that acts as a TPM having a memory, an applet, and a cryptographic coprocessor performs secure firmware and/or software updates, and performs firmware and/or software validation for firmware and/or software that is stored on the electronic device. Validation may compare a calculated checksum with a checksum stored in EMV chip memory. If a checksum calculated for firmware and/or a software application matches a checksum stored in EMV chip memory of the transaction card, the transaction card may operate normally. If a checksum calculated for firmware and/or a software application does not match a checksum stored in EMV chip memory of the transaction card, the transaction card may freeze all capabilities, erase the memory of the transaction card, display data indicative of a fraudulent or inactive transaction card, and/or the like.
    Type: Grant
    Filed: April 3, 2018
    Date of Patent: December 17, 2019
    Assignee: CAPITAL ONE SERVICES, LLC
    Inventors: James Zarakas, David Wurmfeld, Brennon York, Tyler Locke
  • Patent number: 10506122
    Abstract: An information processing apparatus loaded with an application for extending functionality of the information processing apparatus, includes a storage unit configured to, before occurrence of an event relating to an application, store display information including a display item relating to the application and displayed on a display unit of the information processing apparatus, and a display control unit configured to, after occurrence of the event relating to the application, update display relating to the display item according to the display information corresponding to the event stored in the storage unit, under control of a control program that runs on an operating system and provides a framework for managing the application.
    Type: Grant
    Filed: August 4, 2017
    Date of Patent: December 10, 2019
    Assignee: Canon Kabushiki Kaisha
    Inventor: Takeshi Kogure
  • Patent number: 10505795
    Abstract: A method for providing a trial environment to enable a user to try out at least one application in a cloud environment is provided. The method includes steps of: (a) if a selection of an application that the user prefers to try out is detected, acquiring information on a platform that is appropriate to run the application from related information of the application, and determining whether or not the trial environment built on the appropriate platform is available for the application to be run thereon; (b) if the trial environment is detected not to be available by referring to a result of the determination, configuring and setting the trial environment built on the appropriate platform to be available on the basis of the related information of the application; and (c) enabling the user to run the application in the available trial environment.
    Type: Grant
    Filed: July 25, 2017
    Date of Patent: December 10, 2019
    Assignee: TMAXSOFT. CO., LTD.
    Inventors: Young Gil Lee, Myung Kuk Ko
  • Patent number: 10506286
    Abstract: A system and method for polling a plurality of client devices of different types are provided. A reboot and polling tool pre-polls client devices, where the pre-poll is specific to a type of client device and identifies a state of the client devices. The reboot and polling tool then executes a script on the client devices that changes the state of the plurality of client devices. After the script is executed, the reboot and polling tool post-polls the client devices where the post-poll is specific to the type of client device and the post-poll provides information that identifies changes in the state of the client devices caused by the script.
    Type: Grant
    Filed: November 7, 2017
    Date of Patent: December 10, 2019
    Assignee: CSC Holdings, LLC
    Inventor: Christopher Quinn
  • Patent number: 10496557
    Abstract: A transport directive system and associated processes are disclosed for facilitating transport of data between a plurality of disparate network entities. In particular embodiments, each network entity maintains its own data for its respective processes, and the data of each process may be represented in a format preferable to the respective network entity. Collaborating network entities may instantiate instances of applications for executing processes. Network entities with processes including one or more of the same applications may translate data from a first process application at a first network entity to a second process application at a second network entity. The translated data may be transformed from the format preferable at the first process application to the format preferable at the second process application, and furthermore inserted into the second process application. The second process application may reciprocate this data translation in response to events in its respective process.
    Type: Grant
    Filed: April 30, 2019
    Date of Patent: December 3, 2019
    Assignee: KAHUA, INC.
    Inventors: Brian Michael Moore, Jeffrey D Dempsey, Colin Charles Whitlatch, Kenneth Scott Unger
  • Patent number: 10498822
    Abstract: A distributed storage network (DSN) stores encoded data slices in dispersed storage (DS) memories using a DSN namespace divided into a plurality of DSN address ranges. Multiple scanning modules, each including a processor and associated memory, identify DSN address ranges for detection of storage errors within the DSN namespace, and initiate scanning for storage errors within the identified DSN address ranges. The scanning is performed in accordance with a scanning rate associated with each individual scanning module. Each scanning module obtains a target scanning performance level, which specifies a scanning performance level for the detection of storage errors across multiple DSN address ranges associated with more than one scanning module, and determines an actual scanning performance level for storage error detection across the same range of DSN addresses.
    Type: Grant
    Filed: December 5, 2017
    Date of Patent: December 3, 2019
    Assignee: PURE STORAGE, INC.
    Inventors: Ravi V. Khadiwala, Ethan S. Wozniak, Jason K. Resch
  • Patent number: 10496521
    Abstract: When a program counter value during execution of a target program is an execution start address or less or is larger than the execution start address and is equal to or larger than minimum address among a plurality of addresses associated with a plurality of break points, a break circuit interrupts an execution of the target program, and during the interruption of the execution of the target program, and when the program counter value does not match with anyone of the plurality of break points, a debug control unit sets the program counter value as the execution start address to a first register, sets to a second register an address that is larger than the program counter value and is minimum among the plurality of break points as the minimum address, and resumes the execution of the target program from the execution start address.
    Type: Grant
    Filed: December 13, 2017
    Date of Patent: December 3, 2019
    Assignee: Renesas Electronics Corporation
    Inventor: Makoto Yoshida
  • Patent number: 10496144
    Abstract: The present disclosure provides a power management apparatus, method and system. The apparatus comprises: a client management module for configuring power management client module(s) on one or more clients, the power management client module being for power management of the client; a data collector module for collecting, via the power management client module(s), data related to the power management of one or more user accounts on one or more clients; and a repository module for storing the collected data.
    Type: Grant
    Filed: March 26, 2015
    Date of Patent: December 3, 2019
    Assignee: EMC IP Holding Company LLC
    Inventors: Feng Golfen Guo, Grissom Tianqing Wang, Roby Qiyan Chen, Layne Lin Peng, Vivian Yun Zhang, Kay Kai Yan
  • Patent number: 10481901
    Abstract: Systems and methods for performing firmware update on an embedded system by patching. In operation, a computing device may receive an image of replacement firmware, which is a different version of current firmware stored in a non-volatile memory of the embedded system. The computing device then determines the different portions of the replacement firmware from the current firmware by comparing the image of the replacement firmware to the current firmware, and retrieves the different portions from the image of the replacement firmware to form the fragments. In this case, the computing device may create a patch file by data of the fragments, and send the patch file to the embedded system, such that the embedded system may use the patch file to update the current firmware. The size of the patch file would be relatively smaller than the firmware image, thereby reducing update time and resources consumption.
    Type: Grant
    Filed: April 24, 2017
    Date of Patent: November 19, 2019
    Assignee: AMZETTA TECHNOLOGIES, LLC
    Inventors: Yugender P. Subramanian, Balasubramanian Chandrasekaran, David Yoon, Manikandan Ganesan Malliga
  • Patent number: 10482256
    Abstract: An information processing apparatus holding a secure chip includes a determination unit that determines whether the information processing apparatus returns from an idle state; a detection unit that, if the determination unit determines that the information processing apparatus returns from the idle state, detects initialization of the secure chip before starting application software; and a control unit that, if the detection unit detects the initialization of the secure chip, controls an operation of the information processing apparatus so that a hash value of the application software is not registered in the secure chip that is initialized.
    Type: Grant
    Filed: March 28, 2016
    Date of Patent: November 19, 2019
    Assignee: Canon Kabushiki Kaisha
    Inventors: Junichi Hayashi, Koji Harada, Nobuhiro Tagashira, Takami Eguchi, Yasuhiro Nakamoto, Kazuya Kishi, Ayuta Kawazu
  • Patent number: 10484679
    Abstract: An image capturing apparatus which generates an image by shooting a subject, calculates a parameter for image encoding, and generates encoded data by encoding the shot image using the parameter, wherein while encoded data of a first image to be encoded is generated, a first parameter is generated for encoding a second image to be encoded next based on an encoding result of a third image that has been encoded immediately before the first image, and in a period from completion of encoding of the first image to a start of encoding of the second image, one of the first parameter and a second parameter is provided as a parameter for encoding the second image based on a correlation between the first image and the third image.
    Type: Grant
    Filed: November 28, 2017
    Date of Patent: November 19, 2019
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Koji Togita
  • Patent number: 10474224
    Abstract: A method for reducing power in a system is provided according to aspects of the present disclosure. The system includes a chip, and a volatile memory. The method includes entering a sleep state, and exiting the sleep state. Entering the sleep state includes placing the volatile memory in a self-refresh mode, wherein the volatile memory stores one or more binary images and the volatile memory is powered in the sleep state, and collapsing multiple power supply rails on the chip. Exiting the sleep state includes restoring power to the multiple power supply rails on the chip, taking the volatile memory out of the self-refresh mode, and running the one or more binary images on one or more sub-systems on the chip.
    Type: Grant
    Filed: March 14, 2017
    Date of Patent: November 12, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Deva Sudhir Kumar Pulivendula, Venkata Devarasetty, Nikesh Gupta, Srikanth Gudipudi
  • Patent number: 10474472
    Abstract: Embodiments of the present invention provide an operating system establishing method and apparatus. The operating system establishing method in the present invention includes: starting a just enough operating system and enabling a basic application service; acquiring a data selection instruction input by a user, determining a profile providing server according to the data selection instruction, and acquiring operating system information from the profile providing server; and accessing an operating system providing server according to the operating system information, acquiring an operating system copy, and deploying the operating system copy in an operating system container to establish an operating system. In the embodiments of the present invention, hardware and an operating system that are of a terminal are decoupled, which achieves a purpose that a terminal may establish an operating system according to a user preference.
    Type: Grant
    Filed: April 24, 2014
    Date of Patent: November 12, 2019
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Zhandong Wang, Zijun Li, Jingyu Lai
  • Patent number: 10467028
    Abstract: Technologies for reliable software execution include a computing device having a memory that includes multiple ranks. The computing device trains the ranks of the memory and determines a consolidated memory score for each rank. Each consolidated memory score is indicative of a margin of the corresponding rank. The computing device identifies a higher-margin address range using the consolidated memory scores. The higher-margin memory address range is mapped to a higher-margin memory rank. The computing device loads high-priority software into the higher-margin memory address range. The high-priority software may include an operating system or a critical application. A pre-boot firmware environment may publish the consolidated memory scores to a higher-level software component, such as the operating system. The pre-boot firmware environment may map a predetermined address range to the higher-margin memory rank. A critical application may request to be loaded into a higher-margin address range.
    Type: Grant
    Filed: March 21, 2017
    Date of Patent: November 5, 2019
    Assignee: Intel Corporation
    Inventors: Krishnaprasad H, Ramkumar Jayaraman
  • Patent number: 10467015
    Abstract: An information handling system includes a non-volatile memory device for storing basic input-output system (BIOS) firmware. The system also includes a service processor that is coupled to the first non-volatile memory. The service processor initiates access to the first non-volatile memory, and stores configuration information at the non-volatile memory device. The configuration information can include Unified Extensible Firmware Interface (UEFI) Human Interface Infrastructure (HII) strings.
    Type: Grant
    Filed: September 8, 2015
    Date of Patent: November 5, 2019
    Assignee: Dell Products, LP
    Inventors: Sundar Dasar, Yogesh P. Kulkarni, William C. Munger, Mukund P. Khatri
  • Patent number: 10466753
    Abstract: A method and information handling system (IHS) resets one or more system registers of the IHS. The method includes receiving, by the IHS, a system register reset request. In response to receiving the system register reset request, an auxiliary power disable signal is sent to an auxiliary power source and a system register reset enable signal is sent to a register reset controller. The method further includes disabling, by the auxiliary power source, an auxiliary power source output in response to receiving the auxiliary power disable signal. The method further includes disabling, by the register reset controller, a system register power source in response to receiving the system register reset enable signal. The method further resets the one or more system registers to one or more default values in response to detecting that the auxiliary power source output and the system register power source are disabled.
    Type: Grant
    Filed: August 10, 2017
    Date of Patent: November 5, 2019
    Assignee: Dell Products, L.P.
    Inventors: Isaac Q. Wang, Vinh B. Lu, Johan Rahardjo
  • Patent number: 10462020
    Abstract: In one embodiment, a system includes a first interface to receive a request to generate a user interface screen for a selected network device, a memory to store configuration data of the selected network device, a processor to generate, using the configuration data of the selected network device, a first user interface screen showing a graphical representation of an internal configuration of the selected network device in each of at least three different abstraction layers from a plurality of different abstraction layers, one of the at least three different abstraction layers including a physical layer showing a plurality of ports of the selected network device, and a second interface to send the first user interface screen for output to a display device. Related apparatus and methods are also described.
    Type: Grant
    Filed: February 16, 2017
    Date of Patent: October 29, 2019
    Assignee: Cisco Technology, Inc.
    Inventor: Aijaz Pathan
  • Patent number: 10455411
    Abstract: The embodiments of the disclosure disclose a communication method and a mobile terminal. The method is applied to a mobile terminal including an Application Processor (AP) and at least one communication processor, each of the at least one communication processor is connected to the AP, each of the at least one communication processor can be connected to at least two peripheral devices of the mobile terminal, and the mobile terminal has installed thereon a target application. The method includes: determining at least two peripheral devices needed for a data processing task of the target application; allocating a customized communication processor to the at least two peripheral devices; and when the data processing task of the target application is detected, calling the customized communication processor to perform the data processing task of the target application.
    Type: Grant
    Filed: November 9, 2017
    Date of Patent: October 22, 2019
    Assignee: GUANGDONG OPPO MOBILE TELECOMMUNICATIONS CORP., LTD.
    Inventor: Jian Bai
  • Patent number: 10453422
    Abstract: An electronic apparatus including a display panel integrated circuit, an erasable nonvolatile storage and a processor is provided. The erasable nonvolatile storage is configured to store a display panel integrated circuit driving program, and the processor is configured to drive the display panel integrated circuit based on the display panel integrated circuit driving program stored in the erasable nonvolatile storage. The electronic apparatus improves the research and development efficiency and reduces the waste of integrated circuits by using an erasable nonvolatile storage to store a display panel integrated circuit driving program. A driving method for an electronic apparatus is further provided.
    Type: Grant
    Filed: March 29, 2017
    Date of Patent: October 22, 2019
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
    Inventors: Jigang Sun, Pengjun Chen, Wei Sun
  • Patent number: 10445118
    Abstract: Methods, apparatus, systems, and articles of manufacture to facilitate field-programmable gate array support during runtime execution of computer readable instructions are disclosed herein. An example apparatus includes a compiler to, prior to runtime, compile a block of code written as high level source code into a first hardware bitstream kernel and a second hardware bitstream kernel; a kernel selector to select the first hardware bitstream kernel based on an attribute to be dispatched during runtime; a dispatcher to dispatch the first hardware bitstream kernel to a field programmable gate array (FPGA) during runtime; and the kernel selector to, when an FPGA attribute does not satisfy a threshold during runtime, adjust the selection of the first hardware bitstream kernel to the second hardware bitstream kernel to be dispatched during runtime.
    Type: Grant
    Filed: September 22, 2017
    Date of Patent: October 15, 2019
    Assignee: INTEL CORPORATION
    Inventors: Xiangyang Guo, Simonjit Dutta, Han Lee, Yipeng Wang
  • Patent number: 10439868
    Abstract: An electronic device for transmitting configuration information and an operation method thereof are provided. In various embodiments, an electronic device may receive a signal including information related to a media device, from the media device. The electronic device may identify configuration information usable for setting a configuration of the media device, in response to the signal. A level (such a security level or a priority level) of the configuration information may be identified. It may then be determined whether it is permissible for the configuration information to be transmitted to the media device, based on the identified level of the configuration information. If so, the configuration information may be transmitted to the media device.
    Type: Grant
    Filed: February 26, 2016
    Date of Patent: October 8, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jun-Hak Lim, Hyuk Kang, Su-Hyun Kim, Ju-Ah Lee, Young-Jae Choi
  • Patent number: 10437320
    Abstract: Techniques to control power and processing among a plurality of asymmetric cores. In one embodiment, one or more asymmetric cores are power managed to migrate processes or threads among a plurality of cores according to the performance and power needs of the system.
    Type: Grant
    Filed: September 2, 2016
    Date of Patent: October 8, 2019
    Assignee: Intel Corporation
    Inventors: Herbert Hum, Eric Sprangle, Doug Carmean, Rajesh Kumar
  • Patent number: 10430202
    Abstract: Techniques for detecting an early boot error are provided. In one aspect, a host processor may transition to a first phase of an early boot process. The early boot process may occur before the host processor initializes a primary link between the host processor and a management controller. The host processor may then update a dual purpose boot register to store an early boot phase identifier corresponding to the first phase and an early boot status identifier corresponding to the first phase.
    Type: Grant
    Filed: November 13, 2014
    Date of Patent: October 1, 2019
    Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
    Inventors: Suhas Shivanna, Srinivasan Varadarajan Sahasranamam, Nagaraj S Salotagi
  • Patent number: 10430109
    Abstract: Embodiments of the invention provide systems and methods for managing processing, memory, storage, network, and cloud computing to significantly improve the efficiency and performance of processing nodes. More specifically, embodiments of the present invention are directed to a hardware-based processing node of an object memory fabric.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: October 1, 2019
    Assignee: Ultrata, LLC
    Inventors: Steven J. Frank, Larry Reback
  • Patent number: 10432593
    Abstract: Improved techniques to update software in electronic devices that are already in use are disclosed. In one embodiment, software can be updated in a secure and controlled manner using cryptography. The authenticity of the updated software as well as its appropriateness for the particular electronic device can be confirmed prior to update. The software can also be updated on a per module basis. In one embodiment, a server hosts software updates for various electronic devices, and supplies the appropriate software update to the electronic devices via a data network.
    Type: Grant
    Filed: March 7, 2018
    Date of Patent: October 1, 2019
    Assignee: Apple Inc.
    Inventors: Christopher R. Wysocki, Alan Ward
  • Patent number: 10423791
    Abstract: A device runs a hypervisor and a virtual machine. The virtual machine includes a virtual security module, which can be a virtual trusted platform module (TPM). The virtual security module for the virtual machine is encrypted, and in order for the hypervisor to run the virtual machine the virtual security module is decrypted using a security module key. If a host guardian service is accessible, then the hypervisor obtains the key to decrypt the virtual security module from the host guardian service. However, if the host guardian service is inaccessible, then the hypervisor uses a key securely stored in a key cache of the device to decrypt the virtual security module. In one or more embodiments, the hypervisor can obtain the key from the key cache only if a health certificate indicating that the host guardian service trusts the device has been previously obtained from the host guardian service.
    Type: Grant
    Filed: April 27, 2017
    Date of Patent: September 24, 2019
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Dean Anthony Wells, Nir Ben-Zvi, Ryan P. Puffer
  • Patent number: 10423366
    Abstract: An information processing apparatus is connected to an image processing apparatus via a network and includes at least one processor executing instructions to act as an activation control unit configured to activate a status management program for acquiring and displaying information relating to a state of the image processing apparatus, and printer driver configured to generate a print job in the information processing apparatus and unable to activate the status management program in accordance with an instruction to generate a print job. The activation control unit is software that differs from the printer driver and activates the status management program in a case where a print job based on application data issued by an application is generated.
    Type: Grant
    Filed: August 1, 2017
    Date of Patent: September 24, 2019
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Tatsuyuki Yokoyama
  • Patent number: 10423218
    Abstract: Disclosed is a power management integrated circuit including dual one-time programmable memory banks and methods for controlling the same. In one embodiment, the power management integrated circuit (PMIC) includes a first one-time programmable (OTP) memory bank; a second OTP memory bank; and access control logic, communicatively coupled to the first OTP bank and the second OTP bank, the access control logic configured to: utilize the first OTP memory bank for operation of the PMIC upon detecting that the second OTP memory bank is empty, write data to the second OTP memory bank in response to a write request from a host application if the second OTP memory bank is not empty, and utilize the second OTP memory bank for operation of the PMIC upon detecting that the second OTP memory bank is not empty.
    Type: Grant
    Filed: March 12, 2018
    Date of Patent: September 24, 2019
    Assignee: MICRON TECHNOLOGY, INC.
    Inventor: Matthew David Rowley
  • Patent number: 10423398
    Abstract: Systems and methods are described for managing computing resources. In one embodiment, groupings of computer resources having common firmware settings are maintained based on an abstraction firmware framework representing associations between vendor-specific firmware settings and abstracted firmware settings that provide a degree of independence from specific vendor-specific firmware settings. In response to a request for a computer resource with a specified abstracted firmware configuration, it is determined which of the groupings can support the specified abstracted firmware configuration based on at least one criterion for managing the computer resources in accordance with the abstraction firmware framework.
    Type: Grant
    Filed: October 14, 2016
    Date of Patent: September 24, 2019
    Assignee: Amazon Technologies, Inc.
    Inventors: Michael David Marr, Anirudh Balachandra Aithal, Matthew David Klein
  • Patent number: 10423428
    Abstract: A method controls the change in operating system in selected service nodes of a high-performance computer (CHP). The method includes: a step (i) of defining, for the selected service nodes, a reduced version of a new operating system to be installed, a boot kernel, a so-called “reference” tree node software image suitable for the new operating system and including a definition of an instantiation to be established in the service nodes, and an activation module capable of locally installing the reference image in each service node; a step (ii) wherein the defined reference image, boot kernel, activation module, and reduced operating system version are transferred into the service nodes; and a step (iii) wherein the transferred activation module is used in each service node in order to locally install the transferred reference image.
    Type: Grant
    Filed: March 20, 2015
    Date of Patent: September 24, 2019
    Assignee: BULL SAS
    Inventors: Julien Georges, Thierry Iceta, Emmanuel Flacard