Abstract: An apparatus comprising programmable logic devices including a field programmable gate array (FPGA) is presented. In one embodiment, the apparatus also comprises a programmable read only memory (PROM) to store a firmware which includes at least a system boot code and a configuration code. The apparatus further includes a configuration agent to configure the FPGA by using the configuration code and to release the reset to the CPU after the FPGA is configured. In one embodiment, the configuration agent comprises a SPI-FPGA bridge (serial peripheral interface to FPGA configuration interface). In one embodiment, the configuration agent is operable to determine whether the FPGA is ready for configuration based at least on a status from the FPGA.

Abstract: Fast recalibration circuitry for input/output (IO) compensation finite state machine power-down exit is described. The fast recalibration circuitry includes a finite state machine having a volatile memory to store an IO compensation setting and a power supply coupled to the volatile memory to provide power to the volatile memory. The fast recalibration circuitry includes a persistent memory coupled to the volatile memory and one or more circuits, coupled to the volatile memory and the persistent memory, to identify an event to enter a power-down mode, wherein the power-down mode comprises the power supply removing power from the volatile memory and transfer the IO compensation setting in the volatile memory to the persistent memory prior to the power supply removing the power from the volatile memory.

Abstract: Techniques are described for facilitating execution of software programs in a configurable manner, including to configure bootstrapping operations that are performed at startup of the software programs. At least some of the software programs may be software images that each include, for example, a defined file system, an operating system, and one or more application programs. In addition, configuration of the software programs' startup may include using distinct bootstrap packages that each include their own distinct file system, such that loading of a bootstrap package within a software image includes adding the included file system of the bootstrap package to a new location within the defined file system of the software image (e.g., by mounting the included file system of the bootstrap package within the defined file system of the software image, and optionally removing the included file system of the bootstrap package after bootstrapping operations are completed).

Abstract: Techniques for detecting rolling reboots and for taking responsive actions to stop rolling reboots.

Abstract: The present invention is a procedure for a self configuring eNB/E-UTRAN. The eNB/E-UTRAN interacts with the Enhanced Packet Core (EPC) of the LTE network in order to complete the mutual authentication task between the eNB and the EPC and other operating procedures in the eNB self configuration phase.

Abstract: Methods and device coupled to a computing device and a network device are provided. A first module receives a first packet and a second packet via a same single data path from the computing device. A second module receives the first packet at a first buffer via a first path and the second packet at a second buffer via a second path. The first module uses a steering mechanism to steer the first packet in the first path and the second packet in the second path. The second module uses an arbitration module to select the first packet and the second packet for maintaining an order in which the first packet and the second packet are received and for sending the first packet and the second packet to a third module for further processing.

Abstract: A method, system, and article for dynamic management of two or more operating system images for at least two client machines operating in a computer system sub-network. Different physical areas of the sub-network support separate image of the operating system images. As the client machines may be individually subject to movement within the sub-network, an appropriate operating system image is dynamically selected and uploaded to one or more of the individual client machines based upon the physical location thereof.

Abstract: A microcontroller that includes a secure firmware flash controller is provided. The secure firmware flash controller utilizes a hardware assisted boot sequence that performs a firmware code validation. If the firmware code fails validation for any reason, the firmware flash controller locks out access to the firmware RAM and firmware flash controller, and passes control back to the microcontroller for further measures that are protected by security protocols on the microcontroller.

Abstract: A system includes a multi-node chassis including a chassis management module, a plurality of compute nodes, and a physical presence manual actuator for transmitting a physical presence signal to each compute node in response to manual actuation. Each server has a firmware interface, a trusted platform module, and an AND gate. The firmware interface has a general purpose input output pin for providing an enabling signal in response to a user instruction to a firmware interface setup program that communicates with the firmware interface. The AND gate has a first input receiving the enabling signal, a second input receiving the physical presence signal, and an output coupled to the trusted platform module, wherein the AND gate for a selected compute node asserts physical presence to the trusted platform module of the selected compute node in response to receiving both the enabling signal and the physical presence signal.

Abstract: A method uses a firmware interface setup program for a selected compute node (“node”) to cause a firmware interface to enable a trusted platform module (TPM) on the selected node to receive a physical presence (PP) signal. The selected node is selected from a plurality of nodes within a multi-node chassis, wherein each node includes a firmware interface and a TPM. A device within the multi-node chassis is manually actuated to transmit a PP signal to each of the plurality of nodes, such that each node receives the PP signal. The PP signal is asserted to the TPM of the selected node in response to both enabling the TPM of the selected node to be able to receive the PP signal and receiving the PP signal. Still further, the method allows modification of a security setting of the selected node in response to the TPM receiving the PP signal.

Abstract: A microprocessor includes a plurality of processing cores and a configuration register configured to indicate whether each of the plurality of processing cores is enabled or disabled. Each enabled one of the plurality of processing cores is configured to read the configuration register in a first instance to determine which of the plurality of processing cores is enabled or disabled and generate a respective configuration-related value based on the read of the configuration register in the first instance. The configuration register is updated to indicate that a previously enabled one of the plurality of processing cores is disabled. Each enabled one of the plurality of processing cores is configured to read the configuration register in a second instance to determine which of the plurality of processing cores is enabled or disabled and generate the respective configuration-related value based on the read of the configuration register in the second instance.

Abstract: Technologies for performing a platform transformation on a computing device include transforming a transformable component of the computing device from a first hardware configuration in which a first set of hardware features is enabled to a second hardware configuration in which different hardware features are enabled. The computing device has a first capability when in the first configuration and a different capability when in the second configuration. In performing the platform transformation, the computing device determines a platform transformation build, establishes a communication connection with a cloud-based platform transformation service, and identifies and retrieves relevant platform definitions from the cloud-based platform transformation service. The platform definitions are used in effecting the desired platform transformation.

Abstract: In a wired data telecommunication network power sourcing equipment (PSE) coupled to a powered device (PD) carries out an inline power discovery process to verify that the PD is adapted to receive inline power, then a plurality of classification cycles are carried out to convey a series of inline power classes back to the PSE. The series of inline power classes may all be the same, in which case the PD is legacy equipment and is adapted to receive the power level corresponding to that class. If they are not all the same, information is thus conveyed to the PSE which may, for example, correspond to a specific power level to be applied or to other information.

Abstract: A system may comprise a processor (12) and first storage device (18) coupled to the processor. The first storage device contains a basic input/output system (BIOS) (24) executable by the processor. The system may also comprise a second storage device (18) coupled to the processor. The second storage device may contain a management interface (32) usable by an operating system to access the BIOS. A plurality of interface foes (28) may also be provided, each interface file being usable by the management interface to access the BIOS and each interface file defining one or methods for use by the interface or BIOS. While executing the BIOS, the processor determines a configuration of the system and, based on the determined configuration, selects a particular interface file for use during run-time.

Abstract: A computer device and frequency adjusting method for central processing unit are provided. The computer device including a CPU, a voltage regulator module, a clock generator, a power-on module, a chip set and an embedded controller. The power-on module activates the voltage regulator module, the clock generator and the CPU respectively. The voltage regulator module provides the operating voltage of the CPU. The clock generator provides the operating clock of the CPU. Before the CPU is activated, the embedded controller adjusts the operating clock and the operating voltage provided from the clock generator and the voltage regulator module the CPU, the CPU performs overclocking/downclocking directly by using the adjusted operating clock and the adjusted operating voltage after the CPU is activated.

Abstract: A CPU core unlocking device applied to a computer system is provided. The core unlocking device includes a CPU having a plurality of signal terminals and a core unlocking executing unit having a plurality of GPIO ports connected with the corresponding signal terminals of the CPU. The GPIO ports of the core unlocking executing unit generate and transmit and transmit a combination of core unlocking signal to the signal terminals of the CPU to unlock the CPU core.

Abstract: An apparatus, system, and computer readable medium are disclosed for booting a server from a shared storage system. The present invention teaches at least one server having at least one processor, a storage system having a plurality of storage drives and at least one boot volume corresponding to the at least one server, and a switch fabric having at least one switch; the switch fabric isolates boot traffic form storage traffic and enables communication between the server and the boot volume of the storage system. In some embodiments the switch fabric includes one or more partitionable switches that isolate boot traffic from storage traffic. The boot volumes may be a redundant array of storage devices. In certain embodiments, the present invention also includes devices external to the server, switch fabric, and storage system.

Abstract: Dynamically reconfigurable multi-core microprocessors and associated methods are provided. A multi-core microprocessor is provided that supports the ability of system software to disable, or kill, selected cores in such a way that they do not cause drag on the processor bus shared with the other cores. Another multi-core microprocessor is provided that supports reconfiguration of an inter-core coordination system of the microprocessor, wherein cores may be selectively designated as masters for purposes of driving signals onto an inter-core communication wire.

Abstract: An apparatus including a plurality of cores and a fuse array. The plurality of cores is disposed on a die. The fuse array is disposed on the die and is coupled to each of the plurality of cores, where the fuse array includes a first plurality of semiconductor fuses and a second plurality of semiconductor fuses. The first plurality of semiconductor fuses is programmed with compressed configuration data for the each of the plurality of cores. The second plurality of semiconductor fuses is programmed with core designation data that associates some of the compressed configuration data with one of the plurality of cores, where the one of the plurality of cores accesses and decompresses the some of the compressed configuration data upon power-up/reset, for initialization of elements within the one of the plurality of cores.

Abstract: An apparatus includes a plurality of cores and a fuse array. The plurality of cores is disposed on a die. The fuse array is disposed on the die and is coupled to each of the plurality of cores, where the fuse array includes a plurality of semiconductor fuses that are programmed with compressed configuration data for the each of the plurality of cores, and where the each of the plurality of cores accesses and decompresses all of the compressed configuration data upon power-up/reset, for initialization of elements within the each of the plurality of cores.

Abstract: Systems and methods for configuring proximally configurable devices deployed in a region that includes scanning the region that includes multiple deployed proximally configurable devices with a directed radiation beam and transmitting data, utilizing the directed radiation beam, to one or more of the deployed proximally configurable devices where the data is associated with the location of the directed radiation beam during scanning within the region.

Abstract: A mobile computing device with a mobile operating system and desktop operating system running concurrently and independently on a shared kernel without virtualization. The mobile operating system provides a user experience for the mobile computing device that suits the mobile environment. The desktop operating system provides a full desktop user experience when the mobile computing device is docked to a secondary terminal environment. The mobile computing device may be a smartphone running the Android mobile OS and a full desktop Linux distribution on a modified Android kernel.

Abstract: Techniques are provided for resetting a microprocessor-based subcomponent of a pluggable module. Specifically, a host device connected to the pluggable module determines that the microprocessor-based subcomponent needs to be reset. The host device resets the microprocessor-based subcomponent without the need for a module level reset of the pluggable module.

Abstract: Systems and methods are described for embodiments of a mobile virtualization platform (MVP) where in some aspects a wireless mobile device including multiple virtual machines (VMs) may receive data from a remote content provider and process/execute the data using an appropriate virtual machine. In some examples, the MVP may facilitate communication between and coordination among different virtual machines in the MVP, such as to facilitate optimization of data processing/execution.

Abstract: A system and method of booting a wireless device is disclosed and may include reading a factory test mode memory item when the wireless device is powered on, determining whether the factory test mode memory item is set to yes, and preventing an operating system of the wireless device from booting when the factory test mode memory item is set to yes. The system and method may further include remaining in a boot loader mode, enumerating a port as a diagnostic serial port, and receiving one or more diagnostic packets. Moreover, the system and method may include allowing the operating system of the wireless device to boot when the factory test mode memory item is set to no.

Abstract: Systems and methods that may be implemented to provide a plug-in architecture framework to allow extension of server management functionalities in a unified extension firmware interface (“UEFI”) environment using available remote access controller memory space. The disclosed systems and methods may be implemented to provide a hardware and software interface to allow use of a plug-in framework in the embedded system management that may be run under the BIOS firmware and the UEFI environment. The disclosed systems and methods may also be implemented to provide a server management architecture that may be modified and enhanced over time, and/or that may also be employed to extend availability of the server management framework to third parties, as well as to extend support to original equipment manufacturer (“OEM”) servers.

Abstract: An OS switching method for switching an OS within several seconds in an information processing system is provided. In the information processing system which includes a processor, a main memory, a nonvolatile memory, and a plurality of input/output apparatuses, an OS switcher is executed when power is applied to the information processing system. When a first OS acquires an OS switch command that indicates a switch to a second OS while the first OS is activated and running, the first OS stores identification information of the second OS and information indicating an OS switch in the nonvolatile memory, and performs STR. The OS switcher switches an OS from the first OS to the second OS after the STR is completed. Accordingly, in the system, one OS can be quickly switched to another OS within several seconds, and a previous working environment can be maintained.

Abstract: In one aspect, the present invention includes an apparatus having a digital signal processor (DSP), a controller coupled to the DSP to provide control signals to the DSP, and a one-time programmable (OTP) memory coupled to the DSP and the controller. The OTP memory may include multiple code portions including a first code block to control the DSP and a second code block to control the controller.

Abstract: An access control system including bi-directional communication between a controller and peripheral authentication devices utilized for selectively accessing a locked door is provided. The access control system provides components and circuitry to enable a user to securely assign and designate any card reader compatible card as an appropriate programming card and thereby activate or deactivate users and/or cards. The present invention further provides encrypted communication between the controller device and a PC.

Abstract: A method and apparatus for inputting and outputting data by using a virtualization technique are provided. The method includes generating a virtual operating system (OS) for the external device, which is connected to a host, based on OS information stored in the external device, setting a partial area of a storage of the host as virtual storage for the external device, and storing the data in the virtual storage or a memory of the external device in response to a request for inputting and outputting the data from the virtual OS.

Abstract: Embodiments of a method for operating an event-driven processor and an event-driven processor are described. In one embodiment, a method for operating an event-driven processor involves configuring a heartbeat timer of the event-driven processor and handling an event using the event-driven processor based on the heartbeat timer. Using a heartbeat timer built into the event-driven processor, the task execution determinism of the event-driven processor is improved and the power consumption of the event-driven processor is reduced. Other embodiments are also described.

Abstract: A method for booting devices in a multi-card computing system comprising a plurality of cards connected to a shared backplane may include: dynamically generating a Media Access Control (MAC) addresses for at least some of the devices in the computing system, the dynamically generated MAC address for each device including information regarding the location of that device within the multi-card computing system; a boot management system receiving a boot-related information request from a particular device in the multi-card system, the boot-related information request comprising a request for particular boot-related information for facilitating a boot process for the requesting device, and including the MAC address of the requesting device; and the boot management system determining whether to send a response to the requesting device with the requested boot-related information based at least on the information in the MAC address regarding the location of the requesting device within the multi-card computing syste

Abstract: A control device includes a storage unit in which a parameter group for setting an operational content of an electronic apparatus and functional information related to a function realized when the parameter group is set are stored in correspondence with each other; a reception unit that receives an operation; an extraction unit that extracts the functional information from the storage unit when a changing operation for changing at least one parameter is received by the reception unit, the functional information corresponding to the parameter changed by the changing operation; a presentation unit that presents the extracted functional information; and a setting unit that reads the parameter group corresponding to the presented functional information from the storage unit and sets the parameter group when the reception unit receives a usage confirmation operation for confirming that the function corresponding to the presented functional information is to be used.

Abstract: Media, methods, and computer systems are provided for performing a quick restart of applications in a virtual machine of the computer system. The virtual machine is configured with a critical object array that identifies the critical applications. In response to a quick restart request, the garbage collector operates in a quick restart mode to remove all objects for each application that is not in critical object array.

Abstract: Images for information handling system manufacture and maintenance are created and managed by manipulating the images as virtual machines through a secure remote network interface, such as a virtual private network or virtual desktop infrastructure. Operating system and application installation and updates, such as service packs and patches, are performed on a virtual machine of the image to adjust the image as desired, and then the image is transformed for loading on physical information handling systems, such as newly manufactured information handling systems or deployed information handling systems in need of maintenance.

Abstract: A master policy server manages security polices for client computers through a network of local policy servers. Each local policy server is responsible for the security policies on a group of clients and maintains a data store containing the security policies and security infornation pertaining to the clients. Periodically, the master policy server and the local policy server synchronize, at which time the master policy server replicates updated policies to the local policy servers and the local policy servers upload client security statistics to the master policy server for consolidation into a global status.

Abstract: An apparatus and method set up an interface in a mobile terminal. The method includes: storing an interface setup application including customized data unique to countries and operators; determining whether a Subscriber Identity Module (SIM) card is inserted into the mobile terminal when the mobile terminal is powered on; detecting a Mobile Country Code (MCC) and a Mobile Network Code (MNC) included in the SIM card, if the SIM card is inserted into the mobile terminal; executing the interface setup application and searching for customized data corresponding to the detected MCC and MNC from among the customized data unique to countries and operators; and installing an interface of the mobile terminal based on the searched customized data.

Abstract: A computer booting method is provided for a computer system. The method comprises performing a power-on-self test. When the test result shows no error on the BIOS, a booting procedure is executed. When the test result shows the BIOS is damaged, whether the computer system stores a backup file of the BIOS is determined. When the computer system stores the backup file, the central processing unit reads the data of backup file and write it into a BIOS system memory and a reboot process is performed. When there is no backup file in the computer system, the computer system is connected to an internet server and downloads a BIOS backup file to the system main memory from the internet server. The central processing unit reads the BIOS backup file and write it into the BIOS system memory and a reboot process is formed.

Abstract: Method and system for initializing a plurality of virtual machines sharing a physical storage unit managed by a storage system for storing a boot image used for initializing the plurality of virtual machines are provided. A data structure is maintained by a virtual machine monitor that manages the plurality of virtual machines. The data structure includes a file block number for accessing a boot image that can be used for initializing the plurality of virtual machines and a unique signature for the physical storage unit storing the boot image and a memory address of a cache memory where the boot image is stored after it is obtained from the storage system. The plurality of virtual machines is initialized using the boot image from the cached memory without having to obtain the boot image for each individual virtual machine except for a first virtual machine.

Abstract: A system capable of booting through a Universal Serial Bus device includes a Universal Serial Bus port, an embedded controller, a platform control hub, and a basic input/output system. The embedded controller is used for generating a boot signal when the system is powered off and at least one Universal Serial Bus device is plugged into the Universal Serial Bus port. The platform control hub is woken up according to the boot signal. The basic input/output system has boot sequence setting values. The basic input/output system first starts to boot the at least one Universal Serial Bus device through the platform control hub according to the boot sequence setting values when the basic input/output system is woken up according to the boot signal.

Abstract: Integrating link calibration and dynamic topology discovery in a multi-processor system establishes a first of a plurality of processors in the multi-processor system as a director of integrated link calibration and dynamic topology discovery. A plurality of high speed interconnects connects the plurality of processors with each other. The director processor directs calibration of each of the plurality of high speed interconnects via a shared hardware resource. The shared hardware resource is shared among the plurality of processors. Topology of the multi-processor system is incrementally discovered as each of the plurality of high speed interconnects is calibrated based on a result of each of the plurality of high speed interconnects being calibrated.

Abstract: Mechanisms, in a multi-chip data processing system, for performing a boot process for booting each of a plurality of processor chips of the multi-chip data processing system are provided. With these mechanisms, a multi-chip agnostic isolated boot phase operation is performed, in parallel, to perform an initial boot of each of the plurality of processor chips as if each of the processor chips were an only processor chip in the multi-chip data processing system. A multi-chip aware isolated boot phase operation of each of the processor chips is performed in parallel, where each of the processor chips has its own separately configured address space. In addition, a unified configuration phase operation is performed to select a master processor chip from the plurality of processor chips and configure other processor chips in the plurality of processor chips to operate as slave processor chips that are controlled by the master processor chip.

Abstract: A method for continuous data transfer when a USB mass storage device is disconnected and reconnected is provided. The method may include monitoring state information from one or more mass storage devices, using a software driver to detect a change in state of the mass storage device on the computer. Active I/O transfers using the USB mass storage device are paused when the software driver detects that the USB mass storage device is detached from the computer. A configurable timer is started. The software drive may detect the attaching of a USB device. If, prior to the expiration of the timer, the software driver verifies that the USB mass storage device is the same that was previously attached to the computer, active I/O transfers are continued.

Abstract: Systems and methods for provisioning the infrastructure of modular information handling systems, such as modular blade server chassis systems, using one or more pre-defined templates. IT service templates may be initially loaded and present in local memory or storage of a modular information handling system to define the system infrastructure configuration that ship with the modular chassis platform, or may be later downloaded or otherwise received in local memory or storage later from an external source after system installation to specify the desired end-state of the system infrastructure configuration.

Abstract: A method and system is provided for file and application management. The method may include configuring a destination system where the method further includes generating a filesystem image including an application file and files necessary for the destination system to execute the application file, generating a cryptographic signature of the filesystem image, transferring the filesystem image and the cryptographic signature to the destination system, cryptographically verifying the filesystem image with the cryptographic signature, and mounting the filesystem image on the destination system in a read-only manner.

Abstract: An example processor includes a plurality of processing core components, one or more memory interface components, and a management component, wherein the one or more memory interface components are each shared by the plurality of processing core components, and wherein the management component is configured to assign each of the plurality of processing core components to one of a plurality of system images.

Abstract: Translation of boot code read request commands from an on-board processor of a system on a chip (SoC) from a bus protocol (e.g., advanced high-performance bus (AHB) protocol) into a sequence of commands understandable by a serial interface of the SoC to read boot code from an off-board (e.g., flash or other non-volatile) memory device. The serial interface of the memory device may include a relatively low pin count (e.g., 5 pins) and boot code of the memory device may be modified after tape-out of the SoC free of necessitating a subsequent tape-out of the SoC.

Abstract: Embodiments of a system and method manage a configuration of a plurality of content switching devices in a networked system by generating a first configuration data file and translating the first configuration data file into one or more device specific configuration data files, each device specific configuration file corresponding to a device type of the one or more content switching devices. Some embodiments of the system and method then communicate the one or more device specific configuration data files to each content switching device of a corresponding device type to configure each content switching device.

Abstract: An apparatus and a method for integrating personal computer and electronic device functions. An input device, personal computer host, and encoder in turn integrate hardware, operating system, and application programs to provide personal computer and electronic device functions at the same time.

Abstract: One exemplary embodiment is directed to a connector assembly. The connector assembly comprises a port having a media interface configured to interface with a storage device interface of a connector. The connector is attached to a segment of physical communication media. The connector also includes a storage device. The connector assembly also comprises a programmable processor configured to execute software that stores information to the storage device using a plurality of redundant storage operations by which a plurality of copies of the information is sequentially stored in the storage device.