Abstract: A quantum processing system may include one or more superconducting qubits and a qubit controller for controlling the one or more qubits. The qubit controller includes a radio frequency generation unit comprising electronic components, which are altogether configured to generate modulated RF signals. The controller also includes a phase locked loop unit maintaining a reference clock for two or more of the components of the RF generation unit, and a timing controller including an absolute timing register, the latter accessed by the reference clock, in operation. The qubit controller comprises a sequencer coupled to the timing controller to synchronize said two or more of said components by maintaining a coherent signal for said two or more of said components, the coherent signal phase matched to the one or more qubits, to drive and/or read out the one or more qubits via modulated signals generated by the synchronized components, in operation.

Abstract: A system, method, and computer program product are provided for redirecting internet relay chat (IRC) traffic identified utilizing a port-independent algorithm and controlling IRC based malware. In use, IRC traffic communicated via a network is identified utilizing a port-independent algorithm. Furthermore, the IRC traffic is redirected to a honeypot.

Abstract: A procedure for testing an electronic device is disclosed. A computer bundles into command groups multiple test and wait commands of a test sequence. Each command group is sent to the device, reducing the per-message latency of the command transfers. The commands are queued and stored in the device. The wait commands define the timeline of the tests to be executed on the device. For example, each wait command forces a wait state of a length corresponding to the parameter of the wait command. The length of the wait state is measured from the beginning of the test sequence or the completion of the previous wait command. The wait state associated with each wait command may be made longer than the combined conservative estimates of time periods required for executing all the test commands between a previous point in time defined in the test sequence and the current wait command.

Abstract: Method and system for data-rate control by randomized bit-puncturing in communication systems. An encoder encodes at least one information bit thereby generating a group of encoded bits or an encoded frame. The encoder may be any type of encoder including a turbo encoder, an LDPC (Low Density Parity Check) encoder, a RS (Reed-Solomon) encoder, or other type of encoder. Any sub-portion of an encoded frame generated by such an encoder can be viewed as being a group of encoded bits. If the encoded frame is sub-divided into multiple groups of bits, each group can under processing in accordance with the means presented herein to effectuate rate matching. Based on a number of bits to be punctured from the group or frame generated by the encoder, a set of pointers and random-generated displacements is used to generate addresses for bits in the group or frame to be transmitted or punctured.

Abstract: One embodiment of the invention includes a quantum system. The system includes a superconducting qubit that is controlled by a control parameter to manipulate a photon for performing quantum operations. The system also includes a quantum resonator system coupled to the superconducting qubit and which includes a first resonator and a second resonator having approximately equal resonator frequencies. The quantum resonator system can represent a first quantum logic state based on a first physical quantum state of the first and second resonators with respect to storage of the photon and a second quantum logic state based on a second physical quantum state of the first and second resonators with respect to storage of the photon.

Abstract: A flash storage device comprises: a memory module, for storing data; a control unit, electrically connected to the memory module, for accessing the data in the memory module; and a detecting unit, electrically connected to the control unit, for passing a temperature detecting result to the control unit, and the control unit determining whether a data protection operation is activated according to the temperature detecting result.

Abstract: This disclosure relates to method, device and system for detecting errors in a communication system. A signal is received from a transmitter at a receiver wherein the signal includes a data portion and a result of a hash function. The hash function is computed in part from a transmitter identification code. The receiver determines if the result of the hash function matches both the data portion and the transmitter identification code. The receiver discards the signal if the result of the hash function does not match both the data portion and the transmitter identification code of the transmitter.

Abstract: A differential communication bus comprising a master module and a plurality of slave modules connected to at least first and second conductors whereby to communicate between the master and slave modules. The master module comprises a driver for applying first and second voltages respectively to the first and second conductors and for sourcing and sinking currents in the first and second conductors. The driver controls a difference between the first and second voltages and a common mode value of the first and second voltages. The driver includes first sourcing and sinking current limiters and second sourcing and sinking current limiters for limiting the currents in the first and second conductors. The master module is selectively responsive to a fault condition triggering simultaneous activation of the first and second sourcing current limiters or of the first and second sinking current limiters to disable the driver.

Abstract: The present invention relates to a secure method for reconstructing a reference measurement of a confidential datum on the basis of a noisy measurement of this datum. The method proposes a phase of enrolling a reference datum w having n digits, comprising at least the following steps: selecting an error correcting code C of a length L greater than n; generating an extended datum we by increasing the size of the reference datum w with L-n digits making up a key Sk; choosing a word c of the selected error correcting code C; generating the reconstruction datum s by combining the said word c with the said extended datum we. The invention applies notably to the authentication of individuals and to the generation of cryptographic keys, using for example biometric data or the physical characteristics intrinsic to an electronic component.

Abstract: A method for configuring a biometric template protected authentif ication system, in which the desired classification threshold (T) is first selected to optimize the trade-i off between FAR and FRR of the system, and then the ECC used in the authentif ication process is chosen such that the number (b) of errors which can be corrected thereby is equal to or greater than the selected classification threshold. During authentif ication, the number (b) of errors in a first codeword derived from biometric data associated with a physical object is determined and used in the decision process to accept or reject authentif ication.

Abstract: A temperature-based clock frequency controller is implemented in an integrated circuit such as a microprocessor. The temperature-based clock frequency controller includes a register to store a threshold temperature value, a thermal sensor, and clock adjustment logic to decrease a clock frequency in response to the thermal sensor indicating that the threshold temperature value has been exceeded. In a microprocessor implementation, the microprocessor contains a plurality of thermal sensors each placed in one of a plurality of different locations across the integrated circuit and an averaging mechanism to calculate an average temperature from the plurality of thermal sensors. Threshold adjustment logic increases the threshold temperature value to a new threshold temperature value in response to the thermal sensor indicating that the threshold temperature value has been exceeded. Threshold adjustment logic further lowers the new threshold temperature to detect decreases in temperature.

Abstract: An apparatus and a method are provided for selectively enabling and disabling a squelch circuit in a Serial Advanced Technology Attachment (SATA) host or SATA device while maintaining proper operation of the host and device. An apparatus and method are provided which allow the squelch circuit to be selectively enabled and disabled across SATA power states (PHY Ready, Partial, and Slumber) and in Advanced Host Controller Interface (AHCI) Listen mode.

Abstract: Systems and methods are provided for updating a temperature table for a disk subsystem in a client system using information provided by a server system. In one embodiment, among others, the client receives an update command from the server system. The update command comprises instructions to update the temperature table. The client updates the temperature table in the disk subsystem in accordance with the update command. The client selects one of the write current values in the temperature table based on a disk subsystem temperature, and writes data to the disk subsystem using the selected write current values.