Abstract: Embedded systems and methods of reading or writing data or instructions of at least one application in a non-volatile memory are disclosed. A method includes reading or writing data or instructions of at least one application in a non-volatile memory of an embedded system. The data or instructions transit through a memory area and are interpreted by a distinct program of an operating system of the embedded system.

Abstract: A method of validating a regulated application by generating, on a local data processing system, an automated agent to oversee a validation process of the regulated application on the local data processing system regardless of a local or web-based nature of the regulated application.

Abstract: Techniques are provided herein to identify unused computer code in a computer code corpus. Execution tracking characteristics may be used to identify unused code branches within the computer code corpus. A notification may be provided, indicating the unused code along with an option for easy removal.

Abstract: An example method may include identifying one or more source code lines from which an intermediate code line of an intermediate code module is generated, wherein each respective source code line is associated with a respective source code module name and further associated with a respective line number in the respective source code module, generating one or more source mappings, where each source mapping corresponds to a respective source code line and associates a line number of the intermediate code line with a respective source code module name of the respective source code line and further with a respective line number of the respective source code line, and storing, in a data store, the one or more source mappings in association with a name of the intermediate code module. The intermediate code module can be a file generated by a compiler or translator.

Abstract: Techniques for computer software code analysis are disclosed. One or more data flows are generated, based on analyzing software code using static analysis. A data object is identified in the software code using the one or more data flows, the data object relating to a structured dataset. A correspondence between a code expression in the software code and a characteristic of the structured dataset is identified, based on analyzing one or more reads from and one or more writes to the data object using the one or more data flows. The code expression for the structured dataset is analyzed, based on the correspondence, including at least one of: (i) generating a software code recommendation engine based on the code expression and the structured dataset, or (ii) generating one or more lambda expressions for application to the structured dataset, based on the code expression.

Abstract: Persistent storage may contain: (i) an explicit configuration item table with entries of explicit configuration items representing hardware devices and executable software applications deployed on the hardware devices, (ii) an implicit configuration item table with entries of implicit configuration items representing units of source code, wherein at least some of the executable software applications are compiled versions of the units of source code, and (iii) an implicit relationship table associating pairs of the configuration items.

Abstract: Automated root cause identification using data flow analysis of plural execution traces. A computer system generates data flow dependency graphs from first and second execution traces an entity. These graphs represent input/output data flows of corresponding executions of the entity. The computer system generates topological sortings of those graphs and identifies output pairings across these graphs based on outputs having common labels and topological correspondence. The computer system identifies output pairing(s) that are mismatched as having different values and, for at least one mismatched output pairing, traverses the graphs in order to identify input pairing(s) that are topological root(s) to the mismatched output pairing(s) and that are causal to the mismatch(es). Each input pairing comprises inputs that have a common label, a common topological correspondence, and mismatched values.

Abstract: Systems and methods are described herein for resolving advertisement placement conflicts. Specifically, a number of parameters may be entered into a system in order to distribute advertisements into advertisement slots. In many instances, a combination of these parameters causes a conflict in the system where all the parameters cannot be applied in order to place advertisements into advertisement slots. The conflict may be resolved by using an advertisement assignment model to determine which parameters may be relaxed in order to arrive at an optimal solution that violates a smallest number of parameters having the least priority. When such a solution is found, the advertisement assignment model may be modified and advertisements may be placed into advertisement slots based on the modified advertisement assignment model.

Abstract: A data storage device and method are provided for host multi-command queue grouping based on write-size alignment in a multi-queue-depth environment. In one embodiment, a data storage device is provided comprising a memory and a controller. The controller is configured to provide a host with an indication of a required amount of data needed to program a set of multi-level cell blocks in the memory; receive an assurance from the host that the host will be providing the data storage device with the required amount of data; and based on the assurance received from the host, program the set of multi-level cell blocks as data is received from the host but before the required amount of data is received from the host. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.

Abstract: A computer-implemented method for designing a user interface application uses a visual flow language and a model view flow architecture. The visual flow language may include components, where components include blocks and nodes. Call streams and data flows may be defined by a user. An application flow logic graph is generated. The application flow logic graph may be used to generate a user interface application.

Abstract: The present disclosure is directed to systems and methods directed to improving the functions of a vehicle. Systems and methods are provided that provide a custom tool that autogenerates a set of software agents that allows a system to separate processing, transmission and receiving of messages to achieve better synchronization. The disclosure herein also provides a simplified method of key provisioning by designating one client as a server and assigning a symmetric key to every other client permanently provisioned between that client and the server. Systems and method are further provided that predict faults in a vehicle. Systems and methods are also provided that preserve data in the event of a system crash. Systems and methods are also provided in which an operating system of a vehicle detects the presence of a new peripheral and pulls the related interface file for that new peripheral. Further, a data synchronization solution is provided herein which provides optimized levels of synchronization.

Abstract: A memory management system implements instructions including maintaining multiple pool data structures, each associated with a linked list of objects and including a head pointer pointing to the first element in the linked list. The instructions include, in response to a first object no longer being needed, recycling the first object by identifying a first pool data structure that corresponds to the first object and inserting the first object into the linked list without deallocating the memory for the first object. The instructions include, in response to a new object request, identifying a second pool data structure according to a feature of the new object. If the corresponding linked list is empty, memory is allocated for the new object and the new object is assigned to the second pool data structure. If the linked list is not empty, the first object is removed from the linked list and returned.

Abstract: Techniques disclosed herein provide improved techniques for generating backup copies associated with applications. For example, a method comprises managing synchronous generation of a backup copy of an application comprised of two or more application components respectively executed on two or more host devices, wherein each host device has a storage system associated therewith, by controlling the creation of a backup copy of each application component executed on each host device on its associated storage system within the same time period.

Abstract: A system and method are disclosed for quality assurance and performance testing of supply chain applications and systems. Embodiments include providing a user interface for receiving a test case file that describes one or more actions to be tested and a properties file that maps one or more elements to one or more values, translating a received test case file and a corresponding properties file into a test case, and executing the test case by identifying the one or more actions identified in the test case and automatically invoking one or more testing components configured to execute a test using the one or more actions, wherein at least one of the one or more testing components is configured execute performance testing, and at least one of the one or more testing components is configured to execute regression testing.

Abstract: Systems and methods are described for compiling a specified instruction from a first virtual application to a second virtual application. Each virtual application may be associated with different programming languages. In an example method, a computing device receives a request to execute the specified instruction in the second virtual application. A target data structure may be created, using a library of the second virtual application, where a template directory may be stored. First syntax features, each defining a respective variable may be identified. An abstract syntax tree may be used to derive, for each first syntax feature, a modified definition for the respective variable. Second syntax features may be generated that define the respective variables more precisely than the first syntax features. The specified instruction may be rendered the second virtual application and may be expressed via the second syntax features and their respective variables.

Abstract: An apparatus and method for responding to an invalid state occurrence encountered during execution of a third-party application program is included. The apparatus performing the method which includes registering a trap signal handler with a kernel of an operating system. The method also including intercepting calls from the third-party application program to the operating system and processing an exception signal corresponding to the invalid state to generate a response. The response including performing a signal reporting process.

Abstract: Disclosed embodiments include a processing device having a debug controller that issues a context-sensitive debug request. The context-sensitive debug request includes at least one conditional criteria. A processing core receives the debug request, determines whether all of the at least one conditional criteria are true, and services the debug request when all of the at least one conditional criteria are true by accessing a data location indicated in the debug request. The servicing of the debug request may be performed in real-time mode without suspending the processing device, and the accessing can be a read or a write operation depending on the type of access indicated in the debug request. The conditional criteria may include one or more of a processor mode condition, a virtual machine identifier condition, and a debug context condition.

Abstract: The present invention discloses an offline debugging method, comprising: S01: obtaining interfaces which require return values in test flows of the test device; S02: setting the return value corresponding to each of the interfaces which require the return values, adding M debugging strategies and determining a debugging strategy required to be started; S03: compiling a configuration file comprises the M debugging strategies into an executable file required by the target platform; S04: setting up a virtual machine to fit the target platform, and transferring the executable file to the virtual machine; S05: invoking the test flow, returning the return value set by the debugging strategy corresponding to the interface which require the return value and obtaining an debugging result correspondingly. Therefore, the present invention solves a problem that debugging relays on hardware devices in semiconductor automation test, so as to reduce complexity and difficulty of debugging of a test device.

Abstract: A system includes a memory and processor in communication with the memory. The processor is configured to receive a connection request at an emulation layer from an integrated development environment (IDE). The emulation layer connects, via a socket connection, with the IDE. Using the socket connection, the emulation layer receives a command. The command is decoded to retrieve a parameter and a reference to a native application. The command is mapped to a native debugger command and then used to debug the native application using the native debugger.

Abstract: A system for executing software, wherein a computing device stores first software instructions for a code execution module such that, when the first software instructions are executed, the computing device will: receive, for execution by the code execution module, second software instructions; create one or more immutable software nodes described in the second software instructions; determine that the second software instructions comprise an instruction to begin a simulated change at runtime of the one or more immutable software nodes; store the simulated change in a simulated change apparatus; using the simulated change apparatus, perform one or more operations of the second software instructions as if the one or more immutable software nodes had been changed in memory, during a period of time where each of the one or more immutable software nodes is guaranteed to retain logical immutability; and output results of the one or more operations.

Abstract: Disclosed herein are system, method, and computer program product embodiments for conducting taint analysis on inputted data from a user to a process, where based on pre-defined rules, input data may be marked as tainted. In a passive mode, logging or deletion actions may be taken on the tainted data. In an active mode, the process may be interrupted and a user prompt may be displayed each time a taint point is reached.

Abstract: A processor that was manufactured by a manufacturer comprises privileged debug operational circuitry, a debug restriction fuse, a credential store, a credential of the manufacturer in the credential store, and debug control circuitry. The debug restriction fuse is a one-time programmable fuse. The debug control circuitry is to automatically restrict access to the privileged debug operational circuitry, based on the debug restriction fuse. The processor may also include public debug operational circuitry, a prevent-unauthorized-debug (PUD) fuse, and an undo-PUD fuse. When the PUD fuse is set and the undo-PUD fuse is clear, the debug control circuitry may respond to an attempt by a debugger to use the public debug operational circuitry by determining whether the debugger is authorized, disallowing access if the debugger is not authorized, and allowing access if the debugger is authorized. Other embodiments are described and claimed.

Abstract: The present invention is a novel RTOS/OS architecture that changes the fundamental way that data is organized and context switching is performed. This novel approach consists of a context switching method in which interrupts are never disabled. This RTOS/OS architecture requires specialized hardware. Concretely, an advanced interrupt controller that supports nesting and tail chaining of prioritized interrupts is needed (e.g. the Nested Vectored Interrupt Controller (NVIC) found on many ARM processors) is required. The novel RTOS/OS architecture does not keep the list of tasks ready to run in sorted order, allowing for O(1) insertion time and utilizes a barrier variable to allow for safe O(n) insertion of tasks into the priority sorted list of blocked tasks without disabling interrupts. The advanced interrupt controller allows for any new interrupts to preempt the software exception handler thereby ensuring no data loss.

Abstract: Embedded systems and methods of starting an embedded system are disclosed. A method of starting an embedded system includes executing first instructions, distinct from instructions of an operating system of the embedded system. The method further includes causing the storage of at least one application into a non-volatile memory in response to executing the first instructions.

Abstract: Functionality is provided for unwinding program call stacks across native-to-interpreted code and native-to-JIT-compiled code boundaries, as well as across the kernel and user space boundaries, during performance profiling. The system thus enables profiling of code that crosses boundaries from native code to interpreted languages and native code to languages that run on a runtime supporting JIT compilation. Various embodiments provide cross-language profiling with a sufficiently low performance impact so as to enable such profiling to take place in a production environment.

Abstract: Embedded systems and methods of reading or writing data or instructions of at least one application in a non-volatile memory are disclosed. A method includes reading or writing data or instructions of at least one application in a non-volatile memory of an embedded system. The data or instructions transit through a memory area and are interpreted by a distinct program of an operating system of the embedded system.

Abstract: The present disclosure is directed to efficient memory activation at runtime. A memory module (e.g., a memory riser) being added to a device would typically cause the device to enter system management mode (SMM) to activate the memory module. However, activation (e.g., memory module initialization, hardware training and system reconfiguration) in SMM may substantially delay the resumption of normal operations. Consistent with the present disclosure, at least the memory module initialization and hardware training portions of the activation may be performed by an operating system (OS) in the device, allowing normal device operation to continue during the activation. The OS portion of the activation may generate configuration data. In at least one embodiment, the configuration data may be applied for use in SMM. For example, a system management interrupt (SMI) handler may apply the configuration data during a quiescent period (e.g., a period of inactivity) that occurs during SMM.

Abstract: A method, computer system, and a computer program product for debugging a deep neural network is provided. The present invention may include identifying, automatically, one or more debug layers associated with a deep learning (DL) model design/code, wherein the identified one or more debug layers include one or more errors, wherein a reverse operation is introduced for the identified one or more debug layers. The present invention may then include presenting, to a user, a debug output based on at least one break condition, wherein in response to determining the at least one break condition is satisfied, triggering the debug output to be presented to the user, wherein the presented debug output includes a fix for the identified one or more debug layers in the DL model design/code and at least one actionable insight.

Abstract: Methods, computer program products, and/or systems are provided that perform the following operations: determining that a log multi-process debug mode is specified; obtaining a log file for debugging a source code, wherein the log file includes a plurality of log records; inserting a plurality of process identifier fields into each current log record in the log file; inserting a new log record into the log file for a created new process; and providing for performance of debugging for the source code based in part on the plurality of process identifier fields inserted into each current log record.

Abstract: A system for a heap dump conversion comprises a network storage device comprising a core dump file, a first server coupled to the network storage device, and a second server coupled to the network storage device and to the first server, where the second server receives a notification associated with the core dump file, obtains metadata information from the core dump file in response to receiving the notification, autonomously converts the core dump file into a heap dump file using the metadata information, and stores the heap dump file in the network storage device.

Abstract: Systems and methods are described herein for resolving advertisement placement conflicts. Specifically, a number of parameters may be entered into a system in order to distribute advertisements into advertisement slots. In many instances, a combination of these parameters causes a conflict in the system where all the parameters cannot be applied in order to place advertisements into advertisement slots. The conflict may be resolved by using an advertisement assignment model to determine which parameters may be relaxed in order to arrive at an optimal solution that violates a smallest number of parameters having the least priority. When such a solution is found, the advertisement assignment model may be modified and advertisements may be placed into advertisement slots based on the modified advertisement assignment model.

Abstract: Techniques for monitoring operating statuses of an application and its dependencies are provided. A monitoring application may collect and report the operating status of the monitored application and each dependency. Through use of existing monitoring interfaces, the monitoring application can collect operating status without requiring modification of the underlying monitored application or dependencies. The monitoring application may determine a problem service that is a root cause of an unhealthy state of the monitored application. Dependency analyzer and discovery crawler techniques may automatically configure and update the monitoring application. Machine learning techniques may be used to determine patterns of performance based on system state information associated with performance events and provide health reports relative to a baseline status of the monitored application. Also provided are techniques for testing a response of the monitored application through modifications to API calls.

Abstract: A process includes receiving a table data set that represents mappings between a plurality of operand patterns indicating types of operands possibly included in a first instruction used in a first assembly language and a plurality of second instructions used in a second assembly language or a machine language corresponding to the second assembly language. The table data set maps two or more of the second instructions to each of the operand patterns. The process also includes generating, based on the table data set, a translation program used to translate first code written in the first assembly language into second code written in the second assembly language or the machine language. The translation program defines a process of determining an operand pattern of an instruction included in the first code and outputting two or more instructions of the second code according to the determined operand pattern.

Abstract: A system includes one or more processors in communication with a memory and configured to receive a task to probe a portion of the memory associated with a version of a binary file during execution of the binary file. The task includes a portion of object code and a hash identifier, both associated with the version of the binary file. A database mapping hash identifiers to debug information associated with installed binary files is accessed. Debug information for the version of the binary file associated with the hash identifier is retrieved. A probing application is built using the debug information and the portion of object code. Upon execution of the version of the binary file, the probing application places the object code into the portion of the memory.

Abstract: The present disclosure describes systems and methods for controlling access to secure debugging and profiling features of a computer system. Some illustrative embodiments include a system that includes a processor, and a memory coupled to the processor (the memory used to store information and an attribute associated with the stored information). At least one bit of the attribute determines a security level, selected from a plurality of security levels, of the stored information associated with the attribute. Asserting at least one other bit of the attribute enables exportation of the stored information from the computer system if the security level of the stored information is higher than at least one other security level of the plurality of security levels.

Abstract: A computing system initialization system includes a computing device that is coupled to a management device and that includes a processing system having at least one register storing debug-message-display-determination instructions, and a memory system that is coupled to the processing system and that includes Basic Input/Output System (BIOS) instructions that, when executed by the processing system, cause the processing system to provide a BIOS engine. The BIOS engine begins initialization operations and, during those initialization operations, generates at least one first debug message. The BIOS engine then accesses the at least one register included in the processing system to execute the debug-message-display-determination instructions and, in response, determines that the at least one first debug message should be displayed. In response, the BIOS engine transmits the at least one first debug message to the management device such that the management device displays the at least one first debug message.

Abstract: Techniques are disclosed for setting a breakpoint for debugging a neural network. User input is received by a debugger program executable by a host processor indicating a target layer of a neural network at which to halt execution of the neural network. The neural network includes a first set of instructions to be executed by a first execution engine and a second set of instructions to be executed by a second execution engine. A first halt point is set within the first set of instructions and a second halt point is set within the second set of instructions. It is then determined that operation of the first execution engine and the second execution engine has halted. It is then determined that the first execution engine has reached the first halt point. The second execution engine is then caused to move through instructions until reaching the second halt point.

Abstract: A prioritization for bugs in software on multiple systems can be determined. For example, a computing system can receive data files that each describe system characteristics for a client device of multiple client devices. The computing system can compare each data file to a plurality of rules to identify one or more matches between the data file and the plurality of rules. The computing system can filter the matches to generate a subset of the one or more matches that are associated with metadata tags corresponding to bugs in the multiple client devices. The computing system can aggregate the subset of the one or more matches for the multiple client devices to determine a number of the multiple client devices associated with each bug. The computing system can determine a prioritization for addressing the bugs based on the number of the multiple client devices associated with each bug.

Abstract: A framework, method, and system for generating asynchronous code from state machines coded in a synchronous manner are described. The code is pre-processed into asynchronous code based on the framework prior to compilation thereof. The framework may include various structures and functions such as a save structure, a reentry function, a block wrapping function and a yield identification function.

Abstract: The conversion apparatus includes a selection section that selects a category of a term used for a report of a medical image; and a conversion section that converts an input term of the report to the term of the category selected by the selection section, with reference to a conversion table in which terms of plural types of the categories are associated with each other.

Abstract: Techniques are described for debugging node devices. A node device may be connected to a host device for debugging purposes. A debugger, providing debug functionality, such as a debugging web application, may run on a remote server and be accessed via a web browser running at the host device, to debug the node device. Alternatively, the debugging web application may execute in the web browser running at the host device to debug the node device. In another alternative, the debugging web application may execute at a gateway device provided between the node device and the host device. In all cases the debugging web application is controlled via a debug user interface running at the web browser. Consequently, a user of the host device is not required to install a debugger at the host device in order to debug a node device.

Abstract: Techniques are disclosed relating to testing application code. A computer system, in various embodiments, receives application code to be tested by the computer system and separate information defining actions to be performed at specified locations within the application code. In various embodiments, the computer system executes the application code in a test environment in which the actions defined by the separate information are retrieved and performed by a plurality of threads of the application code at the specified locations to control flow of the plurality of threads through the application code. In some embodiments, a first one of the plurality of threads is operable to perform at least one of the actions to control the flow of a second one of the plurality of threads.

Abstract: A method of operation may include compiling a code set via a compiler application, identifying one or more run-time errors associated with the compiled code set, identifying one or more user profiles linked to portions of the code set where the one or more run-time errors occurred, and automatically initiating a conference session with one or more devices associated with the one or more user profiles linked to the portions of the code set where the one or more run-time errors occurred.

Abstract: A method, system and a computer program product are provided for updating mobile device applications at a central cloud server by establishing an application virtual machine representation of a first mobile device application installed on a mobile device; updating the application virtual machine representation at the central cloud server to perform software configuration, installation, upgrade, optimization, testing, or maintenance tasks on the application virtual machine representation without using computational resources at the mobile device; and sending the mobile device one or more modules that were changed when updating the application virtual machine representation for integration into the first mobile device application installed on the mobile device.

Abstract: Disclosed embodiments include a processing device having a debug controller that issues a context-sensitive debug request. The context-sensitive debug request includes at least one conditional criteria. A processing core receives the debug request, determines whether all of the at least one conditional criteria are true, and services the debug request when all of the at least one conditional criteria are true by accessing a data location indicated in the debug request. The servicing of the debug request may be performed in real-time mode without suspending the processing device, and the accessing can be a read or a write operation depending on the type of access indicated in the debug request. The conditional criteria may include one or more of a processor mode condition, a virtual machine identifier condition, and a debug context condition.

Abstract: A system, method and computer program product for estimating computer processing metrics for a target computer product or target computer process. A system is described including: a product name identifier for initiating execution of the method when a process requires a new memory page for a module and identifying a product associated with the module; a module page creator for creating a new memory page associated with the process and product; a module loader for loading the module into the new memory page as associated with the process and product; and wherein the total size of memory pages associated with a particular product can be determined.

Abstract: A method of generating program analysis data for analyzing the operation of a computer program. The method comprises, executing an instrumented process of the computer program to define a reference execution of the program, intercepting a call to a library function by the instrumented process, executing the library function in an uninstrumented process, for the uninstrumented process, capturing in a log, only data generated by or modified through the execution of the library function required by the instrumented process to continue execution of the program, and wherein the captured log is arranged to enable deterministically reproducing the effect of the library function call on the instrumented process upon re-running of the reference execution based upon the captured log to generate the program analysis data.

Abstract: Execution of a debug process on a thread of an application is monitored to detect resource contention caused by the debug process. In response to detecting a contention for a resource caused by the debug process, execution of the debug process is controlled in accordance with a debug policy. The debug policy defines a control action to be implemented based on one or more rules.

Abstract: Methods, systems, and computer program products are provided that enable a portion of code to be marked in source code to disable compilation optimizations for the marked portion of code, while the rest of the source code is compiled with optimizations. In this manner, edit-and-continue debugging may be performed on the compiled source code in an enhanced manner. Modifications made to the marked source code (as well as the rest of the source code) may be compiled in an incremental manner, such that the portions of the source code affected by the modifications are compiled, while unaffected portions of the source code are not recompiled.

Abstract: Embodiments of the invention provide systems and methods for optimizing handling of breakpoints in a Java debugger agent. Embodiments provide a novel command that allows execution of the application in the debugger to stop or break at the beginning of a next called function or method (e.g., a “break on next called function” or “BNCF” command). When the BNCF command is given to the debugger, a flag may be set in the interpreter of the virtual machine to which the debugger is attached. On encountering a new method or function call, the flag is examined by the interpreter to determine whether it should stop or break in that call. If the flag is set, the interpreter will stop; otherwise the interpreter proceeds.