Abstract: Embodiments described herein provide for virtual machine (VM) based exploit mitigation techniques that can be used to harden web content frameworks and JavaScript Engines. Some embodiments described herein are also generally applicable to other system frameworks, libraries, and program code that executes on a processor that is vulnerable to an attack using a security exploit. Program code that implements the techniques described herein can prevent the use of security exploit attacks to bypass security properties within the program code.

Abstract: Programs written in interpreted languages, such as JavaScript, are distributed in source form, which is helpful to attackers so that they can more easily derive the purposes and effects of a program. As discussed herein, a program's high-level code may be effectively obfuscated by transforming the program's code from its high-level programming language to low-level processor-specific language, such as x86 instructions for x86 processors, JVM bytecode for JVMs, or proprietary opcodes for a corresponding proprietary processor or interpreter. Additional obfuscation techniques can be applied the program's low-level processor-specific code.

Abstract: A matrix format with one dimension showing categories of the flights and one dimension showing ranges of the categories can be used by a customer looking for a travel flight. The selection of the customer on the flight matrix can be converted to travel preferences, which can be stored in a travel preference profile of the customer. The travel preference profile can be updated when the customer searches and books travel flights. Ultimately, the travel preference profile can reflect the customer desires and subsequent travel searches can results in a small number of, preferable only one, flight itineraries most suitable to the customer.

Abstract: Read-only or pseudo table of contents (TOC) register. A value for a register to be used to access a reference data structure for a given module is obtained. The register is a virtual register that provides the value for the given module absent backing the register in memory. The value is used to access the reference data structure to obtain a variable address to be used by the given module.

Abstract: Read-only or pseudo table of contents (TOC) register. A value for a register to be used to access a reference data structure for a given module is obtained. The register is a virtual register that provides the value for the given module absent backing the register in memory. The value is used to access the reference data structure to obtain a variable address to be used by the given module.

Abstract: A computing platform, including: an execution unit to execute a program, the program including a first phase and a second phase; and a quick response module (QRM) to: receive a program phase signature for the first phase; store the program phase signature in a pattern match action (PMA) table; identify entry of the program into the first phase via the PMA; and apply an optimization to the computing platform.

Abstract: Systems and methods for selective stack trace generation during Java exception handling are disclosed. In embodiments, a method includes determining, by a Java virtual machine (JVM) of a computing device, that an exception object escapes a catch block of Java bytecodes; setting, by the JVM of the computing device, an escaped flag based on the determining that the exception object escapes the catch block; walking, by the JVM of the computing device, a call stack to locate an applicable catch block for the exception object, wherein the applicable catch block is the catch block; determining, by the JVM of the computing device, that the escaped flag is set in response to locating the applicable catch block; and creating, by the JVM of the computing device, a stack trace based on the determining that the escaped flag is set.

Abstract: Systems, devices, and methods are provided that allow detection of episodes in analyte measurement, prompting a patient to self-report possible causes for the episodes. Correlation of possible causes with detected episodes assists patient behavior modification to reduce the occurrence of episodes.

Abstract: Techniques are included for intelligently testing a software product using a limited number of test cases that are configured to test portions of the software product that have changed since a prior testing. To determine which test cases are best used for testing the implemented changes, a test case-to-programmatic flow mapping may be generated that relates each test case available for testing the software product with each programmatic flow that is tested by the test case. In addition, a programmatic flow-to-artifact mapping may be created that relates each programmatic flow discovered in the software product to each artifact that is accessed, created, changed, or dependent on the programmatic flow. Using these mappings, specific test cases may be determined for testing only those portions of the software product that have changed since the prior testing.

Abstract: A device for automatically repairing memory deallocation errors is disclosed. The device includes: a static analysis unit configured to generate status information for each one of the objects included in the source code of a program by way of a static analysis of the source code, where the status information includes position information, pointer information, and patch information, the position information associated with allocation sites of the objects, the pointer information associated with pointers pointing to the objects, the patch information associated with deallocation statements capable of deallocating the objects; a decision unit configured to choose patch candidates from the patch information and decide on a combination of the patch candidates capable of deallocating each of the objects only once; and a repair unit configured to repair the source code according to the combination of patch candidates.

Abstract: A control apparatus includes a RAM, a non-volatile storage device, and a computing device. The RAM stores an object file including an unresolved symbol. The non-volatile storage device stores a control program that can be updated. The computing device controls reception of the object file, generates a symbol-resolved object file by resolving the unresolved symbol, and updates the control program by using the symbol-resolved object file. The non-volatile storage device stores a symbol table in which only a function and a global variable that are accessed by the computing device executing a program described in the object file and that are allowed to be referred to during a process of updating the control program are defined. The computing device resolves the unresolved symbol by using the symbol table.

Abstract: Operations include a compilation process and a runtime process. A compiler compiles code to generate virtual machine instructions. The compiler further generates information referencing respective parameter types of the parameters of a target virtual machine instruction. The compiler stores the information external to and in association with the target virtual machine instruction. The information may be included in another virtual machine instruction that precedes the target virtual machine instruction. A runtime environment processes the target virtual machine instruction based on the information stored external to and in association with the target virtual machine instruction. Parameter types referenced by the external information override parameter types that are (a) referenced by the target virtual machine instruction itself, (b) deduced by the runtime environment and/or (c) stored directly in association with the parameter values.

Abstract: Systems and methods for executing an augmented program instruction are described. An example method may include a central processing unit receiving an executable program instruction. The central processing unit determines that the executable program instruction is an augmented program instruction. The augmented program instruction may include operands that provide input for an operation to be performed and an additional operand specifying a validation permission value to be compared to a permission value associated with a page table entry referenced by the augmented program instruction. Upon determining that the validation permission value specified in the augmented program instruction matches the permission value associated with the page table entry referenced by the augmented program instruction, the central processing unit performing the operation specified by the augmented program instruction.

Abstract: Embodiments of the invention include methods and systems for improving test case coverage. Aspects of the invention include executing, by a processor, a first test case, where the first test case includes a plurality of system calls to an operating system. Prior to execution of each system call in the plurality of system calls in the first test case, executing, by the processor, a pre-exit instruction. Responsive to execution of the pre-exit instruction, collecting pre-exit system call data regarding each system call in the plurality of system calls for the first test case. The processor executes a post-exit instruction after completion of each system call in the plurality of system calls and responsive to execution of the post-exit instruction, collects post-exit system call data regarding each system call in the plurality of system calls for the first test case.

Abstract: Embodiments of the invention include methods and systems for improving test case coverage. Aspects of the invention include executing, by a processor, a first test case, where the first test case includes a plurality of system calls to an operating system. Prior to execution of each system call in the plurality of system calls in the first test case, executing, by the processor, a pre-exit instruction. Responsive to execution of the pre-exit instruction, collecting pre-exit system call data regarding each system call in the plurality of system calls for the first test case. The processor executes a post-exit instruction after completion of each system call in the plurality of system calls and responsive to execution of the post-exit instruction, collects post-exit system call data regarding each system call in the plurality of system calls for the first test case.

Abstract: Embodiments relate to using a local entry point with an indirect call function. More specifically, an indirect call function configuration comprises a first application module having a target function of the indirect function call, a second application module with a symbolic reference to the target function of the indirect function call, and a third application module to originate an indirect function call. A compiler determines and indicates, in the program code, that the function pointer value resulting from a non-call reference of a function symbol is solely used to perform indirect calls in the same module, e.g. local-use-only. A linker or loader can read the indication the compiler made in the program code. The linker or loader use the local entry point associated with the target function if the target function is defined in the same module as the reference and is local-use-only.

Abstract: Systems, methods, and other embodiments associated with executing and analyzing processes are described. In one embodiment, a method includes providing access to a process execution architecture for executing available processes. The example method may also include evaluating configuration data to determine that an analysis is to be performed upon a first process for a user in response to the user accessing and logging into the process execution architecture. The example method may also include initiating an analysis session and executing the first process within the analysis session for the user while providing separate accessibility to other users to concurrently executing the first process. The example method may also include executing an analysis tool through the analysis session for analyzing execution of the first process. The example method may also include providing results of the analysis.

Abstract: Systems and methods are described herein that discuss how a computing platform executing a virtualized environment, in one example, can be integrity verified adaptively and on demand. This may occur at initial runtime, as well as during continued operations, and allows the platform user to install software from various vendors without sacrificing the integrity measurement and therefore the trustworthiness of the platform.

Abstract: An electronic processing system may include a processor and a multi-level memory coupled to the processor, the multi-level memory including at least a main memory and a fast memory, the fast memory having relatively faster performance as compared to the main memory. The system may further include a fast memory controller coupled to the fast memory and a graphics controller coupled to the fast memory controller. The fast memory may include a cache portion allocated to a cache region to allow a corresponding mapping of elements of the main memory in the cache region, and a graphics portion allocated to a graphics region for the graphics controller with no corresponding mapping of the graphics region with the main memory.

Abstract: A method for building a software application includes: creating data fields based on input from a user, each having a value or a reference to another data field; grouping the data fields into node data structures, each having a node state for specifying allowable operations; assigning respective node data structures to a plurality of container data structures, respectively, where each container data structure stores information about conditions, actions, actions results, and permission settings to operate on one or more data fields. The method further includes creating tree data structures by linking the container data structures in a predetermined hierarchical manner, where each tree data structure includes information about relations of container data structures and node data structures in each tree data structure; and linking the tree data structures in an ordered sequence to create a computer executable process for performing an application.

Abstract: A method, system, and apparatus are provided for debugging a compiled computer program having one or more variables by generating variable location information for a first variable stored in a CPU register that is parsed from runtime disassembly information for the compiled computer program and used to generate a pattern to search for the first variable in the runtime disassembly information to identify a program address for the first variable that can be used to set a software program watchpoint for the first variable.

Abstract: Embodiments of the present invention provide a method, computer program product, and system for debugging optimized code. The system includes a FAT binary, wherein the FAT binary comprises a non-optimized native code and an internal representation of a program's source code. An optimus program is configured to transform the internal representation of the program's source code into a fully optimized native code. The system also includes an enhanced loader, wherein the enhanced loader is configured to communicate with a debugger to determine a type of code to load.

Abstract: Aspects of an application program's execution which might be subject to non-determinism are performed in a deterministic manner while the application program's execution is being recorded in a virtual machine environment so that the application program's behavior, when played back in that virtual machine environment, will duplicate the behavior that the application program exhibited when originally executed and recorded. Techniques disclosed herein take advantage of the recognition that only minimal data needs to be recorded in relation to the execution of deterministic operations, which actually can be repeated “verbatim” during replay, and that more highly detailed data should be recorded only in relation to non-deterministic operations, so that those non-deterministic operations can be deterministically simulated (rather than attempting to re-execute those operations under circumstances where the outcome of the re-execution might differ) based on the detailed data during replay.

Abstract: Operations include a compilation process and a runtime process. A compiler compiles code to generate virtual machine instructions. The compiler further generates information referencing respective parameter types of the parameters of a target virtual machine instruction. The compiler stores the information external to and in association with the target virtual machine instruction. The information may be included in another virtual machine instruction that precedes the target virtual machine instruction. A runtime environment processes the target virtual machine instruction based on the information stored external to and in association with the target virtual machine instruction. Parameter types referenced by the external information override parameter types that are (a) referenced by the target virtual machine instruction itself, (b) deduced by the runtime environment and/or (c) stored directly in association with the parameter values.

Abstract: A code generating method, a compiler, a scheduling method, an apparatus and a scheduling system where the generated code is an executable code and applied to a heterogeneous system, and the heterogeneous system includes an accelerated processor and a central processing unit (CPU) and the code generating method includes acquiring, by a compiler, resource information of the accelerated processor and resource information of the CPU in order to generate an operable platform list, identifying, by the compiler, accelerable code from first user code, embedding, by the compiler, a hook function and an exception handling function before the accelerable code to form second user code, and compiling, by the compiler, the second user code to obtain the executable code and the executable code generated may automatically implement proper scheduling of processors during execution.

Abstract: Execution of instructions in a transactional environment is selectively controlled. A TRANSACTION BEGIN instruction initiates a transaction and includes controls that selectively indicate whether certain types of instructions are permitted to execute within the transaction. The controls include one or more of an allow access register modification control and an allow floating point operation control.

Abstract: Sensitive data is protected in a software product. A source file of the software product is compiled to generate an object file, in which the source file includes at least one piece of sensitive data marked with a specific identifier. The object file has a secure data section for saving storage information of the at least one piece of sensitive data at compile-time and run-time. The object file is linked to generate an executable file. The executable file updates the secure data section at run-time. Sensitive data is also protected when a core dump is generated.

Abstract: A method and apparatus is disclosed herein for use of a connectivity manager and a network infrastructure including the same. In one embodiment, the network infrastructure comprises one or more physical devices communicably coupled into a physical network infrastructure or via the overlay provided by the physical servers; and a virtual network domain containing a virtual network infrastructure executing on the physical network infrastructure. In one embodiment, the virtual network domain comprises one or more virtual network functions connected together through one or more links and executing on the one or more physical devices, and one or more interfaces coupled to one or more network functions via one or more links to communicate data between the virtual network domain and at least one of the one or more physical devices of the physical network infrastructure while the virtual network domain is isolated from other virtual infrastructures executing on the physical network infrastructure.

Abstract: A system includes a virtual machine (VM) server and a policy engine server. The VM server includes two or more guest operating systems and an agent. The agent is configured to collect information from the two or more guest operating systems. The policy engine server is configured to: receive the information from the agent; generate access control information for a first guest OS, of the two or more guest operating systems, based on the information; and configure an enforcer based on the access control information.

Abstract: Example systems and methods of configuring and displaying a model-based user interface are described. In one implementation, a method receives a request to configure a process model, the process model having an object type. A configuration rule associated with the object type is accessed, and a configuration instruction is received. The configuration instruction is analyzed based on the configuration rule, and if the configuration instruction is valid then the object type is modified based on the instruction. The process model is updated based on the modified object type. In another implementation, a method receives a request to display instance data of a process model, where the process model has an object type associated with the instance data. A structure rule determining placement of the instance data is accessed, and a user interface to display the instance data is generated based on the structure rule.

Abstract: A method includes receiving, by a processing device executing a compiler, source code of a function associated with a compiler prompt, in which the function includes at least one variable to be allocated in a memory space on a stack, determining that the compiler prompt indicates to retain at least a portion of the allocated memory space on the stack after execution of the function, and compiling, in view of the compiler prompt, the source code to generate a prologue function and an epilogue function associated with execution of the function, in which the prologue function is to allocate the memory space for the function, and at least one of the prologue function or the epilogue function is to cause to retain the at least a portion of the allocated memory space on the stack after the execution of the function.

Abstract: According to some embodiments, a system and method for determining a value for an error code for a program operation; determining whether the operation supports postponing a determination of an occurrence of an error for the operation; proceeding to evaluate a next operation in an instance the operation does support postponing the determination of an occurrence of an error for the operation; and checking the error code for the operation in an instance the operation does not support postponing the determination of an occurrence of an error for the operation.

Abstract: Among the combinations of failure candidates which combinations are generated by a generator, one combination that minimizes a cost derived in a cost calculator is selected. For the selected combination of failure candidates, a function, which specifically provides a correlation between one or more failure factor and an error (or error rate) of each failure element is output. A correct failure factor is estimated on the basis of the function.

Abstract: A method of analyzing a computer program under test (CPUT) using a system comprising a processor and a memory can include performing, by the processor, static analysis upon the CPUT and runtime analysis upon at least a portion of the CPUT. A static analysis result and a runtime analysis result can be stored within the memory. Portions of the CPUT analyzed by static analysis and not by runtime analysis can be determined as candidate portions of the CPUT. The candidate portions of the CPUT can be output.

Abstract: A device and method for outputting BIOS POST code, applied to a computer system. The device includes a basic input output system (BIOS), a transfer module and a video graphics array (VGA) connector. The BIOS generates a power-on self-test (POST) code using a low pin count (LPC) interface format. The transfer module receives the POST code and transfers the format of the POST code to a system management bus (SMBus) format. The VGA connector receives and outputs the POST code transmitted from the transfer module.

Abstract: Software self-checking mechanisms are described for improving software tamper resistance and/or reliability. Redundant tests are performed to detect modifications to a program while it is running. Modifications are recorded or reported. Embodiments of the software self-checking mechanisms can be implemented such that they are relatively stealthy and robust, and so that it they are compatible with copy-specific static watermarking and other tamper-resistance techniques.

Abstract: A “property checker” uses light-weight symbolic execution to prove that software programs satisfy safety properties by simultaneously performing program testing and program abstraction. A simple example of safety properties includes conditions that must be satisfied for proper program execution, such as whether an application properly interfaces with API methods or functions. Program tests are an “under-approximation” of program behavior, and abstractions are an “over-approximation” of the program. This simultaneous testing either finds a test-case that reaches an error state, or finds an abstraction showing that no path in the state space of the program can reach any error state. If a test-case reaches an error state, the property checker has discovered a violation of the safety property. Conversely, if no path in the state space can reach any error state, the property checker has proved that the program satisfies the desired safety property.

Abstract: A debugging method of the BIOS is disclosed. Firstly a debugging routine is written into a boot program. Then the BIOS executes the boot program. The BIOS judges whether a status value is equal to a default value of the debugging routine or not. When the status value is equal to the default value, the BIOS outputs a test value according to the debugging routine. When the status value is not equal to the default value, the debugging routine is quit, and the BIOS continues to execute the boot program.