Abstract: Methods, systems, and apparatus, including instructions encoded on storage media, for performing reduction of gradient vectors and similarly structured data that are generated in parallel, for example, on nodes organized in a mesh or torus topology defined by connections in at least two dimension between the nodes. The methods provide parallel computation and communication between nodes in the topology.

Abstract: The disclosure provides an approach for implementing fine grain data coherency of a memory region shared by an application within a virtual machine and a compute accelerator. The approach includes locating within a compute kernel a data write instruction to the shared memory region, and modifying the compute kernel to add a halting point after the data write instruction. The approach further includes configuring a virtualization system on which the virtual machine runs to set a value of a halt variable to true at an interval or in response to an occurrence of an event, wherein setting the halt variable to true causes the compute kernel to suspend execution at the conditional halting point.

Abstract: A method, system and computer-usable medium are disclosed for proactive data hinting in a telecom network. In certain embodiments, the invention relates to receiving a data hinting request for an application at a virtual network framework of the telecom network. A dedicated hinting channel is selected to provide the proactive data hinting; monitoring for the hinting request. Data is moved from the resource, such as edge cloud computing, where the application is implemented when the proactive data hinting is received. The application is used by user equipment, access points and Internet of Things (IoT) devices.

Abstract: Systems and methods for automated systolic array design from a high-level program are disclosed. One implementation of a systolic array design supporting a convolutional neural network includes a two-dimensional array of reconfigurable processing elements arranged in rows and columns. Each processing element has an associated SIMD vector and is connected through a local connection to at least one other processing element. An input feature map buffer having a double buffer is configured to store input feature maps, and an interconnect system is configured to pass data to neighboring processing elements in accordance with a processing element scheduler. A CNN computation is mapped onto the two-dimensional array of reconfigurable processing elements using an automated system configured to determine suitable reconfigurable processing element parameters.

Abstract: A method of operating a computer according to an actor model, the method comprising: defining a plurality of actors, each taking form of a data structure comprising respective data and one or more respective functions for operating on the respective data; generating a wrapped message to be transmitted from a transmitting actor to multiple recipient actors, the wrapped message comprising at least one constituent message, a sorted list of the recipient actors, and an index indicating an entry in the list, the index initially being set to indicate the first recipient actor in the list; transmitting the wrapped message from the transmitting actor to the first recipient actor in the list; each of the recipient actors, except the last in the list, upon receiving the wrapped message, advancing the index and forwarding the wrapped message to the next actor in the list as indicated by the advanced index.

Abstract: A visual devops application recognizes selection of a set of architectural resources, where at least one of the architectural resources requires two or more infrastructure resources to implement. The visual devops application visually presents a set of architectural nodes representing the architectural resources in an architectural flow diagram. The visual devops application maps the set of architectural nodes to a set of infrastructure resources sufficient to implement the set of architectural resources, and automatically provisions the set of infrastructure resources on one or more infrastructure computers.

Abstract: A data parallel pipeline may specify multiple parallel data objects that contain multiple elements and multiple parallel operations that operate on the parallel data objects. Based on the data parallel pipeline, a dataflow graph of deferred parallel data objects and deferred parallel operations corresponding to the data parallel pipeline may be generated and one or more graph transformations may be applied to the dataflow graph to generate a revised dataflow graph that includes one or more of the deferred parallel data objects and deferred, combined parallel data operations. The deferred, combined parallel operations may be executed to produce materialized parallel data objects corresponding to the deferred parallel data objects.

Abstract: A system, method, and computer program product are provided for allocating processor resources to process compute workloads and graphics workloads substantially simultaneously. The method includes the steps of allocating a plurality of processing units to process tasks associated with a graphics pipeline, receiving a request to allocate at least one processing unit in the plurality of processing units to process tasks associated with a compute pipeline, and reallocating the at least one processing unit to process tasks associated with the compute pipeline.

Abstract: Various embodiments are generally directed to techniques for supporting the distributed execution of a task routine among multiple secure controllers incorporated into multiple computing devices. An apparatus includes a first processor component and first secure controller of a first computing device, where the first secure controller includes: a selection component to select the first secure controller or a second secure controller of a second computing device to compile a task routine based on a comparison of required resources to compile the task routine and available resources of the first secure controller; and a compiling component to compile the task routine into a first version of compiled routine for execution within the first secure controller by the first processor component and a second version for execution within the second secure controller by a second processor component in response to selection of the first secure controller. Other embodiments are described and claimed.

Abstract: Systems and methods for software verification. In some embodiments, a first application architecture model is generated for a software application, wherein: the first application architecture model is generated based on a first version of source code of the software application; and the first application architecture model comprises a plurality of component models. A second version of source code may be compared against the first version of source code to determine at least one difference. At least one affected component model of the first application architecture model may be identified based on the at least one difference. A second application architecture model may be generated based on the second version of source code, wherein generating the second application architecture model comprises generating an updated version of the at least one affected component model.

Abstract: Systems and methods for software verification. In some embodiments, a first statement is identified, from a discovery query written in a query language, the first statement comprising a side-effect construct with at least a first parameter and a second parameter, wherein: the first parameter of the side-effect construct comprises at least one second statement specifying one or more actions to be performed; and the second parameter of the side-effect construct comprises at least one condition specified based on a syntactic pattern. Source code of a software application may be analyzed to determine whether the at least one condition is satisfied, wherein determining whether the at least one condition is satisfied comprises determining whether the source code comprises a program element that matches the syntactic pattern.

Abstract: As disclosed herein, a system for conducting mapping and reducing operations includes a shared storage subsystem that is connected to one or more mapping servers and one or more reducing servers via a high-speed data link and communication protocol. Each mapping server receives a multitude of data records, aggregates the data records having a particular value, and sorts and stores the resulting aggregated data records on the shared storage subsystem. Each reducing server accesses the shared storage subsystem and accumulates information on the aggregated data records for a particular common value. In many instances, the access rates to the shared storage subsystem achieved by the mapping servers and the reducing servers approach that of accessing a local attached storage device. A computer program product and method corresponding to the system for conducting mapping and reducing operations are also disclosed herein.

Abstract: As disclosed herein, a method for conducting mapping and reducing operations includes receiving a plurality of data records and aggregating data records having a common value for a selected field within the data records to provide aggregated data records for each common value, storing the aggregated data records on a shared storage subsystem, and accessing the aggregated data records on the shared storage subsystem. The method further comprises accumulating information for the aggregated data records to provide accumulated information, and using the accumulated information.

Abstract: A visual devops application recognizes selection of a set of architectural resources, where at least one of the architectural resources requires two or more infrastructure resources to implement. The visual devops application visually presents a set of architectural nodes representing the architectural resources in an architectural flow diagram. The visual devops application maps the set of architectural nodes to a set of infrastructure resources sufficient to implement the set of architectural resources, and automatically provisions the set of infrastructure resources on one or more infrastructure computers.

Abstract: A method and a system is disclosed herein for model checker based efficient elimination of false positives from static analysis warnings generated during static analysis of an application code. The system computes complete-range non-deterministic value variables (cnv variables) that are based on data flow analysis or static approximation of execution paths by control flow paths. During computation of cnv variables, over approximation (may-cnv variables) and under approximation (must-cnv variables) of a set of cnv variables at a program point is identified. The computed cnv variables are used to check whether an assertion variable is a cnv variable and the corresponding assertion verification call is redundant or otherwise. The identified redundant calls are then skipped for the efficiency of the false positives elimination and the model checker is invoked corresponding to the non-redundant assertion verification calls.

Abstract: A file generation system for storage of structured data onto a distributed database includes an intermediate data generation module to generate a set of intermediate key-value pairs for each of one or more records in at least one subset of the structured data. A key-value pair includes a key and a value corresponding to the key, where the key is a unique identifier of the value. A file generation system further includes an intermediate data sorting module to sort the set of intermediate key-value pairs to generate a plurality of output files. Each of the plurality of output files includes at least one key-value pair. Further, the file generation system includes a file storing module to store the plurality of output files in the distributed database, where the plurality of output files are representative of the structured data.

Abstract: Systems and methods for increasing user confidence in results that are produced by one or more programs that are generated by an underlying Programming-By-Example (PBE) system based on user input examples. A plurality of generated programs that have been generated using one or more user input examples that are indicative of an output that should be achieved to comply with a user determined result are received. The generated programs are narrowed based on one or more sub-expressions of the programs that are likely to cause the resultant program to comply with the user determined result. The one or more sub-expressions are exposed. Input that selects at least one of the one or more exposed sub-expressions to thereby identify the one of the generated programs that will result in the user determined result is received.

Abstract: Runtime statistics from the actual performance of operations on a set of data are collected and utilized to dynamically modify the execution plan for processing a set of data. The operations performed are modified to include statistics collection operations, the statistics being tailored to the specific operations being quantified. Optimization policy defines how often optimization is attempted and how much more efficient an execution plan should be to justify transitioning from the current one. Optimization is based on the collected runtime statistics but also takes into account already materialized intermediate data to gain further optimization by avoiding reprocessing.

Abstract: Described herein are optimizations of thread loop intermediate representation (IR) code. One embodiment involves an algorithm that, based on data-flow analysis, computes sets of temporary variables that are loaded at the beginning of a thread loop and stored upon exit from a thread loop. Another embodiment involves reducing the size of a thread loop trip for a commonly-found case where a piece of compute shader is executed by a single thread (or a compiler-analyzable range of threads). In yet another embodiment, compute shader thread indices are cached to avoid excessive divisions, further improving execution speed.

Abstract: Cost-based optimization of configuration parameters and cluster sizing for distributed data processing systems are disclosed. According to an aspect, a method includes receiving at least one job profile of a MapReduce job. The method also includes using the at least one job profile to predict execution of the MapReduce job within a plurality of different predetermined settings of a distributed data processing system. Further, the method includes determining one of the predetermined settings that optimizes performance of the MapReduce job. The method may also include automatically adjusting the distributed data processing system to the determined predetermined setting.

Abstract: Methods and apparatus for biomedical data analysis to produce enhanced images of tubular structures are disclosed. A Gaussian convolution of an input image is used to calculate a Hessian matrix. An Eigen decomposition of the Hessian matrix produces eigenvectors and eigenvalues, which are sorted to determine bright tubular structure detection according to high and low values that represent brightness, and structure shape. A tubularity computation calculates the probability of a voxel of interest being part of a tubular network. Embodiments may be implemented to share computer resources such as between a computer processing unit (CPU) and a graphic processing unit (GPU).

Abstract: The techniques and/or systems described herein implement parallel processing of a dynamic programming problem across stages and/or clusters by breaking dependencies between stages and/or clusters. For instance, the techniques and/or systems may identify dependencies between sub-problems of the dynamic programming problem and group the sub-problems into stages. The techniques and/or systems may also group the stages into clusters (e.g., at least two clusters to be parallel processed). Then, the techniques and/or systems generate one or more solutions to use instead of actual solutions so that the dynamic programming problem can be parallel processed across stages and/or clusters.

Abstract: Programming in a multiprocessor environment includes accepting a program specification that defines a plurality of processing modules and one or more channels for sending data between ports of the modules, mapping each of the processing modules to run on a set of one or more processing engines of a network of interconnected processing engines, and for at least some of the channels, assigning one or more elements of one or more processing engines in the network to the channel for sending data between respective processing modules.

Abstract: A method and system for parallelization of sequential computer program code are described. In one embodiment, an automatic parallelization system includes a syntactic analyzer to analyze the structure of the sequential computer program code to identify the positions to insert SPI to the sequential computer code; a profiler for profiling the sequential computer program code by preparing call graph to determine dependency of each line of the sequential computer program code and the time required for the execution of each function of the sequential computer program code; an analyzer to determine parallelizability of the sequential computer program code from the information obtained by analyzing and profiling of the sequential computer program code; and a code generator to insert SPI to the sequential computer program code upon determination of parallelizability to obtain parallel computer program code, which is further outputted to a parallel computing environment for execution and the method thereof.

Abstract: Methods, apparatus and computer software product for source code optimization are provided. In an exemplary embodiment, a first custom computing apparatus is used to optimize the execution of source code on a second computing apparatus. In this embodiment, the first custom computing apparatus contains a memory, a storage medium and at least one processor with at least one multi-stage execution unit. The second computing apparatus contains at least two multi-stage execution units that allow for parallel execution of tasks. The first custom computing apparatus optimizes the code for parallelism, locality of operations and contiguity of memory accesses on the second computing apparatus. This Abstract is provided for the sole purpose of complying with the Abstract requirement rules. This Abstract is submitted with the explicit understanding that it will not be used to interpret or to limit the scope or the meaning of the claims.

Abstract: A system and methods are disclosed for executing a technical computing program in parallel in multiple execution environments. A program is invoked for execution in a first execution environment and from the invocation the program is executed in the first execution environment and one or more additional execution environments to provide for parallel execution of the program. New constructs in a technical computing programming language are disclosed for parallel programming of a technical computing program for execution in multiple execution environments. It is also further disclosed a system and method for changing the mode of operation of an execution environment from a sequential mode to a parallel mode of operation and vice-versa.

Abstract: Collective operation protocol selection in a parallel computer that includes compute nodes may be carried out by calling a collective operation with operating parameters; selecting a protocol for executing the operation and executing the operation with the selected protocol. Selecting a protocol includes: iteratively, until a prospective protocol meets predetermined performance criteria: providing, to a protocol performance function for the prospective protocol, the operating parameters; determining whether the prospective protocol meets predefined performance criteria by evaluating a predefined performance fit equation, calculating a measure of performance of the protocol for the operating parameters; determining that the prospective protocol meets predetermined performance criteria and selecting the protocol for executing the operation only if the calculated measure of performance is greater than a predefined minimum performance threshold.

Abstract: A dataflow program defining actors that pass tokens from one to another via connections is processed by causing one or more processors to access and execute instructions of the dataflow program. As instructions of the dataflow program are being executed, a first set of trace records is created that represents a sequence of events (e.g., token production/consumption, actor state change, or action firing). A first subset of the trace records is displayed and one of these is selected. The first set is processed to identify, based on definitions specified by the dataflow program, a second set of trace records, of which a subset is displayed.

Abstract: A framework is provided for enabling and managing customizations to an application. In one embodiment, techniques are provided that enable the customizability of an application to be controlled based upon hierarchical relations between elements of the application.

Abstract: Techniques are provided for displaying information regarding customizations made to an application. The information may be displayed in a design-time environment and/or a runtime environment.

Abstract: A method and a medium are disclosed for executing a technical computing program in parallel in multiple execution environments. A program is invoked for execution in a first execution environment and from the invocation the program is executed in the first execution environment and one or more additional execution environments to provide for parallel execution of the program. New constructs in a technical computing programming language are disclosed for parallel programming of a technical computing program for execution in multiple execution environments. It is also further disclosed a system and method for changing the mode of operation of an execution environment from a sequential mode to a parallel mode of operation and vice-versa.

Abstract: A system and method for improving software maintainability, performance, and/or security by associating a unique marker to each software code-block; the system comprising of a plurality of processors, a plurality of code-blocks, and a marker associated with each code-block. The system may also include a special hardware register (code-block marker hardware register) in each processor for identifying the markers of the code-blocks executed by the processor, without changing any of the plurality of code-blocks.

Abstract: A method of generating a computer program, the method comprising: independently compiling a plurality of source code modules to generate a plurality of respective object modules comprising a plurality of respective threads explicitly designated by a user to be executed in parallel; in each of the object modules, inserting at least one symbol indicative of a property of the object module's thread potentially conflicting with a corresponding property of a thread of another of said object module as a result of parallel execution of those threads; executing a linker to perform a linking process on said object modules, the linking process comprising: assessing the symbols in conjunction with one another to determine whether a conflict exists between the threads of two or more of the respective object modules; and linking the object modules to generate a computer program in which said threads are executable in parallel, wherein the linking is performed in dependence on said assessment.

Abstract: A method and an apparatus for a parallel computing program calling APIs (application programming interfaces) in a host processor to perform a data processing task in parallel among compute units are described. The compute units are coupled to the host processor including central processing units (CPUs) and graphic processing units (GPUs). A program object corresponding to a source code for the data processing task is generated in a memory coupled to the host processor according to the API calls. Executable codes for the compute units are generated from the program object according to the API calls to be loaded for concurrent execution among the compute units to perform the data processing task.

Abstract: One or more embodiments of the invention is a computer-implemented method for speculatively executing application event responses. The method includes the steps of identifying one or more event responses that could be issued for execution by an application being executed by a master process, for each event response, generating a child process to execute the event response, determining that a first event response included in the one or more event responses has been issued for execution by the application, committing the child process associated with the first event response as a new master process, and aborting the master process and all child processes other than the child process associated with the first event response.

Abstract: A method is disclosed for producing a software application with at least two layers, including a processing layer and a process layer, wherein each layer is encapsulated and hence platform-independent in its execution, the encapsulated layers communicating via an application programming interface. A system is also disclosed for producing an application including a flexible interconnection interface between encapsulated layers. By virtue of the implementation of an additional configurable interconnection interface in the application programming interface between two encapsulated application layers, the architecture layering can be retained regardless of the respective deployment, and only the communication profiles of the interconnection interfaces need be adapted to the deployment.

Abstract: Systems, methods, and computer-readable media for optimizing emulated fixed-function and programmable graphics operations are provided. Data comprising fixed function and programmable states for an image or scenario to be rendered is received. The data for the image is translated into operations. One or more optimizations are applied to the operations. The optimized operations are implemented to render the scenario.

Abstract: Techniques for using one or more aspect-oriented parallelism primitives to implement one or more aspects of a program in parallel are provided. The techniques include using one or more aspect-oriented parallelism primitives to implement one or more aspects of a program in parallel, wherein implementing the one or more aspects of a program in parallel comprises implementing the one or more aspects of a program in parallel on a multi-core processor.

Abstract: A method for facilitating the processing of markup language documents, e.g., XML documents, uses a code generator that creates programs configured to read dynamic XML documents at run time, avoiding many of the complexities arising from the use of conventional “XML Parse” statements. In one embodiment, this process involves (1) creating a template document using the markup language, wherein the template document includes a set of tags associated with the markup language documents; (2) parsing the template document to determine a data structure corresponding to the tags in the template document; and (3) generating an application program in the programming language (e.g., COBOL), wherein the application program includes a definition of the data structure, and is configured to read, during run-time, the markup language document and generate a corresponding set of data elements corresponding to the data structure.

Abstract: A deployment modeling platform enables a user to model application characteristics of target software and to associate application modeling parameters to the modeled application characteristics. A user may also model environment characteristics of a target deployment environment and to associate environment modeling parameters to the modeled deployment environment characteristics. Still further, a user may create a deployment model that associates and maps selected parameters of the modeled application characteristics of the target software to associated parameters of the modeled environment characteristics of the deployment environment, and to verify that each parameter that relates to a requirement is mapped to and is fulfilled by an associated parameter that relates to a corresponding capability to determine whether validation problems exist in order to deploy the target software in the associated deployment environment.

Abstract: A programming language support for debugging heap related errors includes one or more queries for determining one or more global properties associated with use of the area by the program. The one or more queries may be executed in parallel or concurrently and dynamically utilize available number of cores.

Abstract: The debugging of a kernel in a data parallel environment. A debugger engine interfaces with a data parallel environment that is running one or more data parallel kernels through a first interface. For each of at least one of the one or more kernels, a program object is formulated that abstractly represents the data parallel kernel including data parallel functionality of the kernel. The program object has a second interface that allows information regarding the kernel to be discovered by the debugger user interface module.

Abstract: A method of analyzing single thread access by a variable of a multi-threaded program is provided. The method includes computing a thread identifier of a thread to be executed in a node of the multi-thread program; computing multiple threads configured to concurrently execute the node; and computing thread accessibility by deducing one or more variables that are executed in a single thread of the program from one or more pairs of the computed threads that concurrently execute the node.

Abstract: Described herein are techniques for generating invocation stubs for a data parallel programming model so that a data parallel program written in a statically-compiled high-level programming language may be more declarative, reusable, and portable than traditional approaches. With some of the described techniques, invocation stubs are generated by a compiler and those stubs bridge a logical arrangement of data parallel computations to the actual physical arrangement of a target data parallel hardware for that data parallel computation.

Abstract: A method comprising: independently compiling a plurality of modules of source code to generate a plurality of respective object modules comprising a plurality of respective parallel threads explicitly designated by a user to be executed in parallel on a target platform; in each of the object modules, inserting at least one symbol indicative of a usage of a resource of the target platform associated with the respective thread; executing a linker to perform a linking process for linking the object modules, wherein the linking process comprises assessing the symbols in conjunction with one another, and based on the assessment generating an indication relating to a usage of the resource required for execution of the threads in parallel.

Abstract: A data parallel pipeline may specify multiple parallel data objects that contain multiple elements and multiple parallel operations that operate on the parallel data objects. Based on the data parallel pipeline, a dataflow graph of deferred parallel data objects and deferred parallel operations corresponding to the data parallel pipeline may be generated and one or more graph transformations may be applied to the dataflow graph to generate a revised dataflow graph that includes one or more of the deferred parallel data objects and deferred, combined parallel data operations. The deferred, combined parallel operations may be executed to produce materialized parallel data objects corresponding to the deferred parallel data objects.

Abstract: A method of dynamic parallelization for programs in systems having at least two processors includes examining computer code of a program to be performed by the system, determining a largest possible parallel region in the computer code, classifying data to be used by the program based on a usage pattern and initiating multiple, concurrent processes to perform the program. The multiple, concurrent processes ensure a baseline performance that is at least as efficient as a sequential performance of the computer code.

Abstract: A computing device comprising an application utilizing content comprising a plurality of JavaScripts, wherein the computing device compiles and executes a first of the plurality of JavaScripts substantially simultaneously as compiling and executing a second of the plurality of JavaScripts.

Abstract: The present invention relates generally to computer programming, and more particularly to, systems and methods for parallel distributed programming. Generally, a parallel distributed program is configured to operate across multiple processors and multiple memories. In one aspect of the invention, a parallel distributed program includes a distributed shared variable located across the multiple memories and distributed programs capable of operating across multiple processors.

Abstract: Systems and methods that enhance expressibility in a programming language (e.g., Visual Basic) via relaxation of artificial restrictions and extension of delegates associated therewith, without changing the runtime infrastructure. A stub is employed that can replace an impermissible expression in the programming language, to leverage the existing permissible expressions.