Including Analysis Of Program Execution Patents (Class 717/131)
  • Patent number: 10747880
    Abstract: Certain embodiments of the present invention are configured to facilitate analyzing computer code more efficiently. For example, by conducting a first level abstraction (e.g., symbolic interpretation and algebraic simplification) and a second level abstraction (e.g., generalization) of the computer code, the analysis may more accurately account for variations in the code that may occur as a result of register renaming, instruction reordering, choice of instructions, etc. while minimizing the cost of computations required to perform the analysis.
    Type: Grant
    Filed: December 30, 2013
    Date of Patent: August 18, 2020
    Assignee: University of Louisiana at Lafayette
    Inventor: Arun Lakhotia
  • Patent number: 10719336
    Abstract: Described herein is a system and method for dependency version conflict auto-resolution for executing job(s). During execution of a particular version of a workflow comprising tasks, information regarding a particular task to be executed is received. The particular task is dependent on another task. Information regarding the dependency is retrieved from a global dependency data structure (e.g., graph) that stores current dependency information regarding the tasks. When it is determined that the conflict exists with respect to the dependency of the particular task on the another task, information regarding the dependency and workflows is retrieved, information regarding a dependency change history regarding at least one of the plurality of tasks, information regarding the particular version of the workflow and a different version of the workflow. A resolution to the conflict can be identified based, at least in part, upon the retrieved information, and, a correct action performed.
    Type: Grant
    Filed: May 14, 2019
    Date of Patent: July 21, 2020
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Vitalii Tsybulnyk, Aritra Dattagupta, Marwan Elias Jubran, Willy Tanimihardja
  • Patent number: 10705814
    Abstract: Certain example embodiments relate to techniques for generating reassemblable disassemblies of binaries using declarative logic. A declarative logic programming language (e.g., Datalog) is used to compile reverse engineering, binary analysis, and disassembly rules into a format applicable to an executable program, yielding disassembly of that program. Datalog, for example, can be used as a query language for deductive databases, to facilitate this approach. Certain example embodiments thus involve (1) preparation of an executable for Datalog analysis, (2) inference rules and the application of Datalog for program analysis, including the application of Datalog to the domain of binary reverse engineering and analysis, and (3) the collection of assembly code from the results of the Datalog analysis. These rules can include both “hard rules” and “soft rules” or heuristics, even though standard Datalog does not support the latter.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: July 7, 2020
    Assignee: GRAMMATECH, INC.
    Inventors: Eric Michael Schulte, Antonio Enrique Flores Montoya
  • Patent number: 10684937
    Abstract: This disclosure relates generally to a system and a method for repositioning of a plurality of static analysis alarms is provided. The proposed repositioned techniques, reposition each of the static analysis alarms from the set of static analysis alarms up or down the application code from the program points of their original reporting, for reducing the number of static analysis alarms reported or for reporting them closer to their causes or for both the objectives. Further the proposed repositioning techniques also ensure that the repositioning of the static analysis alarms is without affecting the errors uncovered by them. Further the disclosure also proposes to maintain traceability links between a repositioned static analysis alarm and its corresponding static analysis alarm(s).
    Type: Grant
    Filed: December 4, 2018
    Date of Patent: June 16, 2020
    Assignee: Tata Consultancy Services Limited
    Inventors: Tukaram B. Muske, Rohith Talluri
  • Patent number: 10684938
    Abstract: Disclosed aspects relate to debugging a set of code components of an application program. A set of defect data which indicates a set of defects may be collected with respect to an application program. The set of defect data may be derived from a set of post-compilation users of the application program. A set of test case data which indicates a set of user interface features of the application program may be collected with respect to the application program. The set of test case data may be derived from a set of development tests of the application program. Using both the set of defect data and the set of test case data, a set of fragility data for the set of code components of the application program may be determined. Based on the set of fragility data, the set of code components of the application program may be debugged.
    Type: Grant
    Filed: October 24, 2018
    Date of Patent: June 16, 2020
    Assignee: International Business Machines Corporation
    Inventors: Vijay Ekambaram, Leigh A. Williamson, Shinoj Zacharias
  • Patent number: 10671380
    Abstract: Implementations of the present specification include receiving, from a smart contract, and by a function controller executing within the blockchain network, a function call to execute a function, the function call including data for execution of the function, transmitting, by the function controller, the data of the function call to a function component, the function component executing the function based on the data of the function call, receiving, by the function controller, a function result from the function component, and providing, by the function controller, the function result to the smart contract.
    Type: Grant
    Filed: April 22, 2019
    Date of Patent: June 2, 2020
    Assignee: Alibaba Group Holding Limited
    Inventors: Kailai Shao, Xuming Lu
  • Patent number: 10664334
    Abstract: A robot, failure diagnosis system, failure diagnosis method, and recording medium that enable easy diagnosis of a failure of a robot are provided. In a robot 100, a failure diagnosis unit 150 diagnoses a failure of the robot 100, based on a spontaneous self motion made by the robot 100 independently of a predetermined target without interaction with the predetermined target.
    Type: Grant
    Filed: July 10, 2017
    Date of Patent: May 26, 2020
    Assignee: CASIO COMPUTER CO., LTD.
    Inventors: Toshihiko Otsuka, Hiroki Atsumi, Takahiro Tomida, Yoshihiro Kawamura
  • Patent number: 10664374
    Abstract: An event analysis device having an event collector for collecting event log data representing an operation history by a DCS operator; an event analyzer for analyzing the event log data, and extracting basic unit operations or unit operations representing an operation method based on operations of the DCS operator or an operation intention based on operations of the DCS operator; an operation sequence extractor for extracting operation sequences which the basic unit operations or the unit operations are aligned in accordance with time order in every service time period; an operation clusterer for clustering the operation sequences based on similarity among the operation sequences extracted in every service time period; and an operation procedure generator for analyzing the operation sequences clustered in same type, and estimating a structure of the operation procedure based on the operation of the DCS operator.
    Type: Grant
    Filed: November 7, 2016
    Date of Patent: May 26, 2020
    Assignee: Yokogawa Electric Corporation
    Inventors: Zhuo Liu, Yuichi Sakuraba
  • Patent number: 10664387
    Abstract: Disclosed aspects relate to debugging a set of code components of an application program. A set of defect data which indicates a set of defects may be collected with respect to an application program. The set of defect data may be derived from a set of post-compilation users of the application program. A set of test case data which indicates a set of user interface features of the application program may be collected with respect to the application program. The set of test case data may be derived from a set of development tests of the application program. Using both the set of defect data and the set of test case data, a set of fragility data for the set of code components of the application program may be determined. Based on the set of fragility data, the set of code components of the application program may be debugged.
    Type: Grant
    Filed: October 30, 2018
    Date of Patent: May 26, 2020
    Assignee: International Business Machines Corporation
    Inventors: Vijay Ekambaram, Leigh A. Williamson, Shinoj Zacharias
  • Patent number: 10649688
    Abstract: A processor includes a memory subsystem having a first memory subunit that includes a status register and an execution engine unit coupled to the memory subsystem. The execution engine unit is to: randomly select a load operation to monitor; determine a re-order buffer identifier of the load operation; and transmit the re-order buffer identifier to the memory subsystem. Responsive to receipt of the re-order buffer identifier, the first memory subunit stores a piece of information, related to a status of the load operation, in the status register. Responsive to detection of retirement of the load operation, the first memory subunit is to store the piece of information from the status register into a particular field of a record of a memory buffer, wherein the particular field is associated with the first memory subunit.
    Type: Grant
    Filed: November 1, 2018
    Date of Patent: May 12, 2020
    Assignee: Intel Corporation
    Inventors: Ahmad Yasin, Michael Chynoweth, Rajshree Chabukswar, Muhammad Taher
  • Patent number: 10614238
    Abstract: A data protection method includes detecting whether critical code of an application has been called, with the critical code being used to access critical data; switching from a preconfigured first extended page table (EPT) to a preconfigured second EPT according to preset trampoline code corresponding to the critical code when an operating system calls the critical code using the first EPT, wherein memory mapping relationships of the critical data and the critical code are not configured in the first EPT, the memory mapping relationships of the critical data and the critical code are configured in the second EPT, and the critical data and the critical code are separately stored in independent memory areas; and switching from the second EPT back to the first EPT according to the trampoline code after calling and executing the critical code using the second EPT.
    Type: Grant
    Filed: November 22, 2017
    Date of Patent: April 7, 2020
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Yutao Liu, Yubin Xia, Haibo Chen
  • Patent number: 10613971
    Abstract: Certain aspects of the present disclosure provide techniques for autonomously testing a web-based application. The techniques generally include an analysis module searching a page of the web-based application for one or more fillable form fields and identifying a fillable form field in the page. The analysis module determines a field type associated with the fillable form field, determines a field data format based on the field type of the fillable form field and generates a test data entry based on the field data format. The analysis module then enters the test data entry into the respective fillable form field and submits the test data entry to a server.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: April 7, 2020
    Assignee: INTUIT INC.
    Inventor: Raj Vasikarla
  • Patent number: 10606571
    Abstract: A direct relationship extraction unit generates a direct relationship list indicating a set of a direct dependence source, a direct dependence destination, and a direct dependence type. A storage unit stores an indirect relationship rule including a plurality of direct dependence types, an element relationship, a dependence source element, and a dependence destination element.
    Type: Grant
    Filed: April 26, 2016
    Date of Patent: March 31, 2020
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Natsuko Fujii, Yuki Hikawa, Ryo Kashiwagi, Katsuhiko Nakamura, Takanari Fujimoto, Miwa Fukuda
  • Patent number: 10608879
    Abstract: Aspects of the present disclosure relate to systems and methods that help automate the validation of a configuration of a functional product. Every functional product, be it a service, device, or combination thereof, has one or more documents associated with it. These documents may include such documentation as: (1) Release Notes; (2) Configuration Guides; (3) command line interfaces (CLIs)/application program interfaces (APIs); (4) Data Sheets; (5) Installation Guides; (6) User Manuals; (7) Errata notices; and (8) other documentation. In embodiments, datatset used for validating a configuration setting may be extracted using natural language processing from technical documentation. In embodiments, this extracted information is used to validate a design vector representing a configuration setting.
    Type: Grant
    Filed: April 13, 2016
    Date of Patent: March 31, 2020
    Assignee: DELL PRODUCTS L.P.
    Inventors: Vinay Sawal, Sachinrao Chittaranjan Panemangalore, Vivek Dharmadhikari, Kuntal Atulbhai Patel
  • Patent number: 10606731
    Abstract: Disclosed aspects relate to debugging a set of code components of an application program. A set of defect data which indicates a set of defects may be collected with respect to an application program. The set of defect data may be derived from a set of post-compilation users of the application program. A set of test case data which indicates a set of user interface features of the application program may be collected with respect to the application program. The set of test case data may be derived from a set of development tests of the application program. Using both the set of defect data and the set of test case data, a set of fragility data for the set of code components of the application program may be determined. Based on the set of fragility data, the set of code components of the application program may be debugged.
    Type: Grant
    Filed: April 23, 2019
    Date of Patent: March 31, 2020
    Assignee: International Business Machines Corporation
    Inventors: Vijay Ekambaram, Leigh A. Williamson, Shinoj Zacharias
  • Patent number: 10565089
    Abstract: A first code version is received. The first code version includes a plurality of code features, such as methods or classes. A second code version is received. The second code version includes a plurality of code features. The first code version is executed. A first plurality of code features executed during the execution of the first code version are determined. A second plurality of code features differing between the first and second code versions are determined. The first and second plurality of code features are compared. An indication is provided that a code feature is potentially relevant to the code behavior if the code feature is present in the first plurality of code features and in the second plurality of code features.
    Type: Grant
    Filed: August 15, 2016
    Date of Patent: February 18, 2020
    Assignee: SAP SE
    Inventors: Xia Yu, Yang Peng, Xikang Wu, Jieyan Huang
  • Patent number: 10489354
    Abstract: Example embodiments relate to storage systems for containers. An example storage system may include a set of servers associated with a global namespace for containers, a plurality of storage domains connected under the global namespace, and a processor to identify a storage tree for a container image of a container, where the storage tree is mapped to a storage domain storing the container image, and to clone the container to a second container, where the second container image is stored in a second storage domain.
    Type: Grant
    Filed: July 29, 2016
    Date of Patent: November 26, 2019
    Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
    Inventors: Nigel Edwards, Chris I Dalton, Venkataraman Kamalaksha, Kishore Kumar M
  • Patent number: 10484506
    Abstract: Existing program code, which is executable on one or more computers forming part of a distributed computer system, is analyzed. The analysis identifies log output instructions present in the program code. Log output instructions are those statements or other code that generate log messages related to service requests processed by the program code. A log model is generated using the analysis. The log model is representative of causal relationships among service requests defined by the program code. The log model can then be applied to logs containing log messages generated by execution of the program code, during its normal operation, to group log messages for improved analysis, including visualization, of the performance and behaviour of the distributed computer system.
    Type: Grant
    Filed: July 4, 2017
    Date of Patent: November 19, 2019
    Assignee: YSCOPE INC.
    Inventors: Muhammad Faizanullah, David Lion, Yu Luo, Michael Stumm, Ding Yuan, Xu Zhao, Yongle Zhang
  • Patent number: 10453130
    Abstract: An electronic exchange system includes a physical data bus directly communicatively coupling first and second physical processing elements of an electronic processor. The second element may receive indications of orders from remote devices not part of the system, add each order to a respective one of a queue of buy orders and a queue of sell orders for a financial instrument, and determine a match between orders of the respective queues. The first element may receive an indication of an occurrence of an event, determine that an adjustment to an order is conditioned on a criteria associated with the occurrence, determine that the criteria is satisfied, and transmit, through the physical data bus, to the second element, an indication to adjust the order that acts as an interrupt to processing of the second element to cause the second element to, in response to receiving the indication, adjust the order.
    Type: Grant
    Filed: March 18, 2009
    Date of Patent: October 22, 2019
    Assignee: BGC PARTNERS, INC.
    Inventors: Howard W. Lutnick, Bijoy Paul, Michael Sweeting
  • Patent number: 10445253
    Abstract: The embodiments described herein relate to dynamically managing metric data of a network environment with respect to a data storage system. A data retention policy is analyzed, which includes extracting one or more metric definitions from the retention policy. A relevance of a set of metric data is identified based on the analysis. The set of metric data includes an aggregation of one or more metric observations. A storage location in a data storage system for the set of metric values is selected based on the identified relevance. The data storage system includes a cache storage location and a persistent storage location. The set of metric data is retained in the selected storage location. As the retention policy is modified, select data may be re-classified and moved within the storage system based on the re-classification.
    Type: Grant
    Filed: April 20, 2016
    Date of Patent: October 15, 2019
    Assignee: International Business Machines Corporation
    Inventors: Gabriel Alatorre, Heiko Ludwig, Nagapramod S. Mandagere, Mohamed Mohamed
  • Patent number: 10430184
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for attributing violation introductions and removals. One of the methods includes receiving a request to compute a number of violation introductions attributable to a particular developer entity in a plurality of ancestor snapshots of an original snapshot in a revision graph of a code base. A respective match set for each of a plurality of violations occurring in the plurality of ancestor snapshots of the original snapshot are computed, wherein each match set for a particular violation in a particular snapshot includes any transitively matching violations in the ancestor snapshots of the particular snapshot that transitively match the particular violation. A count of unique match sets having at least one violation that was introduced by the particular developer entity is computed. The number of unique match sets is provided in response to the request.
    Type: Grant
    Filed: October 24, 2017
    Date of Patent: October 1, 2019
    Assignee: Semmle Limited
    Inventor: Robin Neatherway
  • Patent number: 10417372
    Abstract: Systems and techniques for creating and displaying a circuit design view are described. A hardware description language (HDL) specification and a power intent specification of the circuit design can be analyzed to determine a correspondence between one or more signals in the HDL specification and one or more isolation cells in the power intent specification. The correspondence can be stored in a memory of a computer, and can be used for annotating a visual representation of a signal in a circuit design view based on a corresponding isolation cell. Next, the circuit design view with the annotated visual representation of the signal can be displayed.
    Type: Grant
    Filed: November 25, 2015
    Date of Patent: September 17, 2019
    Assignee: Synopsys, Inc.
    Inventors: Chih Neng Hsu, Yaping Chen
  • Patent number: 10409563
    Abstract: System and method to generate automatically a compact application code suitable for taking advantage of the intrinsic power of processors. The system can generate the application code executable by a processor from a formal specification associated with an application, the formal specification including operators, and the system including an analyzer to code each operator of the formal specification by a corresponding operation code followed by a minimum number of input code(s) and output code identifying input and output parameters associated with the operator, thus automatically generating a compact application code suitable for being stored in a memory associated with the processor and for being executed by an interpreter of the processor.
    Type: Grant
    Filed: September 20, 2017
    Date of Patent: September 10, 2019
    Assignee: Airbus Operations (S.A.S.)
    Inventors: Dominique Portes, Victor Jegu
  • Patent number: 10387144
    Abstract: A method for determining logging statement coverage of code. According to the inventive embodiments of this disclosure, a method is used for determining logging statement coverage of code, the method including the step of determining a plurality of code paths through the code file that may be traversed during execution of a program, identifying a plurality of branches in the code paths that do not contain a logging statement; and calculating, as a percentage of the plurality of code paths through the code file that may be traversed during execution of percentage code paths that have not been traversed the plurality of branches through the code file that do not contain a logging statement.
    Type: Grant
    Filed: November 19, 2015
    Date of Patent: August 20, 2019
    Assignee: CA, Inc.
    Inventor: Dayne Howard Medlyn
  • Patent number: 10380689
    Abstract: Various embodiments of exchanges are described. Methods and other embodiments are also described.
    Type: Grant
    Filed: March 6, 2009
    Date of Patent: August 13, 2019
    Assignee: BGC PARTNERS, INC.
    Inventors: Howard W. Lutnick, Bijoy Paul, Michael Sweeting
  • Patent number: 10360004
    Abstract: A system, method and computer program product to refine an original complex CFG into a simpler CFG showing interesting paths and reducing interfering paths with dynamic input for the state of program. The method receives/encodes dynamic user input in the form of annotations which encodes user's special interests or knowledge of the program at run time, e.g., some assumptions of any variables appeared, which can be equations of variable and value or relationships between variables. The method then simplifies all the branching points in a generated AST (Abstract Syntax Tree) whenever possible by querying a SMT (Satisfiability Modulo Theories) solver with branching condition and the user annotations and by evaluating immediate values of expressions or eliminate unreachable parts in the CFG. Finally, the method generates a simplified CFG by simplified AST. This can assist a programmer to understand the code and facilitates correlating different basic blocks under a same scenario.
    Type: Grant
    Filed: February 27, 2017
    Date of Patent: July 23, 2019
    Assignee: International Business Machines Corporation
    Inventors: Si Bin Fan, Bo Li, Nai Jie Li, Jia Sen Wu, Zi Ying Xin, Xiao Zhen Zhu
  • Patent number: 10332308
    Abstract: One or more system, apparatus, method, and computer readable media is described below for automated data type precision control capable of improving rendering quality on a graphics processor. Perceptible rendering quality is dependent at least in part on number format precision (e.g., FP16 or FP32) employed for shader program variables. In accordance with embodiments, shader variables implemented in lower precision data formats are tracked during shader compile to identify those that might trigger a floating point overflow and/or underflow exception. For shaders including one or more such variable, resources are provided to automatically monitor overflow and/or underflow exceptions during shader execution. In further embodiments, shader code is automatically re-generated based, at least in part, upon occurrences of such exceptions, and an increased number format precision specified for one or more of the tracked shader variables.
    Type: Grant
    Filed: December 8, 2014
    Date of Patent: June 25, 2019
    Assignee: Intel Corporation
    Inventors: Feng Chen, Yi Yang, Xiaoming Chen
  • Patent number: 10324825
    Abstract: A source code processing application may process source code and realize the results of the code in a map configuration. In one example, the map may be displayed with a number of stations and pathways between the stations to illustrate associations with classes of the source code. An example method of operation may include one or more of retrieving source code comprising a class from memory, processing the source code to identify an error associated with the class, creating a map with a station linked to the error, and displaying the map on a device.
    Type: Grant
    Filed: August 14, 2018
    Date of Patent: June 18, 2019
    Assignee: International Business Machines Corporation
    Inventors: Kristofer A. Duer, John T. Peyton, Johnathan D. Smith, Stephen D. Teilhet, Jason N. Todd, Lin Tan, Jinqiu Yang
  • Patent number: 10275334
    Abstract: A system for identifying and describing programming errors passes source code through a syntax checker, operates a parser to identify potential problems in the source code, assembles a structured problem list of identified potential problems, operates an interpreter to execute the source code and match execution errors to an identified potential problem in the structured problem list, and generates an error report for novice programmers to understand.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: April 30, 2019
    Assignee: Codepops Inc.
    Inventors: Scott Lininger, Jeffrey Bull
  • Patent number: 10275558
    Abstract: Technologies for providing FPGA infrastructure-as-a-service include a computing device having an FPGA, scheduler logic, and design loader logic. The scheduler logic selects an FPGA application for execution and the design loader logic loads a design image into the FPGA. The scheduler logic receives a ready signal from the FGPA in response to loading the design and sends a start signal to the FPGA application. The FPGA executes the FPGA application in response to sending the start signal. The scheduler logic may time-share the FPGA among multiple FPGA applications. The computing device may include signaling logic to manage signals between a user process and the FPGA application and DMA logic to manage bulk data transfer between the user process and the FPGA application. The computing device may include a user process linked to an FGPA library executed by a processor of the computing device. Other embodiments are described and claimed.
    Type: Grant
    Filed: November 7, 2016
    Date of Patent: April 30, 2019
    Assignee: Intel Corporation
    Inventors: Eliezer Tamir, Ben-Zion Friedman, Alexey Puzhevich, Shai Krigman
  • Patent number: 10257312
    Abstract: Examples disclosed herein involve measuring application performance based on user engagement of the application. In examples herein, an activation of an action item may be detected and a degree of user engagement of the application in response to the activation of the action item may be determined. A threshold time for acceptable performance of the action item is adjusted based on the degree of user engagement.
    Type: Grant
    Filed: October 27, 2016
    Date of Patent: April 9, 2019
    Assignee: ENTIT SOFTWARE LLC
    Inventors: Amichai Nitsan, Haim Shuvali
  • Patent number: 10223528
    Abstract: Technologies for code flow integrity protection include a static analyzer that identifies a potential gadget in an atomic code path of a protected code. A marker instruction is inserted after the potential gadget with a parameter that corresponds to an address of the marker instruction, a hash evaluator instruction is inserted after an exit point of the atomic code path with a parameter that corresponds to the address of the marker instruction, and a compare evaluator instruction and a hash check instruction are inserted after the hash evaluator instruction. A target computing device executes the protected code and updates a path hash as a function of the parameter of the marker instruction, determines an expected hash value as a function of the parameter of the hash evaluator instruction, and generates an exception if the path hash and the expected hash value do not match. Other embodiments are described and claimed.
    Type: Grant
    Filed: September 27, 2016
    Date of Patent: March 5, 2019
    Assignee: Intel Corporation
    Inventors: Michael E. Kounavis, David M. Durham, Ravi L. Sahita, Karanvir S. Grewal
  • Patent number: 10216500
    Abstract: Methods and system for providing synchronization of a multi-threaded application includes analyzing a source file of the application to identify one or more synchronization annotations contained therein, wherein the synchronization annotations are defined using declarative statements. One or more synchronization annotation processors are identified and invoked for processing the one or more synchronization annotations identified in the source file so as to generate code files. The source file is compiled to generate one or more class files by compiling the procedural code within the source file to generate one or more class files, and compiling the code files to generate the one or more class files. The class files associated with the code files are used by the multiple threads during execution of the application to arbitrate access to methods and data manipulated by classes within the class files associated with the procedural code.
    Type: Grant
    Filed: February 10, 2012
    Date of Patent: February 26, 2019
    Assignee: Oracle International Corporation
    Inventors: Yi Huang, David Leibs, Peter Kessler
  • Patent number: 10210077
    Abstract: A static analysis tool is augmented to provide for enhanced security vulnerability determination from generated code traces. According to this disclosure, a multiple sequence alignment is applied to a set of traces generated by static analysis of application source code. The output of this operation is an alignment result that simplifies the traces, e.g., by representing many common nodes as a single node. In particular, the sequence alignment identifies entries in the alignment result that represent at least one code execution path that multiple traces in the set of traces include. A call graph can then be output that includes the at least one code execution path identified, and that call graph can also be simplified by applying a compression portions of the traces that are used to generate it. Using multiple sequence alignment and simplified call graphs enable a user to identify security vulnerabilities more efficiently.
    Type: Grant
    Filed: May 18, 2016
    Date of Patent: February 19, 2019
    Assignee: International Business Machines Corporation
    Inventor: Shu Wang
  • Patent number: 10185772
    Abstract: A system and method for query selection are provided. The method may include acquiring a natural language sentence, pre-processing to obtain a standard node sequence, constructing a node tree based on the relationship between an index node and other nodes, generating a data query command based on the node tree, querying data using the data query command, and filtering the results. The standard node sequence may include at least an index node and a condition node. The node tree may be used to characterize the index-condition combination. The system may include an acquisition unit, a pre-processing unit, a node tree construction unit, a translation unit, and a querying and filtering unit.
    Type: Grant
    Filed: June 24, 2014
    Date of Patent: January 22, 2019
    Assignee: HITHINK ROYALFLUSH INFORMATION NETWORK CO., LTD.
    Inventors: Zheng Yi, Wei Xia, Zhiwei Tao
  • Patent number: 10157049
    Abstract: Statically analyzing a computer software application can include identifying a plurality of objects within the instructions of a computer software application, where the objects in the plurality of objects are of the same object type, and preparing a modified version of the instructions in which any of the objects in the plurality of objects determined to be extraneous is omitted.
    Type: Grant
    Filed: October 26, 2011
    Date of Patent: December 18, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Yinnon A. Haviv, Daniel Kalman, Dmitri Pikus, Omer Tripp, Omri Weisman
  • Patent number: 10152864
    Abstract: A networked system for managing a physical intrusion detection/alarm includes an upper tier of server devices, comprising: processor devices and memory in communication with the processor devices, a middle tier of gateway devices that are in communication with upper tier servers, and a lower level tier of devices that comprise fully functional nodes with at least some of the functional nodes including an application layer that execute routines to provide node functions, and a device to manage the lower tier of devices, the device instantiating a program manager that executes a state machine to control the application layer in each of the at least some of the functional nodes.
    Type: Grant
    Filed: August 20, 2014
    Date of Patent: December 11, 2018
    Assignee: Tyco Fire & Security GmbH
    Inventors: Paul B. Rasband, Craig Trivelpiece, Stewart E. Hall, Robert F. Brewin, Gustavo Leon, Richard Campero
  • Patent number: 10135796
    Abstract: An apparatus with one or more masking rules stored in a memory receives unmasked data associated with a first session identifier via a network and converts the received unmasked data into masked data by applying the one or more masking rules to the unmasked data. The apparatus generates a first mapped identifier associated with the unmasked data and first session identifier. The apparatus also receives, via a network, a second mapped identifier associated with a second session identifier. Upon receiving the second mapped identifier and second session identifier, the apparatus determines whether the second session identifier corresponds to the first session identifier and finds the first mapped identifier corresponding to the received second mapped identifier. The apparatus retrieves and sends the unmasked data associated with the first mapped identifier.
    Type: Grant
    Filed: April 26, 2017
    Date of Patent: November 20, 2018
    Assignee: Bank of America Corporation
    Inventors: Shankar Ramasubramanian Iyer, Maria Auxilia Dominique, Navanith R. Keerthi, Suresh G. Nair
  • Patent number: 10127283
    Abstract: Profiling data characterizing a data streaming application is used to project changes to a relational database resulting from current in-flight streamed data. Preferably, the streaming application produces tuples which are entered into the relational database. Trace data is collected during previous execution of the streaming application to construct operator graph profile data showing likely paths of tuples through multiple processing elements of the streaming application. Responsive to a query, agent(s) residing within the computer system(s) supporting the streaming application query in-flight tuples in one or more buffers of the streaming application. The responses to the agent queries are analyzed using the operator graph profile data to project tuples which will be output to the database. Projected changes to the database may alternatively be used for other purposes, e.g., creating database metadata structures; reorganizing data inserts; regulating query governors; and/or updating database statistics.
    Type: Grant
    Filed: October 31, 2016
    Date of Patent: November 13, 2018
    Assignee: International Business Machines Corporation
    Inventors: Eric L. Barsness, Daniel E. Beuch, Alexander Cook, John M. Santosuosso
  • Patent number: 10123153
    Abstract: Systems, methods, and computer program products for portable storage devices are disclosed. A portable storage device may communicate with other devices utilizing a standardized communication system (“SCS”) to transmit data directly between devices including an SCS. The SCS may discover available devices. The portable storage device may be a wearable device. A user may be able to keep the portable storage device with them and access files on the portable storage device wirelessly using any other device utilizing an SCS.
    Type: Grant
    Filed: June 19, 2015
    Date of Patent: November 6, 2018
    Assignee: Fasetto, Inc.
    Inventors: Coy Christmas, Luke Malpass
  • Patent number: 10089215
    Abstract: A source code processing application may process source code and realize the results of the code in a map configuration. In one example, the map may be displayed with a number of stations and pathways between the stations to illustrate associations with classes of the source code. An example method of operation may include one or more of retrieving source code comprising a class from memory, processing the source code to identify an error associated with the class, creating a map with a station linked to the error, and displaying the map on a device.
    Type: Grant
    Filed: September 23, 2016
    Date of Patent: October 2, 2018
    Assignee: International Business Machines Corporation
    Inventors: Kristofer A. Duer, John T. Peyton, Stephen D. Teilhet, Jason N. Todd, Lin Tan, Jinqui Yang
  • Patent number: 10013245
    Abstract: Techniques provided implement automatic data type annotation in dynamically-typed source code. A codebase, which may comprise a plurality of source code files, is scanned at a global level. The resulting scanned data may describe characteristics of the codebase, including variable and function usage. Based on inferences drawn from the scanning, data types are determined for different variables, expressions, or functions to facilitate conversion from dynamically-typed source code to statically-typed source code. For example, if a function is called once with a parameter value of data type A (e.g., class A), and another time with a parameter value of data type B (e.g., class B), a conversion tool may annotate the parameter variable in the declaration of the function with a data type D (e.g., class d) when data type D is identified as a common ancestor (e.g., superclass) to both data type A and data type B.
    Type: Grant
    Filed: March 28, 2016
    Date of Patent: July 3, 2018
    Assignee: Facebook, Inc.
    Inventor: Julien Marcel Verlaguet
  • Patent number: 10001949
    Abstract: Techniques for improved transactional memory management are described. In one embodiment, for example, an apparatus may comprise a processor element, an execution component for execution by the processor element to concurrently execute a software transaction and a hardware transaction according to a transactional memory process, a tracking component for execution by the processor element to activate a global lock to indicate that the software transaction is undergoing execution, and a finalization component for execution by the processor element to commit the software transaction and deactivate the global lock when execution of the software transaction completes, the finalization component to abort the hardware transaction when the global lock is active when execution of the hardware transaction completes. Other embodiments are described and claimed.
    Type: Grant
    Filed: May 20, 2016
    Date of Patent: June 19, 2018
    Assignee: INTEL CORPORATION
    Inventors: Irina Calciu, Justin E. Gottschlich, Tatiana Shpeisman
  • Patent number: 9996693
    Abstract: Automated malware signature generation is disclosed. Automated malware signature generation includes monitoring incoming unknown files for the presence of malware and analyzing the incoming unknown files based on both a plurality of classifiers of file behavior and a plurality of classifiers of file content. An incoming file is classified as having a particular malware classification based on the analyzing of incoming unknown files and a malware signature is generated for the incoming unknown file based on the particular malware classification. Access is provided to the malware signature.
    Type: Grant
    Filed: June 1, 2012
    Date of Patent: June 12, 2018
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Ning Sun, Patrick Winkler, Chengyun Chu, Hong Jia, Jason Geffner, Tony Lee, Jigar Mody, Frank Swiderski
  • Patent number: 9965619
    Abstract: Embodiments of an invention for a return address overflow buffer are disclosed. In one embodiment, a processor includes a stack pointer to store a reference to a first return address stored on a stack, an obscured address stack pointer to store a reference to an encrypted second return address stored in a memory, hardware to decrypt the encrypted second return address to generate a decrypted second return address, and a return address verification logic, responsive to receiving a return instruction, to compare the first return address to the decrypted second return address.
    Type: Grant
    Filed: July 13, 2015
    Date of Patent: May 8, 2018
    Assignee: Intel Corporation
    Inventors: Jason W. Brandt, Vedvyas Shanbhogue, Baiju V. Patel
  • Patent number: 9953158
    Abstract: The disclosed computer-implemented method for enforcing secure software execution may include (1) providing at least one known benign input to an executable file that is susceptible to abnormal code execution, (2) observing a series of function calls made by the executable file as the executable file processes the known benign input, (3) storing the series of function calls as a control flow graph that represents known safe function call pathways for the executable file, and (4) forcing a subsequent execution of the executable file to follow the series of function calls stored in the control flow graph to protect the executable file against abnormal code execution. Various other methods, systems, and computer-readable media are also disclosed.
    Type: Grant
    Filed: April 21, 2015
    Date of Patent: April 24, 2018
    Assignee: Symantec Corporation
    Inventors: Azzedine Benameur, Nathan Evans
  • Patent number: 9934131
    Abstract: An artificial intelligence based method for improving a software testing process, according to which upon finding a bug, a set of candidate diagnoses is proposed to the tester, based on a Model-Based Diagnosis (MBD) process. A planning process is used for automatically suggesting further test steps to be performed by the tester, to identify the correct diagnosis for the developer in the form of faulty software component that caused the bug, while minimizing the tests steps performed by the tester. Additional information is provided to the MBD process, based on the outputs of the further test steps, thereby pruning incorrect candidate diagnoses. These steps are iteratively repeated while in each time, minimizing the set of candidate diagnoses, until a single diagnosis remains in the set.
    Type: Grant
    Filed: February 5, 2015
    Date of Patent: April 3, 2018
    Assignee: B. G. NEGEV TECHNOLOGIES AND APPLICATIONS LTD., AT BEN-GURION UNIVERSITY
    Inventors: Meir Kalech, Ron Stern
  • Patent number: 9900340
    Abstract: A method includes instantiating, in response to a request by an executing application, an input data object with one or more uninitialized fields and traversing a path toward a sink in the executing application to a branching point of the executing application. In response to reaching the branching point, one or more parameters are provided for some or all of the one or more uninitialized fields of the input data object, wherein the one or more parameters were determined prior to beginning of execution of the executing application to cause a branch to be taken by the executing application toward the sink. The path is traversed toward the sink at least by following the branch in the executing application. Apparatus and computer program products are also disclosed.
    Type: Grant
    Filed: April 3, 2017
    Date of Patent: February 20, 2018
    Assignee: International Business Machines Corporation
    Inventors: Marco Pistoia, Omer Tripp
  • Patent number: 9838287
    Abstract: Embodiments provide interactive prediction of network data consumption. Current data usage statistics are compared with a data usage plan. The current data usage statistics represent network data consumed by at least one computing device of the user. The network data is consumed during at least a portion of a pre-defined time interval of a data usage plan. For the given time interval, one of a plurality of pre-defined data usage states is assigned to the user, such as On Track, Off Track, Over Limit, and Under Track. In some embodiments, the user interacts with the data usage pattern to dynamically adjust for expected future use, which may change the currently assigned data usage state.
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: December 5, 2017
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Gil Zalmanovitch, Gregory James Scott, Shai Guday, Alec Garvin Kwok, Yue Jiang, Kenneth Vincent Ma
  • Patent number: 9779011
    Abstract: The present invention relates to a testing system, including a testing host and a relay host, where the testing host may test a tested target, and a testing program is installed in the testing host. In a process of testing the tested target, the testing program may generate testing history information of the tested target, and the testing host changes a file name of the testing history information according to a renaming rule. The relay host includes a default function and a transferring and processing program, where the transferring and processing program may capture testing content information applicable to the default function from the file name of the testing history information, and apply the testing content information to the default function to generate function data. Therefore, an operation of generating the function data may be simplified.
    Type: Grant
    Filed: January 11, 2016
    Date of Patent: October 3, 2017
    Assignee: PRIMAX ELECTRONICS LTD.
    Inventor: Pei-Ming Chang