Protection Of Hardware Patents (Class 726/34)
  • Patent number: 8453251
    Abstract: A system and method is set forth for communicating between a user network device, a partner service provider, a primary service provider and a user network device. The user network device initiates an account set-up page from the partner service provider, provides primary service account data in response to the account setup page and communicates the primary service account data to the primary service provider setup web service. The primary service provider validates the primary service account data and generates an encrypted token in response to validating the primary service account data. The user network device generates a request for data through a partner service provider. The partner service provider communicates the request for data with the encrypted token to the primary service provider. The primary service provider validates the request for data at the authentication web service and communicates data to the client device from a data web service through the partner service provider after validating.
    Type: Grant
    Filed: December 19, 2007
    Date of Patent: May 28, 2013
    Assignee: The DIRECTV Group, Inc.
    Inventor: Kapil Chaudhry
  • Patent number: 8453261
    Abstract: This microcircuit card includes means for detecting an attack on the card, command means (130) capable of charging a charge pump (120) capable of applying a programming voltage (UP) to command a write operation into a cell (110) of a nonvolatile memory when an attack is detected, and a capacitor (140) arranged so as to be supplied with power during normal operation and to supply said charge pump (120) with power only when an attack is detected. The card (100) being characterized in that said capacitor (140) also supplies power to the command means (130) when an attack is detected.
    Type: Grant
    Filed: December 13, 2011
    Date of Patent: May 28, 2013
    Assignee: Oberthur Technologies
    Inventors: Nicolas Morin, Christophe Giraud
  • Publication number: 20130133088
    Abstract: A method and apparatus are provided for a secure interconnect between data modules, including a security apparatus within a secured data interconnect apparatus installed with a security chip. The interconnect apparatus may be authenticated prior to enabling a stacking feature. Authentication of a interconnect apparatus may be used to ensure the quality and performance of the interconnect apparatus and the data modules.
    Type: Application
    Filed: January 17, 2013
    Publication date: May 23, 2013
    Applicant: Cisco Technology, Inc.
    Inventors: Peter Gunadisastra, Bradley David Erickson, Rick Kazuo Yoshida
  • Patent number: 8448256
    Abstract: According to an embodiment, a programmable logic device includes a plurality of logic blocks, memory and a logic unit. The logic blocks are grouped into one or more partitions. The memory stores authentication and partition information uploaded to the programmable logic device prior to partition programming. The logic unit authenticates programming access to the one or more partitions based on the authentication information and controls programming of the one or more partitions based on the partition information.
    Type: Grant
    Filed: February 2, 2009
    Date of Patent: May 21, 2013
    Assignee: Infineon Technologies AG
    Inventors: Joerg Borchert, Jurijus Cizas, Shrinath Eswarahally, Mark Stafford, Rajagopalan Krishnamurthy
  • Publication number: 20130125250
    Abstract: An anti-tamper device (10) for one or more integrated circuits (12) includes a firing assembly (14) and a breach assembly (16). The firing assembly (14) includes a contained energy source (24), an impact element (26) and a breach assembly (16). The breach assembly (16) is configured to house one or more integrated circuits (12) and a propellant charge (30). Upon an attempt to improperly remove or dislodge an integrated circuit (12) from the anti-tamper device (10), the contained energy source (24) is actuated. The energy source (24) propels the impact element (26) against the propellant charge (30), causing the charge to ignite. The resultant forces from the impact element (26) and ignition of the charge imparts a shock wave through the anti-tamper device (10). This shock wave induces spalling of the integrated circuit (12) such that the circuit is physically altered and rendered unreadable.
    Type: Application
    Filed: July 15, 2011
    Publication date: May 16, 2013
    Inventor: Graeme J. Freedman
  • Publication number: 20130125251
    Abstract: A device and system for management of and access to externally connected peripheral devices by mobile devices. User and/or application data on a mobile device is sent to externally connected peripheral devices. External peripheral devices includes, but are not limited to, printers, scanners, displays, audio interfaces, speakers, network adapters, storage drives, hard drives, and the like. An end user mobile device application interface is installed as an application on a mobile device. Data may be sent directly to a peripheral device, or to a peripherals aggregation device, which may be active or passive.
    Type: Application
    Filed: November 11, 2012
    Publication date: May 16, 2013
    Inventor: Christopher Bernard Johnson
  • Patent number: 8443458
    Abstract: An object of the present invention is to provide a mechanism for tamper detection of electronic devices (110) in closed units which is robust and low cost. The object is achieved by a method in an electronic device (110) for detecting if a cover (100) enclosing the electronic device (110) has been opened. The cover (100) comprises an enclosing assembly (250) which is adapted to fasten the cover (100) into a closed position. The electronic (device 110) comprises a non volatile memory (120). The non volatile memory (120) comprises a stored reference signature associated to the enclosing assembly (250) when the cover (100) was fastened into a closed position. The method comprises the following steps: (Creating 1003) a signature associated to the enclosing assembly (250). Comparing (1004) the created signature with the reference signature. Detecting (1007) that the cover 100 has been opened when the comparing (1004) results in a difference.
    Type: Grant
    Filed: January 16, 2008
    Date of Patent: May 14, 2013
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventor: Dan Anders Lindqvist
  • Patent number: 8443432
    Abstract: A method for calibrating a temperature float of a one time password token and a device thereof are provided in the invention relating to the information security field. The method includes steps: the one time password token measures a current ambient temperature at intervals of a first predetermined time, retrieves a data table for a characteristic value relating to the measured temperature, and calibrates a current time value inside the token according to the characteristic value at intervals of a second predetermined time. The one time password token includes a timer module, a measuring module, a retrieving module, a table storing module, a calibrating module, a triggering module, a generating module and a displaying module. The invention calibrates time differentiation of the one time password token caused by the temperature float.
    Type: Grant
    Filed: March 28, 2011
    Date of Patent: May 14, 2013
    Assignee: Feitian Technologies Co., Ltd.
    Inventors: Zhou Lu, Huazhang Yu
  • Publication number: 20130117838
    Abstract: Specialized hardware functions for high assurance processing are seldom integrated into commodity processors. Furthermore, as chips increase in complexity, trustworthy processing of sensitive information can become increasingly difficult to achieve due to extensive on-chip resource sharing and the lack of corresponding protection mechanisms. Embodiments in accordance with the invention allow for enhanced security of commodity integrated circuits, using minor modifications, in conjunction with a separate integrated circuit that can provide monitoring, access control, and other useful security functions. In one embodiment, a separate control plane, stacked using 3-D integration technology, allows for the function and economics of specialized security mechanisms, not available from a coprocessor alone, to be integrated with the underlying commodity computing hardware.
    Type: Application
    Filed: February 11, 2011
    Publication date: May 9, 2013
    Inventors: Timothy Evert LEVIN, Timothy Peter Sherwood, Theodore Douglas Huffmire, Cynthia Emberson Irvine, Ryan Charles Kastner, Thuy Diep Nguyen, Jonathan Kaveh Valamehr
  • Patent number: 8438659
    Abstract: A method of authenticating the interoperability of a headset and a device, as well as a headset and a device, is provided. The method includes, in a headset, monitoring at least one input for a verification signal, and, in response to failing to detect the verification signal within a predetermined period of time, selectively disabling a speaker and/or microphone of the headset. An alternative method includes, in a device, detecting a coupling of a headset to the device, transmitting a verification signal to the headset, and receiving, from the headset, at least one of a serial number associated with the headset, an identification of a user of the headset, a security certificate, or a voice translation template associated with the user.
    Type: Grant
    Filed: November 5, 2009
    Date of Patent: May 7, 2013
    Assignee: Vocollect, Inc.
    Inventor: Yangmin Shen
  • Patent number: 8438655
    Abstract: A substrate processing system capable of making it easy to set an operation authority in a plurality of substrate processing apparatuses and a management device is provided. In a substrate processing system including a plurality of substrate processing apparatuses for executing a process on a wafer, a management device connected to the plurality of substrate processing apparatuses via a communication line, the management device has a display screen for setting an operation authority to each of the management device and the plurality of substrate processing apparatuses capable of communicating with the management device for each user.
    Type: Grant
    Filed: March 8, 2007
    Date of Patent: May 7, 2013
    Assignee: Hitachi Kokusai Electric Inc.
    Inventor: Hiroyuki Iwakura
  • Patent number: 8434138
    Abstract: A token calculates a one time password by generating a HMAC-SHA-1 value based upon a key K and a counter value C, truncating the generated HMAC-SHA-1 value modulo 10^Digit, where Digit is the number of digits in the one time password. The one time password can be validated by a validation server that calculates its own version of the password using K and its own counter value C?. If there is an initial mismatch, the validation server compensate for a lack of synchronization between counters C and C? within a look-ahead window, whose size can be set by a parameter s.
    Type: Grant
    Filed: December 6, 2011
    Date of Patent: April 30, 2013
    Assignee: Symantec Corporation
    Inventors: Nicolas Popp, David M'Raihi, Loren Hart
  • Patent number: 8434158
    Abstract: Various embodiments of the present invention relates to systems, devices and methods of detecting tampering and preventing unauthorized access by incorporating programmability and randomness into a process of coupling, driving and sensing conductive wires that are arranged above sensitive areas in a secured system. Such a tampering detection system comprises a security mesh network, a random number generator, a security controller and a security monitor. The security mesh network includes a plurality of security elements made from the conductive wires. The security controller selects a subset of security elements, forms a security array, and generates a driving stimulus. The security monitor selects a SENSE node, monitors an output at the SENSE node, and generates a flag signal indicating the presence of a tampering attempt. Programmability and randomness are introduced to at least one of the system parameters including array configuration, driving stimulus, SENSE node, and detection mode via random numbers.
    Type: Grant
    Filed: August 29, 2011
    Date of Patent: April 30, 2013
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Jianxin Ma, Sung Ung Kwak, Irfan Azam Chaudhry
  • Patent number: 8433927
    Abstract: A method, computer program product, and data processing system are disclosed for protecting sensitive program code (and also data) from unauthorized access in a memory space not subject to protection fault detection. In a preferred embodiment, secure initialization hardware loads the sensitive code from a storage location accessible only to the secure initialization hardware itself and decrypts the sensitive code into a portion of the processor-accessible memory space, from which the code is executed. Once execution of the sensitive code has completed, all or at least a portion of the code is deleted before passing control to application software. If the application software needs to cause the sensitive code to be executed, the secure initialization hardware is activated to reload/decrypt a fresh copy of the sensitive code into the memory space and cause the code to be executed. Before control is returned to the application software, the sensitive code is again deleted to prevent unauthorized access.
    Type: Grant
    Filed: May 29, 2007
    Date of Patent: April 30, 2013
    Assignee: International Business Machines Corporation
    Inventors: Wilfred E. Plouffe, Jr., Kanna Shimizu
  • Patent number: 8434144
    Abstract: A system for selectively enabling a microprocessor-based system is disclosed. State information that describes the operating conditions or circumstances under which a user intends to operate the system is obtained. In the preferred embodiment of the invention, a valid hash value is determined, preferably based on the state information and preferably by locating the valid hash value within a table of valid hash values indexed by the state information. Candidate authorization information is obtained from the user, and a candidate hash value is generated by applying a hashing algorithm to the candidate authorization information, the state information, or a combination of the candidate authorization information and state information. The candidate hash value and the valid hash value are then compared, and the microprocessor-based system is enabled if the candidate hash value matches the valid hash value.
    Type: Grant
    Filed: June 24, 2011
    Date of Patent: April 30, 2013
    Assignee: The Invention Science Fund I, LLC
    Inventors: W. Daniel Hillis, Bran Ferren
  • Publication number: 20130104252
    Abstract: Various embodiments of the present invention relates generally to an integrated circuit, and more particularly, to systems, devices and methods of incorporating a tamper detection countermeasure into a security ASIC to deter physical attacks. The tamper detection countermeasure architects an active mesh to cover a sensitive area in the security ASIC. A plurality of time-varying random numbers is generated by a random number generator (RNG), and the active mesh is driven and configured according to these random numbers. During tamper detection cycles, the active mesh is monitored with respect to the plurality of random numbers that is directly provided by the RNG. Upon a tampering attempt, a flag signal is generated and used to initialize subsequent anti-tampering actions. The active mesh may be controlled and monitored based on time-varying codes, and therefore, an adversary may not easily bypass the active mesh and attack the sensitive area.
    Type: Application
    Filed: October 24, 2011
    Publication date: April 25, 2013
    Inventors: Subbayya Chowdary Yanamadala, Anish Dhanekula
  • Patent number: 8429402
    Abstract: In a method and arrangement for authenticating a data processing system, first information is generated by a first data processing system and delivered to a second data processing system for a control unit. First data are transmitted from the second data processing system to the first data processing system over a data line, the first data being generated by the second data processing system with aid of the first information and additional information contained in the second data processing system. Second data are generated by the first data processing system depending on the first data and transmitted from the first data processing system to the second data processing system. Authentication information for authenticating the second data processing system is generated by the second data processing system with aid of the second data.
    Type: Grant
    Filed: October 27, 2003
    Date of Patent: April 23, 2013
    Assignee: Océ Printing Systems GmbH
    Inventor: Berthold Kathan
  • Patent number: 8429759
    Abstract: Methods and apparatus for theft management are described. In an embodiment an out-of-band notification is received, indicative of theft of a computing device. In response, a theft message is delivered to the computing device using a wireless wide area network. Other embodiments are also disclosed and claimed.
    Type: Grant
    Filed: March 31, 2009
    Date of Patent: April 23, 2013
    Assignee: Intel Corporation
    Inventor: Farid Adrangi
  • Patent number: 8423801
    Abstract: An electronic device including an external-memory-medium installing portion in which an external memory medium storing contents data, a display portion for displaying the contents data, a sound generating portion for generating a sound, a power-shut-down-requirement receiving portion for receiving a requirement for shutting-down a power supply to the electronic device, a monitoring portion for determining whether the external memory medium is installed in the external-memory-medium installing portion, a sound-generation commanding portion for commanding command the sound generating portion to generate an alarming sound when the monitoring portion has determined that the external memory medium is not installed in the external-memory-medium installing portion while the contents data are displayed, and a power supply control portion for inhibiting an operation to shut down the power supply to the electronic device when the power-shut-down-requirement receiving portion has received the requirement for shutting do
    Type: Grant
    Filed: January 19, 2010
    Date of Patent: April 16, 2013
    Assignee: Brother Kogyo Kabushiki Kaisha
    Inventor: Hideto Matsumoto
  • Patent number: 8422674
    Abstract: A method, computer program product, and data processing system for protecting sensitive program code and data (including persistently stored data) from unauthorized access. Dedicated hardware decrypts an encrypted kernel into memory for execution. When an application is to be executed, the kernel computes one or more secrets by cryptographically combining information contained in the application with secret information contained in the kernel itself. The kernel then deletes its secret information and passes the computed secrets to the application. To store data persistently in memory, the application uses one of the computed secrets to encrypt the data prior to storage. If the kernel starts another instance of the same application, the kernel (which will have been re-decrypted to restore the kernel's secrets) will compute the same one or more secrets, thus allowing the second application instance to access the data encrypted by the first application instance.
    Type: Grant
    Filed: May 29, 2007
    Date of Patent: April 16, 2013
    Assignee: International Business Machines Corporation
    Inventors: Masana Murase, Wilfred E. Plouffe, Jr., Kanna Shimizu, Vladimir Zbarsky
  • Publication number: 20130091589
    Abstract: Disclosed is a hardware based secure multi-level security computing system system. The system comprises a chassis enclosing multiple separate, secure computer devices or domains, each within an electromagnetic shielding Faraday cage. The chassis structure includes internal electromagnetic shields and other features to prevent cross domain electromagnetic interference or compromising emanations. The chassis may be the size of a standard computer tower. The computer devices or domains may be configured for handling information of different classification levels. Optionally, each of the computer devices may operate on significantly less power than a standard computer. Preferably, each computer operates on no more than 50 Watts of power, more preferably on less than 35 Watts of power.
    Type: Application
    Filed: August 3, 2012
    Publication date: April 11, 2013
    Applicant: Secutor Systems, LLC
    Inventors: Ed Harvey, John McGinn, JR., Guy Purser
  • Publication number: 20130086700
    Abstract: A method and apparatus for configuring electronic devices is provided. The method includes collecting, at a device management apparatus, user information regarding a user within a predetermined area; and controlling access to an electronic device based on the user information.
    Type: Application
    Filed: September 27, 2012
    Publication date: April 4, 2013
    Applicant: Samsung Electronics Co., Ltd.
    Inventor: Samsung Electronics Co., Ltd.
  • Patent number: 8412958
    Abstract: A device management system is configured with a target device including at least one unit that includes a tamper-resistant chip, a management apparatus that manages or uses the target device, and an authentication apparatus including a database for authentication, connected via a network in a communicable manner. In the target device, each unit is equipped with the tamper-resistant chip that collects device information specific to a unit, stores collected device information, and stores a confidential-key.
    Type: Grant
    Filed: January 17, 2007
    Date of Patent: April 2, 2013
    Assignees: PFU Limited, Fijitsu Limited
    Inventors: Kouichi Minami, Seigo Kotani
  • Publication number: 20130081147
    Abstract: Various embodiments for protecting keyboard data inputted by a user in a computer having a keyboard hardware are disclosed. According to one exemplary embodiment, a method for protecting keyboard data, where the keyboard hardware comprises an I/O port having an input buffer and an output buffer, includes: receiving scan code data based on keyboard data inputted by the user, wherein the scan code data are latched in the output buffer of the I/O port; executing an interrupt routine to fetch the scan code data from the output buffer to a CPU of the computer, wherein the latched scan code data remains in the output buffer after the latched scan code data are read from the output buffer; transmitting a control command to the keyboard hardware through the input buffer of the I/O port; and receiving from the keyboard hardware a response signal generated in response to the control command, wherein the keyboard hardware is configured to transmit the response signal to the output buffer of the I/O port.
    Type: Application
    Filed: November 25, 2012
    Publication date: March 28, 2013
    Applicants: P&IB CO., LTD., TECHOUS CO., LTD.
    Inventors: TECHOUS CO., LTD., P&IB CO., LTD.
  • Patent number: 8407810
    Abstract: A KVM switch is connectable to a plurality of information processing apparatus and a plurality of consoles used for operating the plurality of information processing apparatus. A storing portion stores first user-limiting information which defines access permission or access no-permission to each information processing apparatus for each user. An acquiring portion acquires second user-limiting information which defines access permission or access no-permission to each information processing apparatus for each user, from each information processing apparatus. A controlling portion controls access to each information processing apparatus for each user based on the first user-limiting information and the second user-limiting information.
    Type: Grant
    Filed: July 24, 2008
    Date of Patent: March 26, 2013
    Assignee: Fujitsu Component Limited
    Inventor: Masaki Horikawa
  • Patent number: 8407487
    Abstract: A method for security monitoring of an electronic device includes determining whether a storage system of the electronic device is a secured storage system according to a signal of a first switch of the electronic device, determining whether an encryption key of the secured storage system is modifiable according to a detected signal of a second switch of the electronic device. Decrypting the secured storage system using a decryption key if the decryption key is the same as a preset decryption key in the secured storage system.
    Type: Grant
    Filed: August 19, 2010
    Date of Patent: March 26, 2013
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Yang-Yuan Chen, Ming-Chih Hsieh
  • Patent number: 8402559
    Abstract: Methods and apparatus for determining, in a reliable manner, a port, physical location and/or device identifier, such as a MAC address, associated with a device using an IP address and for using such information, e.g., to support one or more security applications is described. Supported security applications include restricting access to services based on the location of a device seeking access to a service, determining the location of stolen devices, and verifying the location of the source of a message or other IP signal, e.g., to determine if a prisoner is contacting a monitoring service from a predetermined location.
    Type: Grant
    Filed: November 18, 2010
    Date of Patent: March 19, 2013
    Assignee: Verizon Services Corp.
    Inventor: Robert T Baum
  • Publication number: 20130067534
    Abstract: A secure motherboard for a computer, wherein each user accessible peripheral port is protected by hardware based peripheral protection circuitry soldered to the motherboard. The protection circuitry provides security functions decreasing the vulnerability of the computer to data theft. User input ports such as keyboard and mouse peripheral ports are coupled to the computer through a security function that enforce unidirectional data flow only from the user input devices to the computer. Display port uses a security function which isolates the EDID in the display from the computer. Authentication device such as smart card reader is coupled to the computer via a port having a security function which enumerates the authentication device before coupling it to the computer.
    Type: Application
    Filed: May 18, 2011
    Publication date: March 14, 2013
    Applicant: HIGH SEC LABS LTD.
    Inventor: Aviv Soffer
  • Patent number: 8397310
    Abstract: The present invention is an apparatus and method for associating electronic devices to portable containers. A smart container is a container used for transporting items while traveling and comprising electronic devices. The smart container may comprise at least one module bay configured for receiving a module and a controller comprising a processing device associated with a memory. The controller is electrically associated with the module bay and configured for sending and/or receiving data to/from an electronic device associated with the module bay. The controller may be either an integral component of the smart container or a controller module removably received by the smart container. The smart container further comprises a power source associated with a power bus. The power bus is electrically associated with at least one of (a) a module bay, and (b) the controller.
    Type: Grant
    Filed: October 11, 2005
    Date of Patent: March 12, 2013
    Inventors: Earl H. Parris, John Michael Kay
  • Patent number: 8392566
    Abstract: A method comprises determining available hardware, determining computer executable services based in part on the available hardware, displaying a catalog of the computer executable services, receiving a selection of at least one service of the computer executable services, and instantiating the at least one service on the at least one server. The available hardware comprises at least one server.
    Type: Grant
    Filed: October 30, 2008
    Date of Patent: March 5, 2013
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Mathias Salle, Erik L. Eidt
  • Patent number: 8392725
    Abstract: A processor, circuit and method provide for fast decryption of encrypted program instructions for execution by the processor. A programmable look-up coding is used to decode a field within the instructions. The decoded field for the instructions are recombined with the remaining portion of the same instructions to yield the decoded instructions. The programmable look-up coding can be programmed and controlled by a process executing at a higher privilege level than the program represented by the instructions, so that security against code-modifying attacks is enhanced.
    Type: Grant
    Filed: November 21, 2011
    Date of Patent: March 5, 2013
    Assignee: International Business Machines Corporation
    Inventors: Gordon D. McIntosh, Edward John Silha
  • Publication number: 20130055416
    Abstract: Various embodiments of the present invention relates to systems, devices and methods of detecting tampering and preventing unauthorized access by incorporating programmability and randomness into a process of coupling, driving and sensing conductive wires that are arranged above sensitive areas in a secured system. Such a tampering detection system comprises a security mesh network, a random number generator, a security controller and a security monitor. The security mesh network includes a plurality of security elements made from the conductive wires. The security controller selects a subset of security elements, forms a security array, and generates a driving stimulus. The security monitor selects a SENSE node, monitors an output at the SENSE node, and generates a flag signal indicating the presence of a tampering attempt. Programmability and randomness are introduced to at least one of the system parameters including array configuration, driving stimulus, SENSE node, and detection mode via random numbers.
    Type: Application
    Filed: August 29, 2011
    Publication date: February 28, 2013
    Inventors: Jianxin Ma, Sung Ung Kwak, Irfan Azam Chaudhry
  • Patent number: 8385551
    Abstract: A system and method for managing trusted platform module (TPM) keys utilized in a cluster of computing nodes. A cluster-level management unit communicates with a local TPM agent in each node in the cluster. The cluster-level management unit has access to a database of protection groups, wherein each protection group comprises one active node which creates a TPM key and at least one standby node which stores a backup copy of the TPM key for the active node. The local TPM agent in the active node automatically initiates a migration process for automatically migrating the backup copy of the TPM key to the at least one standby node. The system maintains coherency of the TPM keys by also deleting the backup copy of the TPM key in the standby node when the key is deleted by the active node.
    Type: Grant
    Filed: December 22, 2006
    Date of Patent: February 26, 2013
    Assignee: Telefonaktiebolaget L M Ericsson (Publ)
    Inventors: Makan Pourzandi, András Méhes
  • Patent number: 8384414
    Abstract: A method and circuits for implementing a hacking detection and block function at indeterminate times, and a design structure on which the subject circuit resides are provided. A circuit includes an antenna wrapped around a dynamic bus inside circuitry to be protected. The antenna together with the dynamic bus node is designed so an average bus access activates a field effect transistor (FET) that is connected to a capacitor. The FET drains the capacitor in a specified number of activations by the antenna. The capacitor has a leakage path to a voltage supply rail VDD that charges the capacitor back high after a time, such as ten to one hundred cycles, of the dynamic bus being quiet. The capacitor provides a hacking detect signal for temporarily blocking operation of the circuitry to be protected responsive to determining that the dynamic bus is more active than functionally expected.
    Type: Grant
    Filed: February 22, 2011
    Date of Patent: February 26, 2013
    Assignee: International Business Machines Corporation
    Inventors: Karl R. Erickson, Phil C. Paone, David P. Paulsen, John E. Sheets, II, Gregory J. Uhlmann, Kelly L. Williams
  • Patent number: 8384412
    Abstract: A method distributes personalized circuits to one or more parties. The method distributes a generic circuit to each party, encrypts a unique personalization value using a secret encryption key, and transmits each encrypted personalization value to the corresponding party. Each party then stores the encrypted personalization value in their circuit. The stored encrypted personalization value allows a piece of software to be properly executed by the circuit. A semiconductor integrated circuit is arranged to execute a piece of software that inputs a personalization value as an input parameter. The circuit comprises a personalization memory arranged to store an encrypted personalization value; a key memory for storing a decryption key; a control unit comprising a cryptographic circuit arranged to decrypt the encrypted personalization value using the decryption key; and a processor arranged to receive the decrypted personalization value and execute the software using the decrypted personalization value.
    Type: Grant
    Filed: July 31, 2006
    Date of Patent: February 26, 2013
    Assignee: STMicroelectronics R&D Limited
    Inventor: Andrew Dellow
  • Patent number: 8386801
    Abstract: A group of devices are fabricated based on a common design, each device having a corresponding plurality of measurable characteristics that is unique in the group to that device, each device having a measurement module for measuring the measurable characteristics. Authentication of one of the group of devices is enabled by selective measurement of one or more of the plurality of measurable characteristics of the device.
    Type: Grant
    Filed: March 3, 2011
    Date of Patent: February 26, 2013
    Assignee: Massachusetts Institute of Technology
    Inventors: Srinivas Devadas, Blaise Gassend
  • Publication number: 20130047272
    Abstract: An integrated circuit is disclosed that can be included in a host electronic device that can be commonly manufactured, where the integrated circuit can be designated (“locked”) for a specific manufacturer, thereby substantially reducing the likelihood that a third party will be able to successfully clone a host electronic device manufactured by the specific manufacturer and/or swap the chip containing the integrated circuit for one having more enabled features. The integrated circuit includes an ID module that can be programmed after fabrication. Components within the integrated circuit designate manufacturer-specific configurations (e.g., address mapping, pin routing and/or vital function releasing) based on the programmed manufacturer ID. As a result, once the integrated circuit has been programmed with the manufacturer ID, the integrated circuit will function correctly only within a host device manufactured by the manufacturer associated with the programmed manufacturer ID.
    Type: Application
    Filed: September 30, 2011
    Publication date: February 21, 2013
    Applicant: Broadcom Corporation
    Inventors: Love Kothari, Paul Chou
  • Patent number: 8375226
    Abstract: A system and method for providing a firewall system that prevents a computer from being accessed by an unauthorized user via a computer network. The system includes a switch assembly that connects and disconnects the computer from a computer network. The switch assembly is controlled by the types of data transmissions generated by the computer. If the computer generates a data transmission addressed to the computer network, the switch assembly automatically interconnects the computer to the computer network. If the data transmission generated by the computer includes a data request from some point on the computer network, the interconnection with the computer network is held open until the requested data is received. Once the requested data is received, the switch assembly disconnects the computer from the computer network.
    Type: Grant
    Filed: September 18, 2007
    Date of Patent: February 12, 2013
    Inventor: Raymond Brandl
  • Patent number: 8370959
    Abstract: A method and apparatus are provided for a secure interconnect between data modules, including a security apparatus within a secured data connection device installed with a security chip. The connection device may be authenticated prior to enabling a stacking feature. Authentication of a connection device may be used to ensure the quality and performance of the connection device and the data modules.
    Type: Grant
    Filed: July 23, 2009
    Date of Patent: February 5, 2013
    Assignee: Cisco Technology, Inc.
    Inventors: Peter Gunadisastra, Bradley D. Erickson, Rick K. Yoshida
  • Patent number: 8361166
    Abstract: A system and method for presenting electronic device security and tracking information. A method includes but is not limited to making accessible at least one first webpage capable of presenting a category for an electronic device registered with an electronic device security and tracking system and method (ESTSM) service; making accessible at least one second webpage capable of accepting a report that the electronic device has been stolen; and making accessible at least one third webpage capable of accepting at least one item of information pertaining to enablement of the electronic device.
    Type: Grant
    Filed: October 30, 2007
    Date of Patent: January 29, 2013
    Assignee: Softex Incorporated
    Inventors: Apurva Mahendrakumar Bhansali, Manoj Kumar Jain, Shradha Dube, Gayathri Rangarajan, Mehul Ramjibhai Patel, Rayesh Kashinath Raikar, Kamal Mansukhlal Dhanani, Ranjit Kapila, Elza Abraham Varghese, Thomas David Tucker
  • Patent number: 8365308
    Abstract: A security processor integrated within a system may be securely shut down. The security processor may receive shut down requests, and may determine components and/or subsystems that need be shut down during shut down periods. The security processor may determine when each of the relevant components is ready for shut down. Once the relevant components are shut down, the security processor may itself be shut down, wherein the shut down of the security processor may be performed by stopping the clocking of the security processor. A security error monitor may monitor the system during shut down periods, and the security processor may be powered back on when security breaches and/or threats may be detected via the security error monitor. The security error monitor may be enabled to power on the security processor by reactivating the security processor clock, and the security processor may then power on the system.
    Type: Grant
    Filed: October 9, 2008
    Date of Patent: January 29, 2013
    Assignee: Broadcom Corporation
    Inventors: Stephane Rodgers, Iue-Shuenn Chen
  • Publication number: 20130024952
    Abstract: A system and method for detecting a security breach of an electronic device are provided. The system includes a sensor assembly having at least one IR LED which outputs IR light, and an IR sensor which detects the IR light output by the IR LED and outputs corresponding IR detection signals. The system further includes a processor which generates an IR profile of an interior of the enclosure with reference to the IR detection signals output by the IR sensor. The processor determines that there has been a security breach of the enclosure at least in response to detecting IR activity in the enclosure from the IR detection signals that does not correspond to the IR profile. Output signals from a various other sensors may be used to confirm whether the security breach has occurred.
    Type: Application
    Filed: July 19, 2011
    Publication date: January 24, 2013
    Inventor: Clas Sivertsen
  • Patent number: 8359481
    Abstract: A coprocessor includes a calculation unit for executing at least one command, and a securization device. The securization device includes an error detection circuit for monitoring the execution of the command so as to detect any execution error, putting the coprocessor into an error mode by default as soon as the execution of the command begins, and lifting the error mode at the end of the execution of the command if no error has been detected, an event detection circuit for monitoring the appearance of at least one event to be detected, and a masking circuit for masking the error mode while the event to be detected does not happen, and declaring the error mode to the outside of the coprocessor if the event to be detected happens while the coprocessor is in the error mode. Application in particular but not exclusively to coprocessors embedded in integrated circuits for smart cards.
    Type: Grant
    Filed: April 19, 2011
    Date of Patent: January 22, 2013
    Assignee: STMicroelectronics S.A.
    Inventors: Frederic Bancel, Nicolas Berard
  • Patent number: 8359660
    Abstract: A method and apparatus of securing data stored in a memory of a portable memory storage device are disclosed. One example may include activating an authentication detection component of the portable memory storage device, and verifying an authentication key via the authentication detection component of the portable memory storage device. Once the authentication is complete, additional operations may include interfacing the portable memory storage device with a computing device and accessing data stored in the memory device. Upon ending the access operation, the discontinuing of the interfacing of the memory storage device with the computing device will automatically lock the memory storage device after a predetermined time has passed.
    Type: Grant
    Filed: November 30, 2009
    Date of Patent: January 22, 2013
    Assignee: LPS2
    Inventor: Michael James Lang
  • Patent number: 8359659
    Abstract: There is provided apparatus comprising a user interface for displaying a plurality of items. The apparatus is arranged: a) to receive at least one instruction, by which instruction or instructions, one or more of a plurality of items initially displayed on the user interface is or are categorized as an item or items to be hidden and the remaining one or more of the plurality of items initially displayed on the user interface is or are categorized as an item or items to be displayed; b) to receive an instruction to hide, from the user interface, the one or more items to be hidden; and c) to hide from the user interface, the one or more items to be hidden, such that the item or items categorized as items to be displayed are displayed on the user interface, and the item or items categorized as items to be hidden are not displayed on the user interface. In one preferred arrangement, the apparatus is an electronic device.
    Type: Grant
    Filed: June 24, 2005
    Date of Patent: January 22, 2013
    Assignee: Creative Technology Ltd
    Inventors: Wong Hoo Sim, Teck Chee Lee, Aik Tat Tan, Guan Chuan Choo
  • Publication number: 20130019324
    Abstract: Aspects of the disclosure relate to combining on-chip structure with external current measurements for threat detection in an integrated circuit. This method considers Trojans' impact on neighboring cells and on the entire IC's power consumption, and effectively localizes the measurement of dynamic power. An on-chip structure can permit threat detections. In one aspect, the on-chip structure can comprise a plurality of sensors distributed across the entirety of the IC, with each sensor of the plurality of sensors being placed in different rows of a standard-cell design. In another aspect, data analysis can permit separating effect of process variations on transient power usage of the IC from effects of a hardware threat such power usage. The on-chip structure also can be employed for implementation of a PE-PUF.
    Type: Application
    Filed: March 7, 2012
    Publication date: January 17, 2013
    Applicant: University of Connecticut
    Inventors: Mohammad Tehranipoor, Xiaoxiao Wang, Xuehui Zhang
  • Patent number: 8356361
    Abstract: An architecture is presented that facilitates integrated security capabilities. A memory module is provided that comprises non-volatile memory that stores security software and a security processor that accesses the security software from the nonvolatile memory and performs security functions based on the security software stored. Further, a host processor located outside of the memory module arbitrates with the security processor for access to the non-volatile memory. The memory module in communication with the host processor establishes a heightened level of security that can be utilized in authentication services and secure channel communications.
    Type: Grant
    Filed: December 21, 2006
    Date of Patent: January 15, 2013
    Assignee: Spansion LLC
    Inventors: Jeremy Isaac Nathaniel Werner, Venkat Natarajan, Willy Obereiner, Joe Yuen Tom, George Minassian, Russell Barck
  • Patent number: 8353026
    Abstract: A credential caching system includes receiving a set of authentication credentials, storing the set of authentication credentials in a credential cache memory, wherein the credential cache memory is coupled with a management controller, and supplying the set of authentication credentials for automatic authentication during a reset or reboot. In the event of a security breach, the credential caching system clears the set of authentication credentials from the credential cache memory so that the set of authentication credentials may no longer be used for a reset or reboot.
    Type: Grant
    Filed: October 23, 2008
    Date of Patent: January 8, 2013
    Assignee: Dell Products L.P.
    Inventors: Muhammed K. Jaber, Mukund P. Khatri, Kevin T. Marks, Don Charles McCall
  • Patent number: 8352731
    Abstract: A secure decentralized storage system provides scalable security by addressing the performance bottleneck of the security manager and the complexity issue of security administration in large-scale storage systems.
    Type: Grant
    Filed: April 17, 2009
    Date of Patent: January 8, 2013
    Assignee: Huazhong University of Science & Technology
    Inventors: Ke Zhou, Dan Feng, Zhongying Niu, Tianming Yang, Qinhua Yan, Dongliang Lei, Wei Yan
  • Patent number: 8352752
    Abstract: In a device having a plurality of circuits that can store at least a first value and a second value, a method can include configuring at least one circuit to persistently store the first value; determining whether the at least one circuit is storing the second value; and initiating a countermeasure if the at least one circuit is storing the second value. Determining whether the at least one circuit is storing the second value can include detecting whether the device has been attacked. Non-limiting examples of initiating a countermeasure can include resetting a portion of the device, powering down a portion of the device, activating an alarm circuit, causing protected data stored in the device to be erased, causing portions of the device to self-destruct, or causing the device to not respond to input applied to the interface.
    Type: Grant
    Filed: September 1, 2006
    Date of Patent: January 8, 2013
    Assignee: Inside Secure
    Inventors: Alexandre Croguennec, Yves Fusella