Organic Film On Silicon Patents (Class 977/809)
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Patent number: 9040121Abstract: Vacuum deposited thin films of material are described to create an interface that non-preferentially interacts with different domains of an underlying block copolymer film. The non-preferential interface prevents formation of a wetting layer and influences the orientation of domains in the block copolymer. The purpose of the deposited polymer is to produce nanostructured features in a block copolymer film that can serve as lithographic patterns.Type: GrantFiled: February 7, 2013Date of Patent: May 26, 2015Assignee: Board of Regents The University of Texas SystemInventors: C. Grant Willson, William Durand, Christopher John Ellison, Christopher Bates, Takehiro Seshimo, Julia Cushen, Logan Santos, Leon Dean, Erica Rausch
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Patent number: 8963068Abstract: Disclosed herein is a system for an apodization mask composed of multi-walled carbon nanotubes (MWCNTs) for absorbing unwanted stray light. An apodization mask is a precise pattern or shape that is mathematically derived using light scattering measurement techniques to achieve optimal light absorption. Also disclosed herein is an apparatus for a duplex telescope with stray light suppressing capabilities comprising: a primary mirror for transmitting and receiving light; a secondary mirror for defocusing transmitted light onto the primary mirror and for focusing received light; a photodetector which receives light; a laser transmitter which transmits light; and an apodization mask for absorbing stray transmitted light.Type: GrantFiled: July 28, 2011Date of Patent: February 24, 2015Assignee: The United States of America as represented by the Administrator of the National Aeronautics Space AdministrationInventors: John G. Hagopian, Jeffrey C. Livas, Shahram R. Shiri, Stephanie A. Getty, June L Tveekrem, James J. Butler
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Patent number: 8592980Abstract: An interconnect structure for use in an integrated circuit is provided. The interconnect structure includes a first low-K dielectric material. The first low-K material may be modified with a first group of carbon nanotubes (CNTs) and disposed on a metal line. The first low-K material is modified by dispersing the first group of CNTs in a solution, spinning the solution onto a silicon wafer and curing the solution to form the first low-K material modified with the first CNTs. The metal line includes a top layer and a bottom layer connected by a metal via. The interconnect structure also includes a second low-K dielectric material modified with a second group of CNTs and disposed on the bottom layer. Accordingly, embodiments the present disclosure could help to increase the mechanical strength of the low-K material or the entire interconnect structure.Type: GrantFiled: March 7, 2007Date of Patent: November 26, 2013Assignee: STMicroelectronics Asia Pacific Pte., Ltd.Inventors: Shanzhong Wang, Valeriy Nosik, Tong Yan Tee, Xueren Zhang
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Patent number: 8557344Abstract: The present disclosure relates to a method for making a transparent carbon nanotube composite film. The method includes: (a) providing a transparent carbon nanotube film structure; (b) fixing the transparent carbon nanotube film structure on a supporting; (c) immersing the transparent carbon nanotube film structure with the supporting into a transparent polymer solution; and (d) removing the transparent carbon nanotube film structure with the supporting from the transparent polymer solution, thereby forming the transparent carbon nanotube composite film. A light transmittance of the transparent carbon nanotube composite film structure is higher than a light transmittance of the transparent carbon nanotube film structure.Type: GrantFiled: November 16, 2011Date of Patent: October 15, 2013Assignees: Tsinghua University, Hon Hai Precision Industry Co., Ltd.Inventors: Kai Liu, Ying-Hui Sun, Kai-Li Jiang, Shou-Shan Fan
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Patent number: 8450724Abstract: A device is provided by use of a helical substituted polyacetylene. The device comprises a structure comprised of a helical substituted polyacetylene having a helical main chain, and a pair of electrodes for applying a voltage or electric current to the structure, wherein the molecule of the helical substituted polyacetylene has a length larger than the distance between the pair of the electrodes.Type: GrantFiled: September 21, 2007Date of Patent: May 28, 2013Assignee: Canon Kabushiki KaishaInventors: Takeyuki Sone, Akira Kuriyama, Koji Yano, Otto Albrecht, Masayoshi Tabata
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Patent number: 8309121Abstract: Compositions and nanoemulsions containing lipid nanocapsules dispersed in a hydrophilic phase, such nanocapsules including at least one avermectin compound, are useful for the treatment of dermatological pathologies, e.g., rosacea.Type: GrantFiled: April 10, 2009Date of Patent: November 13, 2012Assignee: Galderma S.A.Inventors: Lara Baudonnet, Claire Mallard
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Patent number: 8202496Abstract: A molecule is separated from a liquid sample containing said molecule and at least one additional molecule having a larger hydrodynamic diameter than the hydrodynamic diameter of the molecule to be separated, by means of a separation device comprising a substrate, at least one circulation channel arranged in said substrate, and at least one nanotube associated with said molecule to be separated and formed on a free surface of the substrate. Separation is achieved by means of the internal channel of a nanotube, such as a carbon nanotube, presenting an effective diameter chosen in predetermined and controlled manner. The effective diameter of the internal channel is chosen such as to be larger than the hydrodynamic diameter of the molecule to be separated and smaller than the hydrodynamic diameter of the additional molecules of larger hydrodynamic diameters.Type: GrantFiled: February 23, 2009Date of Patent: June 19, 2012Assignee: Commissariat a l'Energie AtomiqueInventors: Jean-Christophe Coiffic, Frédéric-Xavier Gaillard, Pierre Puget
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Publication number: 20110114931Abstract: An organic light emitting diode (OLED) device is disclosed. In one embodiment, the OLED device includes: i) a substrate and ii) a first thin film formed on the substrate, wherein the first thin film comprises first and second surfaces opposing each other, wherein the first surface contacts the substrate, and wherein a plurality of protrusions and depressions are alternately formed on the second surface of the first thin film. The OLED device may further include a second thin film formed on the protrusions and depressions of the first thin film, a first electrode formed on the second thin film, a light emitting member formed on the first electrode and a second electrode formed on the organic light emitting member.Type: ApplicationFiled: November 15, 2010Publication date: May 19, 2011Applicant: Samsung Mobile Display Co., Ltd.Inventors: Sung-Hun Lee, Gwan-Hyoung Lee, Chang-Woong Chu, Young-Gu Ju
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Patent number: 7857907Abstract: The present invention relates to a method for forming a layered structure with silicon nanocrystals. In one embodiment, the method comprises the steps of: (i) forming a first conductive layer on a substrate, (ii) forming a silicon-rich dielectric layer on the first conductive layer, and (iii) laser-annealing at least the silicon-rich dielectric layer to induce silicon-rich aggregation to form a plurality of silicon nanocrystals in the silicon-rich dielectric layer. The silicon-rich dielectric layer is one of a silicon-rich oxide film having a refractive index in the range of about 1.4 to 2.3, or a silicon-rich nitride film having a refractive index in the range of about 1.7 to 2.3. The layered structure with silicon nanocrystals in a silicon-rich dielectric layer is usable in a solar cell, a photodetector, a touch panel, a non-volatile memory device as storage node, and a liquid crystal display.Type: GrantFiled: January 25, 2007Date of Patent: December 28, 2010Assignee: AU Optronics CorporationInventors: An-Thung Cho, Chih-Wei Chao, Chia-Tien Peng, Wan-Yi Liu, Ming-Wei Sun
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Patent number: 7713352Abstract: A process is provided to produce bulk quantities of nanowires in a variety of semiconductor materials. Thin films and droplets of low-melting metals such as gallium, indium, bismuth, and aluminum are used to dissolve and to produce nanowires. The dissolution of solutes can be achieved by using a solid source of solute and low-melting metal, or using a vapor phase source of solute and low-melting metal. The resulting nanowires range in size from 1 nanometer up to 1 micron in diameter and lengths ranging from 1 nanometer to several hundred nanometers or microns. This process does not require the use of metals such as gold and iron in the form of clusters whose size determines the resulting nanowire size. In addition, the process allows for a lower growth temperature, better control over size and size distribution, and better control over the composition and purity of the nanowire produced therefrom.Type: GrantFiled: September 14, 2006Date of Patent: May 11, 2010Assignee: University of Louisville Research Foundation, Inc.Inventors: Mahendra Kumar Sunkara, Shashank Sharma, Hari Chandrasekaran, Hongwei Li, Sreeram Vaddiraju
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Patent number: 7642546Abstract: According to some embodiments, an article of manufacture comprises a substrate; a molecular layer on the substrate comprising at least one charge storage molecule coupled to the substrate by a molecular linker; a solid barrier dielectric layer directly on the molecular layer; and a conductive layer directly on the solid barrier dielectric layer. In some embodiments, the solid barrier dielectric layer is configured to provide a voltage drop across the molecular layer that is greater than a voltage drop across the solid barrier dielectric layer when a voltage is applied to the conductive layer. In some embodiments, the molecular layer has a thickness greater than that of the solid barrier dielectric layer. The article of manufacture contains no electrolyte between the molecular layer and the conductive layer.Type: GrantFiled: November 30, 2006Date of Patent: January 5, 2010Assignees: Zettacore, Inc., North Carolina State UniversityInventors: Veena Misra, Ritu Shrivastava, Zhong Chen, Guru Mathur
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Patent number: 7507675Abstract: A method for patterning a polished silicon surface is disclosed, the method including steps leading to an organic monolayer on at least a part of the silicon surface, the monolayer being functionalized in specific desired locations. The method can be used to produce a device comprising one or more FET structures, the gate of the FET being formed by the functionalized organic monolayer. The functionalized monolayer preferably contains oligosaccharides or oligopeptides which are capable of interacting with biological substance, such that the device acts as a bio-sensor.Type: GrantFiled: June 24, 2004Date of Patent: March 24, 2009Assignees: ASML Netherlands B.V., Wageningen UniversityInventors: Johannes Teunis Zuilhof, Klaus Simon, Ernst Jan Robert Sudholter, Qiao-Yu Sun
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Publication number: 20080007140Abstract: An actuator device which is made as a laminated structure including a displacement-functioning layer having a region to be deformed by the electric field and an electrode-functioning layer having a region to function as an electrode. And an manufacturing method in which the above-mentioned device is easily manufactured, the method in which, according to the laminated structure, arranging each layer to be formed on the transfer section and transferring it onto the substrate to laminate.Type: ApplicationFiled: June 20, 2007Publication date: January 10, 2008Inventors: Tomoo Izumi, Akira Kosaka, Mitsuhiro Fukuda
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Publication number: 20070267735Abstract: A plurality of conductive pads (2) are formed on a mounting surface of a mounting board. Conductive pads (11) are formed on a principal surface of a semiconductor chip (10) at positions corresponding to the conductive pads of the mounting board, when the principal surface faces toward the mounting board. A plurality of conductive nanotubes (12) extend from the conductive pads of one of the mounting board and the semiconductor chip. A press mechanism (3) presses the semiconductor chip against the mounting board and restricts a position of the semiconductor chip on the mounting surface to mount the semiconductor chip on the mounting board, in a state that tips of the conductive nanotubes are in contact with the corresponding conductive pads not formed with the conductive nanotubes.Type: ApplicationFiled: February 15, 2007Publication date: November 22, 2007Applicant: FUJITSU LIMITEDInventors: Yuji Awano, Masataka Mizukoshi, Taisuke Iwai, Tomoji Nakamura