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  • FAST INTERRUPT DISABLING AND PROCESSING IN A PARALLEL COMPUTING ENVIRONMENT
    Publication number: 20080059677
    Abstract: Embodiments of the present invention provide techniques for protecting critical sections of code being executed in a lightweight kernel environment suited for use on a compute node of a parallel computing system. These techniques avoid the overhead associated with a full kernel mode implementation of a network layer, while also allowing network interrupts to be processed without corrupting shared memory state. In one embodiment, a system call may be used to disable interrupts upon entry to a routine configured to process an event associated with the interrupt.
    Type: Application
    Filed: August 31, 2006
    Publication date: March 6, 2008
    Inventors: Charles Jens Archer, Michael Alan Blocksome, Todd Alan Inglett, Derek Lieber, Patrick Joseph McCarthy, Michael Basil Mundy, Jeffrey John Parker, Joseph D. Ratterman, Brian Edward Smith
  • EFFICIENT DEFERRED INTERRUPT HANDLING IN A PARALLEL COMPUTING ENVIRONMENT
    Publication number: 20080059676
    Abstract: Embodiments of the present invention provide techniques for protecting critical sections of code being executed in a lightweight kernel environment suited for use on a compute node of a parallel computing system. These techniques avoid the overhead associated with a full kernel mode implementation of a network layer, while also allowing network interrupts to be processed without corrupting shared memory state. In one embodiment, a fast user-space function sets a flag in memory indicating that interrupts should not progress and also provides a mechanism to defer processing of the interrupt.
    Type: Application
    Filed: August 31, 2006
    Publication date: March 6, 2008
    Inventors: Charles Jens Archer, Michael Alan Blocksome, Todd Alan Inglett, Derek Lieber, Patrick Joseph McCarthy, Michael Basil Mundy, Jeffrey John Parker, Joseph D. Ratterman, Brian Edward Smith
  • Hot carrier detection
    Patent number: 4575847
    Abstract: In a local area network for data communications, stations which distributively control their access to a common bus or other medium are able to identify the location of any "hot" station transmitter (one stuck continuously in an "on" condition which cannot be isolated from the medium). Such networks are effectively disabled by a hot carrier, since each station conditions its access on sensing the medium as previously idle. The present "loop test" method permits all stations in the network to quickly establish the location of a hot transmitter, and thereby quickly direct field repair personnel to that location. It also permits operators to take action to physically disconnect the faulty transmitter from the medium, so that the other stations may continue to use the network until the fault is repaired.
    Type: Grant
    Filed: September 26, 1983
    Date of Patent: March 11, 1986
    Assignee: International Business Machines Corp.
    Inventors: Beeman N. Fallwell, Jr., Matt A. Kaltenbach, William B. Ott
  • Centralized high-availability flows execution framework
    Patent number: 11586466
    Abstract: Techniques for providing a framework for handling execution of HA flows in an active-active storage node configuration. The techniques include receiving notifications of functional statuses of processes and/or equipment associated with storage nodes in the active-active configuration, making determinations regarding how to address HA events occurring on the processes and/or equipment associated with the storage nodes based on the received notifications, and, in response to a request to execute an HA flow for a respective HA event, determining whether to refuse the request to execute the HA flow, service the request to execute the HA flow, abort one or more HA flows in execution, and/or postpone execution of the HA flow to a later time based on one or more dependencies defining conditions for the HA flow. In this way, mutual interference of HA flows or other process threads in the active-active configuration can be reduced or eliminated.
    Type: Grant
    Filed: January 20, 2021
    Date of Patent: February 21, 2023
    Assignee: EMC IP Holding Company LLC
    Inventors: Inna Reznik, Ahia Lieber, Eran Banin
  • Universal LSI array logic modules with integral storage array and variable autonomous sequencing
    Patent number: 3983538
    Abstract: A universal array logic module featuring autonomous operation includes interconnected array structured logic and a small writable storage array. The module is subject to large scale integrated packaging as a standardly dimensioned unit (e.g. chip). The internal connections form discrete first and second internal circulation loops in one of which the storage array connects as a serial constituent randomly addressable by signals carried in the other loop. The storage array typically holds eight 32-bit words. The logic arrays may be read-only structures organized to perform arithmetic and translational logic manipulations under autonomous (internal) control. The module assembly includes integral input/output gating for transferring signals between an external bus and the internal loops. The logic array structure permits both external and internal control of cyclic operation. The operation repertoire includes interrupts, resets, and sequence branches.
    Type: Grant
    Filed: May 1, 1974
    Date of Patent: September 28, 1976
    Assignee: International Business Machines Corporation
    Inventor: John W. Jones
  • Method of purging erroneous signals from closed ring data communication networks capable of repeatedly circulating such signals
    Patent number: 4468734
    Abstract: A method of initializing non-synchronous peer-to-peer data communication rings, and for effecting error recovery in such networks. On detection of error, each station operates in a purging configuration to clear the ring. In the purging configuration the station's receiving circuits are isolated and its transmitting circuits transmit "clear" signals containing this station's own address as destination. These signals serve to purge all potentially erroneous information in all upstream stations which then are operationally connected to that station. If a loss condition is persistent the station operates first in a "bypass" configuration for a third predetermined time interval, then in the purging configuration for the second time interval, and then resumes normal operation. In the bypass configuration the station's ring input is connected directly to its output and the (locally clocked) output of its transmitting circuits is connected to the input of its receiving circuits.
    Type: Grant
    Filed: March 26, 1982
    Date of Patent: August 28, 1984
    Assignee: International Business Machines Corporation
    Inventors: Charles S. Lanier, Hiram M. Maxwell, Roger E. McKay, Leonard Weiss
  • Distributed data processing in ring-structured networks architected for full duplex peer-to-peer operation of processing stations and uninterruptible transfer of long data records between stations
    Patent number: 4489379
    Abstract: In a ring-structured data communication network, in which plural data processing systems exchange data and control information on a full duplex peer to peer basis, systems are presently architected to assign at least three I/O subchannels (i.e. at least three device addresses) to respective ring interface adapters. At least two of these subchannels are dedicated for providing separate input paths from the ring to at least two associated program-assignable areas in their system's main store, and a third of these subchannels is dedicated as an output path from the system's store to the ring. Collectively, these subchannels can sustain two input transfer processes and one output transfer process concurrently. One of these input processes is associatable with a locked mode of adapter operations which provides a non-blockable path for data transfer from a selected (remote) station on the ring to the respective system's main store.
    Type: Grant
    Filed: January 25, 1982
    Date of Patent: December 18, 1984
    Assignee: International Business Machines Corporation
    Inventors: Charles S. Lanier, Hiram M. Maxwell, Roger E. McKay, Leonard Weiss
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