Abstract: Provided is a semiconductor ceramic and a semiconductor ceramic element each having a room temperature specific resistance of 3 &OHgr;·cm or lower and a resistance temperature characteristic of 9%/° C. or more. The semiconductor ceramic is characterized in that the ratio R1/(R1+R2), in which R1 is the transgranular resistance value of the crystal particles and R2 is the intergranular resistance value of the crystal particles and R1+R2 is the overall resistance value representing the sum of R1 and R2, is about 0.35 to 0.85.
Abstract: Integrated voltage divider comprising partial resistors (R1 ,R2) formed of paths of polycrystalline semiconductor material applied over a dielectric layer (4) on a semiconductor substrate (5). Under the paths, each forming a partial resistor (R1,R2) in the semiconductor substrate (5), a well (6 and 7 respectively) is formed having a conductivity type opposite to the conductivity type of the semiconductor substrate (5). The total surfaces of the paths forming the partial resistors (R1,R2) are dimensioned so that their ratio equals the inverse ratio of the resistor values of the two partial resistors (R1 ,R2).
Abstract: A semiconductor device includes: a first semiconductor chip mounted onto a die pad; a second semiconductor chip mounted face down onto the first semiconductor chip and including a band gap element. The first semiconductor chip and the second semiconductor chip are electrically bonded to each other by a bonding material. A filler is disposed between the first semiconductor chip and the second semiconductor chip. When the distance from the band gap element to the bonding material is defined as r1 and the distance from the band gap element to an outline side of the first semiconductor chip is defined as r2, r1/r2?(?0.148×r1+0.021)×r2+(0.550×r1+0.020).
Abstract: The invention relates to a semiconductor isolation structure. More particularly, the present invention relates to a semiconductor isolation structure suitable for providing high voltage isolation. Embodiments disclosed include a semiconductor structure (10) comprising: a first semiconductor region (R1), a second semiconductor region (R2) within the first semiconductor region (R1), and a voltage isolator (11) separating the first and second semiconductor regions (R1, R2), the voltage isolator (11) comprising: a nested series of insulating regions (T1, T2) around the perimeter of the second semiconductor region (R2), an intermediate semiconductor region (I1, I2) between each adjacent pair of nested insulating regions (T1, T2), and a voltage control device (12) comprising a conducting element (D1-D3) connected to at least one intermediate semiconductor region (I1, I2) in parallel with the at least one insulating region (T1, T2), so as to control a voltage across the at least one insulating region (T1, T2).
Type:
Application
Filed:
March 30, 2015
Publication date:
October 15, 2015
Inventors:
Joan Wichard Strijker, Inesz Marycka Emmerik-Weijland
Abstract: The invention relates to a semiconductor isolation structure. More particularly, the present invention relates to a semiconductor isolation structure suitable for providing high voltage isolation. Embodiments disclosed include a semiconductor structure (10) comprising: a first semiconductor region (R1), a second semiconductor region (R2) within the first semiconductor region (R1), and a voltage isolator (11) separating the first and second semiconductor regions (R1, R2), the voltage isolator (11) comprising: a nested series of insulating regions (T1, T2) around the perimeter of the second semiconductor region (R2), an intermediate semiconductor region (I1, I2) between each adjacent pair of nested insulating regions (T1, T2), and a voltage control device (12) comprising a conducting element (D1-D3) connected to at least one intermediate semiconductor region (I1, I2) in parallel with the at least one insulating region (T1, T2), so as to control a voltage across the at least one insulating region (T1, T2).
Type:
Grant
Filed:
March 30, 2015
Date of Patent:
January 10, 2017
Assignee:
NXP B.V.
Inventors:
Joan Wichard Strijker, Inesz Marycka Emmerik-Weijland
Abstract: A semiconductor light-emitting element is configured to emit ultraviolet light having a wavelength of 320 nm or shorter. Denoting a total area of a principal surface of a substrate as S0, an area on a p-type semiconductor layer in which a p-side contact electrode is formed as S1, an area on an n-type semiconductor layer in which an n-side contact electrode is formed as S2, a reflectivity of the p-side contact electrode for ultraviolet having a wavelength of 280 nm incident from a side of the p-type semiconductor layer as R1, and a reflectivity of the n-side contact electrode for ultraviolet light having a wavelength of 280 nm incident from a side of the n-type semiconductor layer as R2, (S1/S0)×R1+(S2/S0)×R2?0.5, S1>S2, and R1?R2.
Abstract: A semiconductor light-emitting element is configured to emit ultraviolet light having a wavelength of 320 nm or shorter. Denoting a total area of a principal surface of a substrate as S0, an area on a p-type semiconductor layer in which a p-side contact electrode is formed as S1, an area on an n-type semiconductor layer in which an n-side contact electrode is formed as S2, a reflectivity of the p-side contact electrode for ultraviolet having a wavelength of 280 nm incident from a side of the p-type semiconductor layer as R1, and a reflectivity of the n-side contact electrode for ultraviolet light having a wavelength of 280 nm incident from a side of the n-type semiconductor layer as R2, (S1/S0)×R1+(S2/S0)×R2?0.5, S1>S2, and R1?R2.
Abstract: In a method of producing a semiconductor device, semiconductor burrs (74) are removed by dry etching using an etching gas in which a lateral-direction etch rate (R2) is greater than a depth-direction etch rate (R1) (that is, R1/R2 is smaller than 1) in a section of a groove (72) in a direction parallel to word lines.
Abstract: Compounds having a core comprised of an aromatic ring and at least two annulated beta-substituted fused thiophene ring systems of the general formula: -(?-R2—FT2ArFT2-?-R2)—, and polymers or copolymers thereof, of the general formulas: -{-(?-R2—FT2ArFT2-?-R2)-G1-}n-, or -{-G1-(?-R2—FT2ArFT2-?-R2)-G1-G2-}n-, where ?-R2—FT2ArFT2-?-R2, -G1-, -G2-, and n are as defined herein. Also disclosed are compositions, articles, or devices comprising the polymers, and methods for making and using the polymers. The compositions, articles, or devices can be used, for example, for electronic applications, such as light emitting devices and semiconductor devices.
Type:
Grant
Filed:
February 11, 2013
Date of Patent:
March 11, 2014
Assignee:
Corning Incorporated
Inventors:
Mingqian He, Thomas Mark Leslie, Weijun Niu, Adama Tandia
Abstract: Compounds having a core comprised of an aromatic ring and at least two annulated beta-substituted fused thiophene ring systems of the general formula: -(?-R2—FT2ArFT2-?-R2)—, and polymers or copolymers thereof, of the general formulas: -{-(?-R2—FT2ArFT2-?-R2)-G1-}n-, or -{-G1-(?-R2—FT2ArFT2-?-R2)-G1-G2-}n-, where ?-R2—FT2ArFT2-?-R2, -G1-, -G2-, and n are as defined herein. Also disclosed are compositions, articles, or devices comprising the polymers, and methods for making and using the polymers. The compositions, articles, or devices can be used, for example, for electronic applications, such as light emitting devices and semiconductor devices.
Type:
Application
Filed:
February 11, 2013
Publication date:
July 11, 2013
Inventors:
Mingqian He, Thomas Mark Leslie, Weijun Niu, Adama Tandia
Abstract: An organic semiconductor material represented by the following general formula (1): wherein X1 to X4 each independently represent a chalcogen atom; and at least one of R1 and R2 represents a substituent for obtaining solubility, and R1 and R2 may be connected to each other to form a ring.
Abstract: Compounds having a core comprised of an aromatic ring and at least two annulated beta-substituted fused thiophene ring systems of the general formula: -(?-R2-FT2ArFT2-?-R2)-, and polymers or copolymers thereof, of the general formulas: -{-?-R2-FT2ArFT2-?-R2)-G1-}n-, or -{-G1-(?-R2-FT2ArFT2-?-R2)-G1-G2-}n-, where ?-R2-FT2ArFT2-?-R2, -G1-, -G2-, and n are as defined herein. Also disclosed are compositions, articles, or devices comprising the polymers, and methods for making and using the polymers. The compositions, articles, or devices can be used, for example, for electronic applications, such as light emitting devices and semiconductor devices.
Type:
Application
Filed:
February 28, 2011
Publication date:
August 30, 2012
Inventors:
Mingqian He, Thomas Mark Leslie, Weijun Niu, Adama Tandia
Abstract: Compounds having a core comprised of an aromatic ring and at least two annulated beta-substituted fused thiophene ring systems of the general formula: -(?-R2—FT2ArFT2-?-R2)—, and polymers or copolymers thereof, of the general formulas: -{-?-R2—FT2ArFT2-?-R2)-G1-}n-, or -{-G1-(?-R2—FT2ArFT2-?-R2)-G1-G2-}n-, where ?-R2—FT2ArFT2-?-R2, -G1-, -G2-, and n are as defined herein. Also disclosed are compositions, articles, or devices comprising the polymers, and methods for making and using the polymers. The compositions, articles, or devices can be used, for example, for electronic applications, such as light emitting devices and semiconductor devices.
Type:
Grant
Filed:
February 28, 2011
Date of Patent:
March 12, 2013
Assignee:
Corning Incorporated
Inventors:
Mingqian He, Thomas Mark Leslie, Weijun Niu, Adama Tandia
Abstract: A semiconductor material having the molecular formula Cu2l2Se6 is provided. Also provided are solid solutions of semiconductor materials having the formulas Cu2lxBr2-xSeyTe6-y and Cu2lxBr2-xSeyS6-y, where 0?x?1 and 0?y?3. Methods and devices that use the semiconductor materials to convert incident radiation into an electric signal are also provided. The devices include optoelectronic and photonic devices, such as photodetectors, photodiodes, and photovoltaic cells.
Abstract: A semiconductor material having the molecular formula Cu2l2Se6 is provided. Also provided are solid solutions of semiconductor materials having the formulas Cu2lxBr2-xSeyTe6-y and Cu2lxBr2-xSeyS6-y, where 0?x?1 and 0?y?3. Methods and devices that use the semiconductor materials to convert incident radiation into an electric signal are also provided. The devices include optoelectronic and photonic devices, such as photodetectors, photodiodes, and photovoltaic cells.
Abstract: First and second gate insulating films are formed so as to cover at least the upper corner of first and second fin-shaped semiconductor regions. The radius of curvature r1? of the upper corner of the first fin-shaped semiconductor region located outside the first gate insulating film is greater than the radius of curvature r1 of the upper corner of the first fin-shaped semiconductor region located under the first gate insulating film and is less than or equal to 2×r1. The radius of curvature r2? of the upper corner of the second fin-shaped semiconductor region located outside the second gate insulating film is greater than the radius of curvature r2 of the upper corner of the second fin-shaped semiconductor region located under the second gate insulating film and is less than or equal to 2×r2.
Abstract: First and second gate insulating films are formed so as to cover at least the upper corner of first and second fin-shaped semiconductor regions. The radius of curvature r1? of the upper corner of the first fin-shaped semiconductor region located outside the first gate insulating film is greater than the radius of curvature r1 of the upper corner of the first fin-shaped semiconductor region located under the first gate insulating film and is less than or equal to 2×r1. The radius of curvature r2? of the upper corner of the second fin-shaped semiconductor region located outside the second gate insulating film is greater than the radius of curvature r2 of the upper corner of the second fin-shaped semiconductor region located under the second gate insulating film and is less than or equal to 2×r2.
Abstract: First and second gate insulating films are formed so as to cover at least the upper corner of first and second fin-shaped semiconductor regions. The radius of curvature r1? of the upper corner of the first fin-shaped semiconductor region located outside the first gate insulating film is greater than the radius of curvature r1 of the upper corner of the first fin-shaped semiconductor region located under the first gate insulating film and is less than or equal to 2×r1. The radius of curvature r2? of the upper corner of the second fin-shaped semiconductor region located outside the second gate insulating film is greater than the radius of curvature r2 of the upper corner of the second fin-shaped semiconductor region located under the second gate insulating film and is less than or equal to 2×r2.
Abstract: First and second gate insulating films are formed so as to cover at least the upper corner of first and second fin-shaped semiconductor regions. The radius of curvature r1? of the upper corner of the first fin-shaped semiconductor region located outside the first gate insulating film is greater than the radius of curvature r1 of the upper corner of the first fin-shaped semiconductor region located under the first gate insulating film and is less than or equal to 2×r1. The radius of curvature r2? of the upper corner of the second fin-shaped semiconductor region located outside the second gate insulating film is greater than the radius of curvature r2 of the upper corner of the second fin-shaped semiconductor region located under the second gate insulating film and is less than or equal to 2×r2.
Abstract: An organic semiconductor material represented by the following general formula (1): wherein X1 to X4 each independently represent a chalcogen atom; and at least one of R1 and R2 represents a substituent for obtaining solubility, and R1 and R2 may be connected to each other to form a ring.